Lines Matching refs:mc_writel
287 mc_writel(mc, value & ~BIT(rst->bit), rst->reset); in tegra20_mc_hotreset_assert()
303 mc_writel(mc, value | BIT(rst->bit), rst->reset); in tegra20_mc_hotreset_deassert()
319 mc_writel(mc, value, rst->control); in tegra20_mc_block_dma()
347 mc_writel(mc, value, rst->control); in tegra20_mc_unblock_dma()
460 mc_writel(mc, 0x00000000, MC_STAT_CONTROL); in tegra20_mc_stat_gather()
461 mc_writel(mc, control_0, MC_STAT_EMC_CONTROL_0); in tegra20_mc_stat_gather()
462 mc_writel(mc, control_1, MC_STAT_EMC_CONTROL_1); in tegra20_mc_stat_gather()
463 mc_writel(mc, 0xffffffff, MC_STAT_EMC_CLOCK_LIMIT); in tegra20_mc_stat_gather()
465 mc_writel(mc, EMC_GATHER_ENABLE, MC_STAT_CONTROL); in tegra20_mc_stat_gather()
467 mc_writel(mc, EMC_GATHER_DISABLE, MC_STAT_CONTROL); in tegra20_mc_stat_gather()
784 mc_writel(mc, status, MC_INTSTATUS); in tegra20_mc_handle_irq()