Lines Matching refs:pcr
62 static int rtsx_comm_set_ltr_latency(struct rtsx_pcr *pcr, u32 latency) in rtsx_comm_set_ltr_latency() argument
64 rtsx_pci_write_register(pcr, MSGTXDATA0, in rtsx_comm_set_ltr_latency()
66 rtsx_pci_write_register(pcr, MSGTXDATA1, in rtsx_comm_set_ltr_latency()
68 rtsx_pci_write_register(pcr, MSGTXDATA2, in rtsx_comm_set_ltr_latency()
70 rtsx_pci_write_register(pcr, MSGTXDATA3, in rtsx_comm_set_ltr_latency()
72 rtsx_pci_write_register(pcr, LTR_CTL, LTR_TX_EN_MASK | in rtsx_comm_set_ltr_latency()
78 int rtsx_set_ltr_latency(struct rtsx_pcr *pcr, u32 latency) in rtsx_set_ltr_latency() argument
80 return rtsx_comm_set_ltr_latency(pcr, latency); in rtsx_set_ltr_latency()
83 static void rtsx_comm_set_aspm(struct rtsx_pcr *pcr, bool enable) in rtsx_comm_set_aspm() argument
85 if (pcr->aspm_enabled == enable) in rtsx_comm_set_aspm()
88 if (pcr->aspm_mode == ASPM_MODE_CFG) { in rtsx_comm_set_aspm()
89 pcie_capability_clear_and_set_word(pcr->pci, PCI_EXP_LNKCTL, in rtsx_comm_set_aspm()
91 enable ? pcr->aspm_en : 0); in rtsx_comm_set_aspm()
92 } else if (pcr->aspm_mode == ASPM_MODE_REG) { in rtsx_comm_set_aspm()
93 if (pcr->aspm_en & 0x02) in rtsx_comm_set_aspm()
94 rtsx_pci_write_register(pcr, ASPM_FORCE_CTL, FORCE_ASPM_CTL0 | in rtsx_comm_set_aspm()
97 rtsx_pci_write_register(pcr, ASPM_FORCE_CTL, FORCE_ASPM_CTL0 | in rtsx_comm_set_aspm()
101 if (!enable && (pcr->aspm_en & 0x02)) in rtsx_comm_set_aspm()
104 pcr->aspm_enabled = enable; in rtsx_comm_set_aspm()
107 static void rtsx_disable_aspm(struct rtsx_pcr *pcr) in rtsx_disable_aspm() argument
109 if (pcr->ops->set_aspm) in rtsx_disable_aspm()
110 pcr->ops->set_aspm(pcr, false); in rtsx_disable_aspm()
112 rtsx_comm_set_aspm(pcr, false); in rtsx_disable_aspm()
115 int rtsx_set_l1off_sub(struct rtsx_pcr *pcr, u8 val) in rtsx_set_l1off_sub() argument
117 rtsx_pci_write_register(pcr, L1SUB_CONFIG3, 0xFF, val); in rtsx_set_l1off_sub()
122 static void rtsx_set_l1off_sub_cfg_d0(struct rtsx_pcr *pcr, int active) in rtsx_set_l1off_sub_cfg_d0() argument
124 if (pcr->ops->set_l1off_cfg_sub_d0) in rtsx_set_l1off_sub_cfg_d0()
125 pcr->ops->set_l1off_cfg_sub_d0(pcr, active); in rtsx_set_l1off_sub_cfg_d0()
128 static void rtsx_comm_pm_full_on(struct rtsx_pcr *pcr) in rtsx_comm_pm_full_on() argument
130 struct rtsx_cr_option *option = &pcr->option; in rtsx_comm_pm_full_on()
132 rtsx_disable_aspm(pcr); in rtsx_comm_pm_full_on()
138 rtsx_set_ltr_latency(pcr, option->ltr_active_latency); in rtsx_comm_pm_full_on()
140 if (rtsx_check_dev_flag(pcr, LTR_L1SS_PWR_GATE_EN)) in rtsx_comm_pm_full_on()
141 rtsx_set_l1off_sub_cfg_d0(pcr, 1); in rtsx_comm_pm_full_on()
144 static void rtsx_pm_full_on(struct rtsx_pcr *pcr) in rtsx_pm_full_on() argument
146 rtsx_comm_pm_full_on(pcr); in rtsx_pm_full_on()
149 void rtsx_pci_start_run(struct rtsx_pcr *pcr) in rtsx_pci_start_run() argument
152 if (pcr->remove_pci) in rtsx_pci_start_run()
155 if (pcr->state != PDEV_STAT_RUN) { in rtsx_pci_start_run()
156 pcr->state = PDEV_STAT_RUN; in rtsx_pci_start_run()
157 if (pcr->ops->enable_auto_blink) in rtsx_pci_start_run()
158 pcr->ops->enable_auto_blink(pcr); in rtsx_pci_start_run()
159 rtsx_pm_full_on(pcr); in rtsx_pci_start_run()
164 int rtsx_pci_write_register(struct rtsx_pcr *pcr, u16 addr, u8 mask, u8 data) in rtsx_pci_write_register() argument
173 rtsx_pci_writel(pcr, RTSX_HAIMR, val); in rtsx_pci_write_register()
176 val = rtsx_pci_readl(pcr, RTSX_HAIMR); in rtsx_pci_write_register()
188 int rtsx_pci_read_register(struct rtsx_pcr *pcr, u16 addr, u8 *data) in rtsx_pci_read_register() argument
194 rtsx_pci_writel(pcr, RTSX_HAIMR, val); in rtsx_pci_read_register()
197 val = rtsx_pci_readl(pcr, RTSX_HAIMR); in rtsx_pci_read_register()
212 int __rtsx_pci_write_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 val) in __rtsx_pci_write_phy_register() argument
217 rtsx_pci_write_register(pcr, PHYDATA0, 0xFF, (u8)val); in __rtsx_pci_write_phy_register()
218 rtsx_pci_write_register(pcr, PHYDATA1, 0xFF, (u8)(val >> 8)); in __rtsx_pci_write_phy_register()
219 rtsx_pci_write_register(pcr, PHYADDR, 0xFF, addr); in __rtsx_pci_write_phy_register()
220 rtsx_pci_write_register(pcr, PHYRWCTL, 0xFF, 0x81); in __rtsx_pci_write_phy_register()
223 err = rtsx_pci_read_register(pcr, PHYRWCTL, &tmp); in __rtsx_pci_write_phy_register()
239 int rtsx_pci_write_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 val) in rtsx_pci_write_phy_register() argument
241 if (pcr->ops->write_phy) in rtsx_pci_write_phy_register()
242 return pcr->ops->write_phy(pcr, addr, val); in rtsx_pci_write_phy_register()
244 return __rtsx_pci_write_phy_register(pcr, addr, val); in rtsx_pci_write_phy_register()
248 int __rtsx_pci_read_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 *val) in __rtsx_pci_read_phy_register() argument
254 rtsx_pci_write_register(pcr, PHYADDR, 0xFF, addr); in __rtsx_pci_read_phy_register()
255 rtsx_pci_write_register(pcr, PHYRWCTL, 0xFF, 0x80); in __rtsx_pci_read_phy_register()
258 err = rtsx_pci_read_register(pcr, PHYRWCTL, &tmp); in __rtsx_pci_read_phy_register()
271 rtsx_pci_read_register(pcr, PHYDATA0, &val1); in __rtsx_pci_read_phy_register()
272 rtsx_pci_read_register(pcr, PHYDATA1, &val2); in __rtsx_pci_read_phy_register()
281 int rtsx_pci_read_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 *val) in rtsx_pci_read_phy_register() argument
283 if (pcr->ops->read_phy) in rtsx_pci_read_phy_register()
284 return pcr->ops->read_phy(pcr, addr, val); in rtsx_pci_read_phy_register()
286 return __rtsx_pci_read_phy_register(pcr, addr, val); in rtsx_pci_read_phy_register()
290 void rtsx_pci_stop_cmd(struct rtsx_pcr *pcr) in rtsx_pci_stop_cmd() argument
292 if (pcr->ops->stop_cmd) in rtsx_pci_stop_cmd()
293 return pcr->ops->stop_cmd(pcr); in rtsx_pci_stop_cmd()
295 rtsx_pci_writel(pcr, RTSX_HCBCTLR, STOP_CMD); in rtsx_pci_stop_cmd()
296 rtsx_pci_writel(pcr, RTSX_HDBCTLR, STOP_DMA); in rtsx_pci_stop_cmd()
298 rtsx_pci_write_register(pcr, DMACTL, 0x80, 0x80); in rtsx_pci_stop_cmd()
299 rtsx_pci_write_register(pcr, RBCTL, 0x80, 0x80); in rtsx_pci_stop_cmd()
303 void rtsx_pci_add_cmd(struct rtsx_pcr *pcr, in rtsx_pci_add_cmd() argument
308 u32 *ptr = (u32 *)(pcr->host_cmds_ptr); in rtsx_pci_add_cmd()
315 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_add_cmd()
316 ptr += pcr->ci; in rtsx_pci_add_cmd()
317 if (pcr->ci < (HOST_CMDS_BUF_LEN / 4)) { in rtsx_pci_add_cmd()
320 pcr->ci++; in rtsx_pci_add_cmd()
322 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_add_cmd()
326 void rtsx_pci_send_cmd_no_wait(struct rtsx_pcr *pcr) in rtsx_pci_send_cmd_no_wait() argument
330 rtsx_pci_writel(pcr, RTSX_HCBAR, pcr->host_cmds_addr); in rtsx_pci_send_cmd_no_wait()
332 val |= (u32)(pcr->ci * 4) & 0x00FFFFFF; in rtsx_pci_send_cmd_no_wait()
335 rtsx_pci_writel(pcr, RTSX_HCBCTLR, val); in rtsx_pci_send_cmd_no_wait()
339 int rtsx_pci_send_cmd(struct rtsx_pcr *pcr, int timeout) in rtsx_pci_send_cmd() argument
347 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_send_cmd()
350 pcr->done = &trans_done; in rtsx_pci_send_cmd()
351 pcr->trans_result = TRANS_NOT_READY; in rtsx_pci_send_cmd()
354 rtsx_pci_writel(pcr, RTSX_HCBAR, pcr->host_cmds_addr); in rtsx_pci_send_cmd()
356 val |= (u32)(pcr->ci * 4) & 0x00FFFFFF; in rtsx_pci_send_cmd()
359 rtsx_pci_writel(pcr, RTSX_HCBCTLR, val); in rtsx_pci_send_cmd()
361 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_send_cmd()
367 pcr_dbg(pcr, "Timeout (%s %d)\n", __func__, __LINE__); in rtsx_pci_send_cmd()
372 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_send_cmd()
373 if (pcr->trans_result == TRANS_RESULT_FAIL) in rtsx_pci_send_cmd()
375 else if (pcr->trans_result == TRANS_RESULT_OK) in rtsx_pci_send_cmd()
377 else if (pcr->trans_result == TRANS_NO_DEVICE) in rtsx_pci_send_cmd()
379 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_send_cmd()
382 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_send_cmd()
383 pcr->done = NULL; in rtsx_pci_send_cmd()
384 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_send_cmd()
387 rtsx_pci_stop_cmd(pcr); in rtsx_pci_send_cmd()
389 if (pcr->finish_me) in rtsx_pci_send_cmd()
390 complete(pcr->finish_me); in rtsx_pci_send_cmd()
396 static void rtsx_pci_add_sg_tbl(struct rtsx_pcr *pcr, in rtsx_pci_add_sg_tbl() argument
399 u64 *ptr = (u64 *)(pcr->host_sg_tbl_ptr) + pcr->sgi; in rtsx_pci_add_sg_tbl()
403 pcr_dbg(pcr, "DMA addr: 0x%x, Len: 0x%x\n", (unsigned int)addr, len); in rtsx_pci_add_sg_tbl()
408 if ((PCI_PID(pcr) == PID_5261) || (PCI_PID(pcr) == PID_5228)) { in rtsx_pci_add_sg_tbl()
418 pcr->sgi++; in rtsx_pci_add_sg_tbl()
421 int rtsx_pci_transfer_data(struct rtsx_pcr *pcr, struct scatterlist *sglist, in rtsx_pci_transfer_data() argument
426 pcr_dbg(pcr, "--> %s: num_sg = %d\n", __func__, num_sg); in rtsx_pci_transfer_data()
427 count = rtsx_pci_dma_map_sg(pcr, sglist, num_sg, read); in rtsx_pci_transfer_data()
430 pcr_dbg(pcr, "DMA mapping count: %d\n", count); in rtsx_pci_transfer_data()
432 err = rtsx_pci_dma_transfer(pcr, sglist, count, read, timeout); in rtsx_pci_transfer_data()
434 rtsx_pci_dma_unmap_sg(pcr, sglist, num_sg, read); in rtsx_pci_transfer_data()
440 int rtsx_pci_dma_map_sg(struct rtsx_pcr *pcr, struct scatterlist *sglist, in rtsx_pci_dma_map_sg() argument
445 if (pcr->remove_pci) in rtsx_pci_dma_map_sg()
451 return dma_map_sg(&(pcr->pci->dev), sglist, num_sg, dir); in rtsx_pci_dma_map_sg()
455 void rtsx_pci_dma_unmap_sg(struct rtsx_pcr *pcr, struct scatterlist *sglist, in rtsx_pci_dma_unmap_sg() argument
460 dma_unmap_sg(&(pcr->pci->dev), sglist, num_sg, dir); in rtsx_pci_dma_unmap_sg()
464 int rtsx_pci_dma_transfer(struct rtsx_pcr *pcr, struct scatterlist *sglist, in rtsx_pci_dma_transfer() argument
477 if (pcr->remove_pci) in rtsx_pci_dma_transfer()
484 pcr->sgi = 0; in rtsx_pci_dma_transfer()
488 rtsx_pci_add_sg_tbl(pcr, addr, len, i == count - 1); in rtsx_pci_dma_transfer()
491 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_dma_transfer()
493 pcr->done = &trans_done; in rtsx_pci_dma_transfer()
494 pcr->trans_result = TRANS_NOT_READY; in rtsx_pci_dma_transfer()
496 rtsx_pci_writel(pcr, RTSX_HDBAR, pcr->host_sg_tbl_addr); in rtsx_pci_dma_transfer()
497 rtsx_pci_writel(pcr, RTSX_HDBCTLR, val); in rtsx_pci_dma_transfer()
499 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_dma_transfer()
504 pcr_dbg(pcr, "Timeout (%s %d)\n", __func__, __LINE__); in rtsx_pci_dma_transfer()
509 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_dma_transfer()
510 if (pcr->trans_result == TRANS_RESULT_FAIL) { in rtsx_pci_dma_transfer()
512 if (pcr->dma_error_count < RTS_MAX_TIMES_FREQ_REDUCTION) in rtsx_pci_dma_transfer()
513 pcr->dma_error_count++; in rtsx_pci_dma_transfer()
516 else if (pcr->trans_result == TRANS_NO_DEVICE) in rtsx_pci_dma_transfer()
518 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_dma_transfer()
521 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_dma_transfer()
522 pcr->done = NULL; in rtsx_pci_dma_transfer()
523 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_dma_transfer()
526 rtsx_pci_stop_cmd(pcr); in rtsx_pci_dma_transfer()
528 if (pcr->finish_me) in rtsx_pci_dma_transfer()
529 complete(pcr->finish_me); in rtsx_pci_dma_transfer()
535 int rtsx_pci_read_ppbuf(struct rtsx_pcr *pcr, u8 *buf, int buf_len) in rtsx_pci_read_ppbuf() argument
548 rtsx_pci_init_cmd(pcr); in rtsx_pci_read_ppbuf()
551 rtsx_pci_add_cmd(pcr, READ_REG_CMD, reg++, 0, 0); in rtsx_pci_read_ppbuf()
553 err = rtsx_pci_send_cmd(pcr, 250); in rtsx_pci_read_ppbuf()
557 memcpy(ptr, rtsx_pci_get_cmd_data(pcr), 256); in rtsx_pci_read_ppbuf()
562 rtsx_pci_init_cmd(pcr); in rtsx_pci_read_ppbuf()
565 rtsx_pci_add_cmd(pcr, READ_REG_CMD, reg++, 0, 0); in rtsx_pci_read_ppbuf()
567 err = rtsx_pci_send_cmd(pcr, 250); in rtsx_pci_read_ppbuf()
572 memcpy(ptr, rtsx_pci_get_cmd_data(pcr), buf_len % 256); in rtsx_pci_read_ppbuf()
578 int rtsx_pci_write_ppbuf(struct rtsx_pcr *pcr, u8 *buf, int buf_len) in rtsx_pci_write_ppbuf() argument
591 rtsx_pci_init_cmd(pcr); in rtsx_pci_write_ppbuf()
594 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, in rtsx_pci_write_ppbuf()
599 err = rtsx_pci_send_cmd(pcr, 250); in rtsx_pci_write_ppbuf()
605 rtsx_pci_init_cmd(pcr); in rtsx_pci_write_ppbuf()
608 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, in rtsx_pci_write_ppbuf()
613 err = rtsx_pci_send_cmd(pcr, 250); in rtsx_pci_write_ppbuf()
622 static int rtsx_pci_set_pull_ctl(struct rtsx_pcr *pcr, const u32 *tbl) in rtsx_pci_set_pull_ctl() argument
624 rtsx_pci_init_cmd(pcr); in rtsx_pci_set_pull_ctl()
627 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, in rtsx_pci_set_pull_ctl()
632 return rtsx_pci_send_cmd(pcr, 100); in rtsx_pci_set_pull_ctl()
635 int rtsx_pci_card_pull_ctl_enable(struct rtsx_pcr *pcr, int card) in rtsx_pci_card_pull_ctl_enable() argument
640 tbl = pcr->sd_pull_ctl_enable_tbl; in rtsx_pci_card_pull_ctl_enable()
642 tbl = pcr->ms_pull_ctl_enable_tbl; in rtsx_pci_card_pull_ctl_enable()
646 return rtsx_pci_set_pull_ctl(pcr, tbl); in rtsx_pci_card_pull_ctl_enable()
650 int rtsx_pci_card_pull_ctl_disable(struct rtsx_pcr *pcr, int card) in rtsx_pci_card_pull_ctl_disable() argument
655 tbl = pcr->sd_pull_ctl_disable_tbl; in rtsx_pci_card_pull_ctl_disable()
657 tbl = pcr->ms_pull_ctl_disable_tbl; in rtsx_pci_card_pull_ctl_disable()
661 return rtsx_pci_set_pull_ctl(pcr, tbl); in rtsx_pci_card_pull_ctl_disable()
665 static void rtsx_pci_enable_bus_int(struct rtsx_pcr *pcr) in rtsx_pci_enable_bus_int() argument
667 struct rtsx_hw_param *hw_param = &pcr->hw_param; in rtsx_pci_enable_bus_int()
669 pcr->bier = TRANS_OK_INT_EN | TRANS_FAIL_INT_EN | SD_INT_EN in rtsx_pci_enable_bus_int()
672 if (pcr->num_slots > 1) in rtsx_pci_enable_bus_int()
673 pcr->bier |= MS_INT_EN; in rtsx_pci_enable_bus_int()
676 rtsx_pci_writel(pcr, RTSX_BIER, pcr->bier); in rtsx_pci_enable_bus_int()
678 pcr_dbg(pcr, "RTSX_BIER: 0x%08x\n", pcr->bier); in rtsx_pci_enable_bus_int()
698 int rtsx_pci_switch_clock(struct rtsx_pcr *pcr, unsigned int card_clock, in rtsx_pci_switch_clock() argument
711 if (PCI_PID(pcr) == PID_5261) in rtsx_pci_switch_clock()
712 return rts5261_pci_switch_clock(pcr, card_clock, in rtsx_pci_switch_clock()
714 if (PCI_PID(pcr) == PID_5228) in rtsx_pci_switch_clock()
715 return rts5228_pci_switch_clock(pcr, card_clock, in rtsx_pci_switch_clock()
725 err = rtsx_pci_write_register(pcr, SD_CFG1, in rtsx_pci_switch_clock()
732 pcr->dma_error_count && in rtsx_pci_switch_clock()
733 PCI_PID(pcr) == RTS5227_DEVICE_ID) in rtsx_pci_switch_clock()
735 (pcr->dma_error_count * 20000000); in rtsx_pci_switch_clock()
738 pcr_dbg(pcr, "Switch card clock to %dMHz\n", card_clock); in rtsx_pci_switch_clock()
743 pcr_dbg(pcr, "Internal SSC clock: %dMHz (cur_clock = %d)\n", in rtsx_pci_switch_clock()
744 clk, pcr->cur_clock); in rtsx_pci_switch_clock()
746 if (clk == pcr->cur_clock) in rtsx_pci_switch_clock()
749 if (pcr->ops->conv_clk_and_div_n) in rtsx_pci_switch_clock()
750 n = (u8)pcr->ops->conv_clk_and_div_n(clk, CLK_TO_DIV_N); in rtsx_pci_switch_clock()
763 if (pcr->ops->conv_clk_and_div_n) { in rtsx_pci_switch_clock()
764 int dbl_clk = pcr->ops->conv_clk_and_div_n(n, in rtsx_pci_switch_clock()
766 n = (u8)pcr->ops->conv_clk_and_div_n(dbl_clk, in rtsx_pci_switch_clock()
773 pcr_dbg(pcr, "n = %d, div = %d\n", n, div); in rtsx_pci_switch_clock()
780 pcr_dbg(pcr, "ssc_depth = %d\n", ssc_depth); in rtsx_pci_switch_clock()
782 rtsx_pci_init_cmd(pcr); in rtsx_pci_switch_clock()
783 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, in rtsx_pci_switch_clock()
785 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_DIV, in rtsx_pci_switch_clock()
787 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, 0); in rtsx_pci_switch_clock()
788 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL2, in rtsx_pci_switch_clock()
790 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_DIV_N_0, 0xFF, n); in rtsx_pci_switch_clock()
791 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, SSC_RSTB); in rtsx_pci_switch_clock()
793 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_VPCLK0_CTL, in rtsx_pci_switch_clock()
795 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_VPCLK0_CTL, in rtsx_pci_switch_clock()
799 err = rtsx_pci_send_cmd(pcr, 2000); in rtsx_pci_switch_clock()
805 err = rtsx_pci_write_register(pcr, CLK_CTL, CLK_LOW_FREQ, 0); in rtsx_pci_switch_clock()
809 pcr->cur_clock = clk; in rtsx_pci_switch_clock()
814 int rtsx_pci_card_power_on(struct rtsx_pcr *pcr, int card) in rtsx_pci_card_power_on() argument
816 if (pcr->ops->card_power_on) in rtsx_pci_card_power_on()
817 return pcr->ops->card_power_on(pcr, card); in rtsx_pci_card_power_on()
823 int rtsx_pci_card_power_off(struct rtsx_pcr *pcr, int card) in rtsx_pci_card_power_off() argument
825 if (pcr->ops->card_power_off) in rtsx_pci_card_power_off()
826 return pcr->ops->card_power_off(pcr, card); in rtsx_pci_card_power_off()
832 int rtsx_pci_card_exclusive_check(struct rtsx_pcr *pcr, int card) in rtsx_pci_card_exclusive_check() argument
839 if (!(pcr->flags & PCR_MS_PMOS)) { in rtsx_pci_card_exclusive_check()
843 if (pcr->card_exist & (~cd_mask[card])) in rtsx_pci_card_exclusive_check()
851 int rtsx_pci_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage) in rtsx_pci_switch_output_voltage() argument
853 if (pcr->ops->switch_output_voltage) in rtsx_pci_switch_output_voltage()
854 return pcr->ops->switch_output_voltage(pcr, voltage); in rtsx_pci_switch_output_voltage()
860 unsigned int rtsx_pci_card_exist(struct rtsx_pcr *pcr) in rtsx_pci_card_exist() argument
864 val = rtsx_pci_readl(pcr, RTSX_BIPR); in rtsx_pci_card_exist()
865 if (pcr->ops->cd_deglitch) in rtsx_pci_card_exist()
866 val = pcr->ops->cd_deglitch(pcr); in rtsx_pci_card_exist()
872 void rtsx_pci_complete_unfinished_transfer(struct rtsx_pcr *pcr) in rtsx_pci_complete_unfinished_transfer() argument
876 pcr->finish_me = &finish; in rtsx_pci_complete_unfinished_transfer()
879 if (pcr->done) in rtsx_pci_complete_unfinished_transfer()
880 complete(pcr->done); in rtsx_pci_complete_unfinished_transfer()
882 if (!pcr->remove_pci) in rtsx_pci_complete_unfinished_transfer()
883 rtsx_pci_stop_cmd(pcr); in rtsx_pci_complete_unfinished_transfer()
887 pcr->finish_me = NULL; in rtsx_pci_complete_unfinished_transfer()
894 struct rtsx_pcr *pcr; in rtsx_pci_card_detect() local
900 pcr = container_of(dwork, struct rtsx_pcr, carddet_work); in rtsx_pci_card_detect()
902 pcr_dbg(pcr, "--> %s\n", __func__); in rtsx_pci_card_detect()
904 mutex_lock(&pcr->pcr_mutex); in rtsx_pci_card_detect()
905 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_card_detect()
907 irq_status = rtsx_pci_readl(pcr, RTSX_BIPR); in rtsx_pci_card_detect()
908 pcr_dbg(pcr, "irq_status: 0x%08x\n", irq_status); in rtsx_pci_card_detect()
911 card_inserted = pcr->card_inserted & irq_status; in rtsx_pci_card_detect()
912 card_removed = pcr->card_removed; in rtsx_pci_card_detect()
913 pcr->card_inserted = 0; in rtsx_pci_card_detect()
914 pcr->card_removed = 0; in rtsx_pci_card_detect()
916 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_card_detect()
919 pcr_dbg(pcr, "card_inserted: 0x%x, card_removed: 0x%x\n", in rtsx_pci_card_detect()
922 if (pcr->ops->cd_deglitch) in rtsx_pci_card_detect()
923 card_inserted = pcr->ops->cd_deglitch(pcr); in rtsx_pci_card_detect()
927 pcr->card_exist |= card_inserted; in rtsx_pci_card_detect()
928 pcr->card_exist &= ~card_removed; in rtsx_pci_card_detect()
931 mutex_unlock(&pcr->pcr_mutex); in rtsx_pci_card_detect()
933 if ((card_detect & SD_EXIST) && pcr->slots[RTSX_SD_CARD].card_event) in rtsx_pci_card_detect()
934 pcr->slots[RTSX_SD_CARD].card_event( in rtsx_pci_card_detect()
935 pcr->slots[RTSX_SD_CARD].p_dev); in rtsx_pci_card_detect()
936 if ((card_detect & MS_EXIST) && pcr->slots[RTSX_MS_CARD].card_event) in rtsx_pci_card_detect()
937 pcr->slots[RTSX_MS_CARD].card_event( in rtsx_pci_card_detect()
938 pcr->slots[RTSX_MS_CARD].p_dev); in rtsx_pci_card_detect()
941 static void rtsx_pci_process_ocp(struct rtsx_pcr *pcr) in rtsx_pci_process_ocp() argument
943 if (pcr->ops->process_ocp) { in rtsx_pci_process_ocp()
944 pcr->ops->process_ocp(pcr); in rtsx_pci_process_ocp()
946 if (!pcr->option.ocp_en) in rtsx_pci_process_ocp()
948 rtsx_pci_get_ocpstat(pcr, &pcr->ocp_stat); in rtsx_pci_process_ocp()
949 if (pcr->ocp_stat & (SD_OC_NOW | SD_OC_EVER)) { in rtsx_pci_process_ocp()
950 rtsx_pci_card_power_off(pcr, RTSX_SD_CARD); in rtsx_pci_process_ocp()
951 rtsx_pci_write_register(pcr, CARD_OE, SD_OUTPUT_EN, 0); in rtsx_pci_process_ocp()
952 rtsx_pci_clear_ocpstat(pcr); in rtsx_pci_process_ocp()
953 pcr->ocp_stat = 0; in rtsx_pci_process_ocp()
958 static int rtsx_pci_process_ocp_interrupt(struct rtsx_pcr *pcr) in rtsx_pci_process_ocp_interrupt() argument
960 if (pcr->option.ocp_en) in rtsx_pci_process_ocp_interrupt()
961 rtsx_pci_process_ocp(pcr); in rtsx_pci_process_ocp_interrupt()
968 struct rtsx_pcr *pcr = dev_id; in rtsx_pci_isr() local
971 if (!pcr) in rtsx_pci_isr()
974 spin_lock(&pcr->lock); in rtsx_pci_isr()
976 int_reg = rtsx_pci_readl(pcr, RTSX_BIPR); in rtsx_pci_isr()
978 rtsx_pci_writel(pcr, RTSX_BIPR, int_reg); in rtsx_pci_isr()
979 if ((int_reg & pcr->bier) == 0) { in rtsx_pci_isr()
980 spin_unlock(&pcr->lock); in rtsx_pci_isr()
984 spin_unlock(&pcr->lock); in rtsx_pci_isr()
988 int_reg &= (pcr->bier | 0x7FFFFF); in rtsx_pci_isr()
991 rtsx_pci_process_ocp_interrupt(pcr); in rtsx_pci_isr()
995 pcr->card_inserted |= SD_EXIST; in rtsx_pci_isr()
997 pcr->card_removed |= SD_EXIST; in rtsx_pci_isr()
998 pcr->card_inserted &= ~SD_EXIST; in rtsx_pci_isr()
999 if (PCI_PID(pcr) == PID_5261) { in rtsx_pci_isr()
1000 rtsx_pci_write_register(pcr, RTS5261_FW_STATUS, in rtsx_pci_isr()
1002 pcr->extra_caps |= EXTRA_CAPS_SD_EXPRESS; in rtsx_pci_isr()
1005 pcr->dma_error_count = 0; in rtsx_pci_isr()
1010 pcr->card_inserted |= MS_EXIST; in rtsx_pci_isr()
1012 pcr->card_removed |= MS_EXIST; in rtsx_pci_isr()
1013 pcr->card_inserted &= ~MS_EXIST; in rtsx_pci_isr()
1019 pcr->trans_result = TRANS_RESULT_FAIL; in rtsx_pci_isr()
1020 if (pcr->done) in rtsx_pci_isr()
1021 complete(pcr->done); in rtsx_pci_isr()
1023 pcr->trans_result = TRANS_RESULT_OK; in rtsx_pci_isr()
1024 if (pcr->done) in rtsx_pci_isr()
1025 complete(pcr->done); in rtsx_pci_isr()
1029 if ((pcr->card_inserted || pcr->card_removed) && !(int_reg & SD_OC_INT)) in rtsx_pci_isr()
1030 schedule_delayed_work(&pcr->carddet_work, in rtsx_pci_isr()
1033 spin_unlock(&pcr->lock); in rtsx_pci_isr()
1037 static int rtsx_pci_acquire_irq(struct rtsx_pcr *pcr) in rtsx_pci_acquire_irq() argument
1039 pcr_dbg(pcr, "%s: pcr->msi_en = %d, pci->irq = %d\n", in rtsx_pci_acquire_irq()
1040 __func__, pcr->msi_en, pcr->pci->irq); in rtsx_pci_acquire_irq()
1042 if (request_irq(pcr->pci->irq, rtsx_pci_isr, in rtsx_pci_acquire_irq()
1043 pcr->msi_en ? 0 : IRQF_SHARED, in rtsx_pci_acquire_irq()
1044 DRV_NAME_RTSX_PCI, pcr)) { in rtsx_pci_acquire_irq()
1045 dev_err(&(pcr->pci->dev), in rtsx_pci_acquire_irq()
1047 pcr->pci->irq); in rtsx_pci_acquire_irq()
1051 pcr->irq = pcr->pci->irq; in rtsx_pci_acquire_irq()
1052 pci_intx(pcr->pci, !pcr->msi_en); in rtsx_pci_acquire_irq()
1057 static void rtsx_base_force_power_down(struct rtsx_pcr *pcr) in rtsx_base_force_power_down() argument
1060 rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 1, MASK_8_BIT_DEF, 0); in rtsx_base_force_power_down()
1061 rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 2, MASK_8_BIT_DEF, 0); in rtsx_base_force_power_down()
1062 rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 3, in rtsx_base_force_power_down()
1065 rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3, in rtsx_base_force_power_down()
1068 rtsx_pci_write_register(pcr, FPDCTL, ALL_POWER_DOWN, ALL_POWER_DOWN); in rtsx_base_force_power_down()
1071 static void __maybe_unused rtsx_pci_power_off(struct rtsx_pcr *pcr, u8 pm_state, bool runtime) in rtsx_pci_power_off() argument
1073 if (pcr->ops->turn_off_led) in rtsx_pci_power_off()
1074 pcr->ops->turn_off_led(pcr); in rtsx_pci_power_off()
1076 rtsx_pci_writel(pcr, RTSX_BIER, 0); in rtsx_pci_power_off()
1077 pcr->bier = 0; in rtsx_pci_power_off()
1079 rtsx_pci_write_register(pcr, PETXCFG, 0x08, 0x08); in rtsx_pci_power_off()
1080 rtsx_pci_write_register(pcr, HOST_SLEEP_STATE, 0x03, pm_state); in rtsx_pci_power_off()
1082 if (pcr->ops->force_power_down) in rtsx_pci_power_off()
1083 pcr->ops->force_power_down(pcr, pm_state, runtime); in rtsx_pci_power_off()
1085 rtsx_base_force_power_down(pcr); in rtsx_pci_power_off()
1088 void rtsx_pci_enable_ocp(struct rtsx_pcr *pcr) in rtsx_pci_enable_ocp() argument
1092 if (pcr->ops->enable_ocp) { in rtsx_pci_enable_ocp()
1093 pcr->ops->enable_ocp(pcr); in rtsx_pci_enable_ocp()
1095 rtsx_pci_write_register(pcr, FPDCTL, OC_POWER_DOWN, 0); in rtsx_pci_enable_ocp()
1096 rtsx_pci_write_register(pcr, REG_OCPCTL, 0xFF, val); in rtsx_pci_enable_ocp()
1101 void rtsx_pci_disable_ocp(struct rtsx_pcr *pcr) in rtsx_pci_disable_ocp() argument
1105 if (pcr->ops->disable_ocp) { in rtsx_pci_disable_ocp()
1106 pcr->ops->disable_ocp(pcr); in rtsx_pci_disable_ocp()
1108 rtsx_pci_write_register(pcr, REG_OCPCTL, mask, 0); in rtsx_pci_disable_ocp()
1109 rtsx_pci_write_register(pcr, FPDCTL, OC_POWER_DOWN, in rtsx_pci_disable_ocp()
1114 void rtsx_pci_init_ocp(struct rtsx_pcr *pcr) in rtsx_pci_init_ocp() argument
1116 if (pcr->ops->init_ocp) { in rtsx_pci_init_ocp()
1117 pcr->ops->init_ocp(pcr); in rtsx_pci_init_ocp()
1119 struct rtsx_cr_option *option = &(pcr->option); in rtsx_pci_init_ocp()
1124 rtsx_pci_write_register(pcr, FPDCTL, OC_POWER_DOWN, 0); in rtsx_pci_init_ocp()
1125 rtsx_pci_write_register(pcr, REG_OCPPARA1, in rtsx_pci_init_ocp()
1127 rtsx_pci_write_register(pcr, REG_OCPPARA2, in rtsx_pci_init_ocp()
1129 rtsx_pci_write_register(pcr, REG_OCPGLITCH, in rtsx_pci_init_ocp()
1130 SD_OCP_GLITCH_MASK, pcr->hw_param.ocp_glitch); in rtsx_pci_init_ocp()
1131 rtsx_pci_enable_ocp(pcr); in rtsx_pci_init_ocp()
1136 int rtsx_pci_get_ocpstat(struct rtsx_pcr *pcr, u8 *val) in rtsx_pci_get_ocpstat() argument
1138 if (pcr->ops->get_ocpstat) in rtsx_pci_get_ocpstat()
1139 return pcr->ops->get_ocpstat(pcr, val); in rtsx_pci_get_ocpstat()
1141 return rtsx_pci_read_register(pcr, REG_OCPSTAT, val); in rtsx_pci_get_ocpstat()
1144 void rtsx_pci_clear_ocpstat(struct rtsx_pcr *pcr) in rtsx_pci_clear_ocpstat() argument
1146 if (pcr->ops->clear_ocpstat) { in rtsx_pci_clear_ocpstat()
1147 pcr->ops->clear_ocpstat(pcr); in rtsx_pci_clear_ocpstat()
1152 rtsx_pci_write_register(pcr, REG_OCPCTL, mask, val); in rtsx_pci_clear_ocpstat()
1154 rtsx_pci_write_register(pcr, REG_OCPCTL, mask, 0); in rtsx_pci_clear_ocpstat()
1158 void rtsx_pci_enable_oobs_polling(struct rtsx_pcr *pcr) in rtsx_pci_enable_oobs_polling() argument
1162 if ((PCI_PID(pcr) != PID_525A) && (PCI_PID(pcr) != PID_5260)) { in rtsx_pci_enable_oobs_polling()
1163 rtsx_pci_read_phy_register(pcr, 0x01, &val); in rtsx_pci_enable_oobs_polling()
1165 rtsx_pci_write_phy_register(pcr, 0x01, val); in rtsx_pci_enable_oobs_polling()
1167 rtsx_pci_write_register(pcr, REG_CFG_OOBS_OFF_TIMER, 0xFF, 0x32); in rtsx_pci_enable_oobs_polling()
1168 rtsx_pci_write_register(pcr, REG_CFG_OOBS_ON_TIMER, 0xFF, 0x05); in rtsx_pci_enable_oobs_polling()
1169 rtsx_pci_write_register(pcr, REG_CFG_VCM_ON_TIMER, 0xFF, 0x83); in rtsx_pci_enable_oobs_polling()
1170 rtsx_pci_write_register(pcr, REG_CFG_OOBS_POLLING, 0xFF, 0xDE); in rtsx_pci_enable_oobs_polling()
1174 void rtsx_pci_disable_oobs_polling(struct rtsx_pcr *pcr) in rtsx_pci_disable_oobs_polling() argument
1178 if ((PCI_PID(pcr) != PID_525A) && (PCI_PID(pcr) != PID_5260)) { in rtsx_pci_disable_oobs_polling()
1179 rtsx_pci_read_phy_register(pcr, 0x01, &val); in rtsx_pci_disable_oobs_polling()
1181 rtsx_pci_write_phy_register(pcr, 0x01, val); in rtsx_pci_disable_oobs_polling()
1183 rtsx_pci_write_register(pcr, REG_CFG_VCM_ON_TIMER, 0xFF, 0x03); in rtsx_pci_disable_oobs_polling()
1184 rtsx_pci_write_register(pcr, REG_CFG_OOBS_POLLING, 0xFF, 0x00); in rtsx_pci_disable_oobs_polling()
1188 int rtsx_sd_power_off_card3v3(struct rtsx_pcr *pcr) in rtsx_sd_power_off_card3v3() argument
1190 rtsx_pci_write_register(pcr, CARD_CLK_EN, SD_CLK_EN | in rtsx_sd_power_off_card3v3()
1192 rtsx_pci_write_register(pcr, CARD_OE, SD_OUTPUT_EN, 0); in rtsx_sd_power_off_card3v3()
1193 rtsx_pci_card_power_off(pcr, RTSX_SD_CARD); in rtsx_sd_power_off_card3v3()
1197 rtsx_pci_card_pull_ctl_disable(pcr, RTSX_SD_CARD); in rtsx_sd_power_off_card3v3()
1202 int rtsx_ms_power_off_card3v3(struct rtsx_pcr *pcr) in rtsx_ms_power_off_card3v3() argument
1204 rtsx_pci_write_register(pcr, CARD_CLK_EN, SD_CLK_EN | in rtsx_ms_power_off_card3v3()
1207 rtsx_pci_card_pull_ctl_disable(pcr, RTSX_MS_CARD); in rtsx_ms_power_off_card3v3()
1209 rtsx_pci_write_register(pcr, CARD_OE, MS_OUTPUT_EN, 0); in rtsx_ms_power_off_card3v3()
1210 rtsx_pci_card_power_off(pcr, RTSX_MS_CARD); in rtsx_ms_power_off_card3v3()
1215 static int rtsx_pci_init_hw(struct rtsx_pcr *pcr) in rtsx_pci_init_hw() argument
1217 struct pci_dev *pdev = pcr->pci; in rtsx_pci_init_hw()
1220 if (PCI_PID(pcr) == PID_5228) in rtsx_pci_init_hw()
1221 rtsx_pci_write_register(pcr, RTS5228_LDO1_CFG1, RTS5228_LDO1_SR_TIME_MASK, in rtsx_pci_init_hw()
1224 rtsx_pci_writel(pcr, RTSX_HCBAR, pcr->host_cmds_addr); in rtsx_pci_init_hw()
1226 rtsx_pci_enable_bus_int(pcr); in rtsx_pci_init_hw()
1229 if (PCI_PID(pcr) == PID_5261) { in rtsx_pci_init_hw()
1231 err = rtsx_pci_write_register(pcr, RTS5261_FW_CFG1, in rtsx_pci_init_hw()
1233 err = rtsx_pci_write_register(pcr, RTS5261_REG_FPDCTL, in rtsx_pci_init_hw()
1236 err = rtsx_pci_write_register(pcr, FPDCTL, SSC_POWER_DOWN, 0); in rtsx_pci_init_hw()
1244 rtsx_disable_aspm(pcr); in rtsx_pci_init_hw()
1245 if (pcr->ops->optimize_phy) { in rtsx_pci_init_hw()
1246 err = pcr->ops->optimize_phy(pcr); in rtsx_pci_init_hw()
1251 rtsx_pci_init_cmd(pcr); in rtsx_pci_init_hw()
1254 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_DIV, 0x07, 0x07); in rtsx_pci_init_hw()
1256 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, HOST_SLEEP_STATE, 0x03, 0x00); in rtsx_pci_init_hw()
1258 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_CLK_EN, 0x1E, 0); in rtsx_pci_init_hw()
1260 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CHANGE_LINK_STATE, 0x0A, 0); in rtsx_pci_init_hw()
1262 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_DRIVE_SEL, in rtsx_pci_init_hw()
1263 0xFF, pcr->card_drive_sel); in rtsx_pci_init_hw()
1265 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL1, in rtsx_pci_init_hw()
1267 if (PCI_PID(pcr) == PID_5261) in rtsx_pci_init_hw()
1268 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL2, 0xFF, in rtsx_pci_init_hw()
1270 else if (PCI_PID(pcr) == PID_5228) in rtsx_pci_init_hw()
1271 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL2, 0xFF, in rtsx_pci_init_hw()
1274 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL2, 0xFF, 0x12); in rtsx_pci_init_hw()
1277 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CHANGE_LINK_STATE, 0x16, 0x10); in rtsx_pci_init_hw()
1279 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, IRQSTAT0, in rtsx_pci_init_hw()
1284 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PERST_GLITCH_WIDTH, 0xFF, 0x80); in rtsx_pci_init_hw()
1289 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, RCCTL, 0x01, 0x00); in rtsx_pci_init_hw()
1295 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, NFTS_TX_CTRL, 0x02, 0); in rtsx_pci_init_hw()
1297 err = rtsx_pci_send_cmd(pcr, 100); in rtsx_pci_init_hw()
1301 switch (PCI_PID(pcr)) { in rtsx_pci_init_hw()
1308 rtsx_pci_write_register(pcr, PM_CLK_FORCE_CTL, 1, 1); in rtsx_pci_init_hw()
1315 rtsx_pci_init_ocp(pcr); in rtsx_pci_init_hw()
1318 pcie_capability_clear_and_set_word(pcr->pci, PCI_EXP_LNKCTL, in rtsx_pci_init_hw()
1323 if (pcr->ops->extra_init_hw) { in rtsx_pci_init_hw()
1324 err = pcr->ops->extra_init_hw(pcr); in rtsx_pci_init_hw()
1329 if (pcr->aspm_mode == ASPM_MODE_REG) in rtsx_pci_init_hw()
1330 rtsx_pci_write_register(pcr, ASPM_FORCE_CTL, 0x30, 0x30); in rtsx_pci_init_hw()
1335 if (pcr->ops->cd_deglitch) in rtsx_pci_init_hw()
1336 pcr->card_exist = pcr->ops->cd_deglitch(pcr); in rtsx_pci_init_hw()
1338 pcr->card_exist = rtsx_pci_readl(pcr, RTSX_BIPR) & CARD_EXIST; in rtsx_pci_init_hw()
1343 static int rtsx_pci_init_chip(struct rtsx_pcr *pcr) in rtsx_pci_init_chip() argument
1349 spin_lock_init(&pcr->lock); in rtsx_pci_init_chip()
1350 mutex_init(&pcr->pcr_mutex); in rtsx_pci_init_chip()
1352 switch (PCI_PID(pcr)) { in rtsx_pci_init_chip()
1355 rts5209_init_params(pcr); in rtsx_pci_init_chip()
1359 rts5229_init_params(pcr); in rtsx_pci_init_chip()
1363 rtl8411_init_params(pcr); in rtsx_pci_init_chip()
1367 rts5227_init_params(pcr); in rtsx_pci_init_chip()
1371 rts522a_init_params(pcr); in rtsx_pci_init_chip()
1375 rts5249_init_params(pcr); in rtsx_pci_init_chip()
1379 rts524a_init_params(pcr); in rtsx_pci_init_chip()
1383 rts525a_init_params(pcr); in rtsx_pci_init_chip()
1387 rtl8411b_init_params(pcr); in rtsx_pci_init_chip()
1391 rtl8402_init_params(pcr); in rtsx_pci_init_chip()
1395 rts5260_init_params(pcr); in rtsx_pci_init_chip()
1399 rts5261_init_params(pcr); in rtsx_pci_init_chip()
1403 rts5228_init_params(pcr); in rtsx_pci_init_chip()
1407 pcr_dbg(pcr, "PID: 0x%04x, IC version: 0x%02x\n", in rtsx_pci_init_chip()
1408 PCI_PID(pcr), pcr->ic_version); in rtsx_pci_init_chip()
1410 pcr->slots = kcalloc(pcr->num_slots, sizeof(struct rtsx_slot), in rtsx_pci_init_chip()
1412 if (!pcr->slots) in rtsx_pci_init_chip()
1415 if (pcr->aspm_mode == ASPM_MODE_CFG) { in rtsx_pci_init_chip()
1416 pcie_capability_read_word(pcr->pci, PCI_EXP_LNKCTL, &cfg_val); in rtsx_pci_init_chip()
1418 pcr->aspm_enabled = true; in rtsx_pci_init_chip()
1420 pcr->aspm_enabled = false; in rtsx_pci_init_chip()
1422 } else if (pcr->aspm_mode == ASPM_MODE_REG) { in rtsx_pci_init_chip()
1423 rtsx_pci_read_register(pcr, ASPM_FORCE_CTL, &val); in rtsx_pci_init_chip()
1425 pcr->aspm_enabled = false; in rtsx_pci_init_chip()
1427 pcr->aspm_enabled = true; in rtsx_pci_init_chip()
1430 if (pcr->ops->fetch_vendor_settings) in rtsx_pci_init_chip()
1431 pcr->ops->fetch_vendor_settings(pcr); in rtsx_pci_init_chip()
1433 pcr_dbg(pcr, "pcr->aspm_en = 0x%x\n", pcr->aspm_en); in rtsx_pci_init_chip()
1434 pcr_dbg(pcr, "pcr->sd30_drive_sel_1v8 = 0x%x\n", in rtsx_pci_init_chip()
1435 pcr->sd30_drive_sel_1v8); in rtsx_pci_init_chip()
1436 pcr_dbg(pcr, "pcr->sd30_drive_sel_3v3 = 0x%x\n", in rtsx_pci_init_chip()
1437 pcr->sd30_drive_sel_3v3); in rtsx_pci_init_chip()
1438 pcr_dbg(pcr, "pcr->card_drive_sel = 0x%x\n", in rtsx_pci_init_chip()
1439 pcr->card_drive_sel); in rtsx_pci_init_chip()
1440 pcr_dbg(pcr, "pcr->flags = 0x%x\n", pcr->flags); in rtsx_pci_init_chip()
1442 pcr->state = PDEV_STAT_IDLE; in rtsx_pci_init_chip()
1443 err = rtsx_pci_init_hw(pcr); in rtsx_pci_init_chip()
1445 kfree(pcr->slots); in rtsx_pci_init_chip()
1455 struct rtsx_pcr *pcr; in rtsx_pci_probe() local
1477 pcr = kzalloc(sizeof(*pcr), GFP_KERNEL); in rtsx_pci_probe()
1478 if (!pcr) { in rtsx_pci_probe()
1488 handle->pcr = pcr; in rtsx_pci_probe()
1492 ret = idr_alloc(&rtsx_pci_idr, pcr, 0, 0, GFP_NOWAIT); in rtsx_pci_probe()
1494 pcr->id = ret; in rtsx_pci_probe()
1500 pcr->pci = pcidev; in rtsx_pci_probe()
1503 if (CHK_PCI_PID(pcr, 0x525A)) in rtsx_pci_probe()
1507 pcr->remap_addr = ioremap(base, len); in rtsx_pci_probe()
1508 if (!pcr->remap_addr) { in rtsx_pci_probe()
1513 pcr->rtsx_resv_buf = dma_alloc_coherent(&(pcidev->dev), in rtsx_pci_probe()
1514 RTSX_RESV_BUF_LEN, &(pcr->rtsx_resv_buf_addr), in rtsx_pci_probe()
1516 if (pcr->rtsx_resv_buf == NULL) { in rtsx_pci_probe()
1520 pcr->host_cmds_ptr = pcr->rtsx_resv_buf; in rtsx_pci_probe()
1521 pcr->host_cmds_addr = pcr->rtsx_resv_buf_addr; in rtsx_pci_probe()
1522 pcr->host_sg_tbl_ptr = pcr->rtsx_resv_buf + HOST_CMDS_BUF_LEN; in rtsx_pci_probe()
1523 pcr->host_sg_tbl_addr = pcr->rtsx_resv_buf_addr + HOST_CMDS_BUF_LEN; in rtsx_pci_probe()
1524 pcr->card_inserted = 0; in rtsx_pci_probe()
1525 pcr->card_removed = 0; in rtsx_pci_probe()
1526 INIT_DELAYED_WORK(&pcr->carddet_work, rtsx_pci_card_detect); in rtsx_pci_probe()
1528 pcr->msi_en = msi_en; in rtsx_pci_probe()
1529 if (pcr->msi_en) { in rtsx_pci_probe()
1532 pcr->msi_en = false; in rtsx_pci_probe()
1535 ret = rtsx_pci_acquire_irq(pcr); in rtsx_pci_probe()
1540 synchronize_irq(pcr->irq); in rtsx_pci_probe()
1542 ret = rtsx_pci_init_chip(pcr); in rtsx_pci_probe()
1552 ret = mfd_add_devices(&pcidev->dev, pcr->id, rtsx_pcr_cells, in rtsx_pci_probe()
1563 kfree(pcr->slots); in rtsx_pci_probe()
1565 free_irq(pcr->irq, (void *)pcr); in rtsx_pci_probe()
1567 if (pcr->msi_en) in rtsx_pci_probe()
1568 pci_disable_msi(pcr->pci); in rtsx_pci_probe()
1569 dma_free_coherent(&(pcr->pci->dev), RTSX_RESV_BUF_LEN, in rtsx_pci_probe()
1570 pcr->rtsx_resv_buf, pcr->rtsx_resv_buf_addr); in rtsx_pci_probe()
1572 iounmap(pcr->remap_addr); in rtsx_pci_probe()
1575 idr_remove(&rtsx_pci_idr, pcr->id); in rtsx_pci_probe()
1580 kfree(pcr); in rtsx_pci_probe()
1592 struct rtsx_pcr *pcr = handle->pcr; in rtsx_pci_remove() local
1594 pcr->remove_pci = true; in rtsx_pci_remove()
1600 spin_lock_irq(&pcr->lock); in rtsx_pci_remove()
1601 rtsx_pci_writel(pcr, RTSX_BIER, 0); in rtsx_pci_remove()
1602 pcr->bier = 0; in rtsx_pci_remove()
1603 spin_unlock_irq(&pcr->lock); in rtsx_pci_remove()
1605 cancel_delayed_work_sync(&pcr->carddet_work); in rtsx_pci_remove()
1609 dma_free_coherent(&(pcr->pci->dev), RTSX_RESV_BUF_LEN, in rtsx_pci_remove()
1610 pcr->rtsx_resv_buf, pcr->rtsx_resv_buf_addr); in rtsx_pci_remove()
1611 free_irq(pcr->irq, (void *)pcr); in rtsx_pci_remove()
1612 if (pcr->msi_en) in rtsx_pci_remove()
1613 pci_disable_msi(pcr->pci); in rtsx_pci_remove()
1614 iounmap(pcr->remap_addr); in rtsx_pci_remove()
1620 idr_remove(&rtsx_pci_idr, pcr->id); in rtsx_pci_remove()
1623 kfree(pcr->slots); in rtsx_pci_remove()
1624 kfree(pcr); in rtsx_pci_remove()
1636 struct rtsx_pcr *pcr = handle->pcr; in rtsx_pci_suspend() local
1640 cancel_delayed_work_sync(&pcr->carddet_work); in rtsx_pci_suspend()
1642 mutex_lock(&pcr->pcr_mutex); in rtsx_pci_suspend()
1644 rtsx_pci_power_off(pcr, HOST_ENTER_S3, false); in rtsx_pci_suspend()
1646 mutex_unlock(&pcr->pcr_mutex); in rtsx_pci_suspend()
1654 struct rtsx_pcr *pcr = handle->pcr; in rtsx_pci_resume() local
1659 mutex_lock(&pcr->pcr_mutex); in rtsx_pci_resume()
1661 ret = rtsx_pci_write_register(pcr, HOST_SLEEP_STATE, 0x03, 0x00); in rtsx_pci_resume()
1665 ret = rtsx_pci_init_hw(pcr); in rtsx_pci_resume()
1670 mutex_unlock(&pcr->pcr_mutex); in rtsx_pci_resume()
1676 static void rtsx_enable_aspm(struct rtsx_pcr *pcr) in rtsx_enable_aspm() argument
1678 if (pcr->ops->set_aspm) in rtsx_enable_aspm()
1679 pcr->ops->set_aspm(pcr, true); in rtsx_enable_aspm()
1681 rtsx_comm_set_aspm(pcr, true); in rtsx_enable_aspm()
1684 static void rtsx_comm_pm_power_saving(struct rtsx_pcr *pcr) in rtsx_comm_pm_power_saving() argument
1686 struct rtsx_cr_option *option = &pcr->option; in rtsx_comm_pm_power_saving()
1691 if (rtsx_check_dev_flag(pcr, L1_SNOOZE_TEST_EN)) in rtsx_comm_pm_power_saving()
1694 rtsx_set_ltr_latency(pcr, latency); in rtsx_comm_pm_power_saving()
1697 if (rtsx_check_dev_flag(pcr, LTR_L1SS_PWR_GATE_EN)) in rtsx_comm_pm_power_saving()
1698 rtsx_set_l1off_sub_cfg_d0(pcr, 0); in rtsx_comm_pm_power_saving()
1700 rtsx_enable_aspm(pcr); in rtsx_comm_pm_power_saving()
1703 static void rtsx_pm_power_saving(struct rtsx_pcr *pcr) in rtsx_pm_power_saving() argument
1705 rtsx_comm_pm_power_saving(pcr); in rtsx_pm_power_saving()
1711 struct rtsx_pcr *pcr = handle->pcr; in rtsx_pci_shutdown() local
1715 rtsx_pci_power_off(pcr, HOST_ENTER_S1, false); in rtsx_pci_shutdown()
1718 free_irq(pcr->irq, (void *)pcr); in rtsx_pci_shutdown()
1719 if (pcr->msi_en) in rtsx_pci_shutdown()
1720 pci_disable_msi(pcr->pci); in rtsx_pci_shutdown()
1727 struct rtsx_pcr *pcr = handle->pcr; in rtsx_pci_runtime_idle() local
1731 mutex_lock(&pcr->pcr_mutex); in rtsx_pci_runtime_idle()
1733 pcr->state = PDEV_STAT_IDLE; in rtsx_pci_runtime_idle()
1735 if (pcr->ops->disable_auto_blink) in rtsx_pci_runtime_idle()
1736 pcr->ops->disable_auto_blink(pcr); in rtsx_pci_runtime_idle()
1737 if (pcr->ops->turn_off_led) in rtsx_pci_runtime_idle()
1738 pcr->ops->turn_off_led(pcr); in rtsx_pci_runtime_idle()
1740 rtsx_pm_power_saving(pcr); in rtsx_pci_runtime_idle()
1742 mutex_unlock(&pcr->pcr_mutex); in rtsx_pci_runtime_idle()
1744 if (pcr->rtd3_en) in rtsx_pci_runtime_idle()
1754 struct rtsx_pcr *pcr = handle->pcr; in rtsx_pci_runtime_suspend() local
1758 cancel_delayed_work_sync(&pcr->carddet_work); in rtsx_pci_runtime_suspend()
1760 mutex_lock(&pcr->pcr_mutex); in rtsx_pci_runtime_suspend()
1761 rtsx_pci_power_off(pcr, HOST_ENTER_S3, true); in rtsx_pci_runtime_suspend()
1763 mutex_unlock(&pcr->pcr_mutex); in rtsx_pci_runtime_suspend()
1772 struct rtsx_pcr *pcr = handle->pcr; in rtsx_pci_runtime_resume() local
1776 mutex_lock(&pcr->pcr_mutex); in rtsx_pci_runtime_resume()
1778 rtsx_pci_write_register(pcr, HOST_SLEEP_STATE, 0x03, 0x00); in rtsx_pci_runtime_resume()
1780 rtsx_pci_init_hw(pcr); in rtsx_pci_runtime_resume()
1782 if (pcr->slots[RTSX_SD_CARD].p_dev != NULL) { in rtsx_pci_runtime_resume()
1783 pcr->slots[RTSX_SD_CARD].card_event( in rtsx_pci_runtime_resume()
1784 pcr->slots[RTSX_SD_CARD].p_dev); in rtsx_pci_runtime_resume()
1787 mutex_unlock(&pcr->pcr_mutex); in rtsx_pci_runtime_resume()