Lines Matching refs:sdhci_readl
353 reg = sdhci_readl(host, SDHCI_TEGRA_VENDOR_CLOCK_CTRL); in tegra_sdhci_set_tap()
380 misc_ctrl = sdhci_readl(host, SDHCI_TEGRA_VENDOR_MISC_CTRL); in tegra_sdhci_reset()
381 clk_ctrl = sdhci_readl(host, SDHCI_TEGRA_VENDOR_CLOCK_CTRL); in tegra_sdhci_reset()
412 pad_ctrl = sdhci_readl(host, SDHCI_TEGRA_SDMEM_COMP_PADCTRL); in tegra_sdhci_reset()
431 val = sdhci_readl(host, SDHCI_TEGRA_SDMEM_COMP_PADCTRL); in tegra_sdhci_configure_cal_pad()
449 reg = sdhci_readl(host, SDHCI_TEGRA_AUTO_CAL_CONFIG); in tegra_sdhci_set_pad_autocal_offset()
494 reg = sdhci_readl(host, in tegra_sdhci_set_padctrl()
558 reg = sdhci_readl(host, SDHCI_TEGRA_AUTO_CAL_CONFIG); in tegra_sdhci_pad_autocalib()
576 reg = sdhci_readl(host, SDHCI_TEGRA_AUTO_CAL_CONFIG); in tegra_sdhci_pad_autocalib()
799 val = sdhci_readl(host, SDHCI_TEGRA_VENDOR_SYS_SW_CTRL); in tegra_sdhci_hs400_enhanced_strobe()
830 val = sdhci_readl(host, SDHCI_TEGRA_VENDOR_CAP_OVERRIDES); in tegra_sdhci_set_dqs_trim()
841 reg = sdhci_readl(host, SDHCI_TEGRA_VENDOR_DLLCAL_CFG); in tegra_sdhci_hs400_dll_cal()
878 val = sdhci_readl(host, SDHCI_VNDR_TUN_CTRL0_0); in tegra_sdhci_tap_correction()
882 tun_status = sdhci_readl(host, SDHCI_TEGRA_VNDR_TUN_STATUS0); in tegra_sdhci_tap_correction()
949 val = sdhci_readl(host, SDHCI_TEGRA_VENDOR_CLOCK_CTRL); in tegra_sdhci_post_tuning()
972 val = sdhci_readl(host, SDHCI_TEGRA_VNDR_TUN_STATUS1); in tegra_sdhci_post_tuning()
1042 val = sdhci_readl(host, SDHCI_VNDR_TUN_CTRL0_0); in tegra_sdhci_set_uhs_signaling()
1307 val = sdhci_readl(host, SDHCI_TEGRA_VENDOR_MISC_CTRL); in tegra_sdhci_set_timeout()