Lines Matching refs:lbc
156 struct fsl_lbc_regs __iomem *lbc = ctrl->regs; in set_addr() local
167 out_be32(&lbc->fbar, page_addr >> 6); in set_addr()
168 out_be32(&lbc->fpar, in set_addr()
177 out_be32(&lbc->fbar, page_addr >> 5); in set_addr()
178 out_be32(&lbc->fpar, in set_addr()
208 struct fsl_lbc_regs __iomem *lbc = ctrl->regs; in fsl_elbc_run_command() local
211 out_be32(&lbc->fmr, priv->fmr | 3); in fsl_elbc_run_command()
213 out_be32(&lbc->mdr, elbc_fcm_ctrl->mdr); in fsl_elbc_run_command()
217 in_be32(&lbc->fmr), in_be32(&lbc->fir), in_be32(&lbc->fcr)); in fsl_elbc_run_command()
221 in_be32(&lbc->fbar), in_be32(&lbc->fpar), in fsl_elbc_run_command()
222 in_be32(&lbc->fbcr), priv->bank); in fsl_elbc_run_command()
226 out_be32(&lbc->lsor, priv->bank); in fsl_elbc_run_command()
234 elbc_fcm_ctrl->mdr = in_be32(&lbc->mdr); in fsl_elbc_run_command()
241 in_be32(&lbc->fir), in_be32(&lbc->fcr), in fsl_elbc_run_command()
252 uint32_t lteccr = in_be32(&lbc->lteccr); in fsl_elbc_run_command()
265 out_be32(&lbc->lteccr, 0x000F000F); /* clear lteccr */ in fsl_elbc_run_command()
279 struct fsl_lbc_regs __iomem *lbc = ctrl->regs; in fsl_elbc_do_read() local
282 out_be32(&lbc->fir, in fsl_elbc_do_read()
289 out_be32(&lbc->fcr, (NAND_CMD_READ0 << FCR_CMD0_SHIFT) | in fsl_elbc_do_read()
292 out_be32(&lbc->fir, in fsl_elbc_do_read()
299 out_be32(&lbc->fcr, NAND_CMD_READOOB << FCR_CMD0_SHIFT); in fsl_elbc_do_read()
301 out_be32(&lbc->fcr, NAND_CMD_READ0 << FCR_CMD0_SHIFT); in fsl_elbc_do_read()
313 struct fsl_lbc_regs __iomem *lbc = ctrl->regs; in fsl_elbc_cmdfunc() local
333 out_be32(&lbc->fbcr, 0); /* read entire page to enable ECC */ in fsl_elbc_cmdfunc()
358 out_be32(&lbc->fbcr, mtd->oobsize - column); in fsl_elbc_cmdfunc()
371 out_be32(&lbc->fir, (FIR_OP_CM0 << FIR_OP0_SHIFT) | in fsl_elbc_cmdfunc()
374 out_be32(&lbc->fcr, command << FCR_CMD0_SHIFT); in fsl_elbc_cmdfunc()
379 out_be32(&lbc->fbcr, 256); in fsl_elbc_cmdfunc()
399 out_be32(&lbc->fir, in fsl_elbc_cmdfunc()
406 out_be32(&lbc->fcr, in fsl_elbc_cmdfunc()
411 out_be32(&lbc->fbcr, 0); in fsl_elbc_cmdfunc()
443 out_be32(&lbc->fir, in fsl_elbc_cmdfunc()
452 out_be32(&lbc->fir, in fsl_elbc_cmdfunc()
470 out_be32(&lbc->fcr, fcr); in fsl_elbc_cmdfunc()
487 out_be32(&lbc->fbcr, in fsl_elbc_cmdfunc()
490 out_be32(&lbc->fbcr, 0); in fsl_elbc_cmdfunc()
499 out_be32(&lbc->fir, in fsl_elbc_cmdfunc()
502 out_be32(&lbc->fcr, NAND_CMD_STATUS << FCR_CMD0_SHIFT); in fsl_elbc_cmdfunc()
503 out_be32(&lbc->fbcr, 1); in fsl_elbc_cmdfunc()
518 out_be32(&lbc->fir, FIR_OP_CM0 << FIR_OP0_SHIFT); in fsl_elbc_cmdfunc()
519 out_be32(&lbc->fcr, NAND_CMD_RESET << FCR_CMD0_SHIFT); in fsl_elbc_cmdfunc()
682 struct fsl_lbc_regs __iomem *lbc = ctrl->regs; in fsl_elbc_chip_init() local
695 if (in_be32(&lbc->bank[priv->bank].or) & OR_FCM_PGS) in fsl_elbc_chip_init()
726 struct fsl_lbc_regs __iomem *lbc = ctrl->regs; in fsl_elbc_attach_chip() local
736 if ((in_be32(&lbc->bank[priv->bank].br) & BR_DECC) == in fsl_elbc_attach_chip()
769 br = in_be32(&lbc->bank[priv->bank].br) & ~BR_DECC; in fsl_elbc_attach_chip()
771 out_be32(&lbc->bank[priv->bank].br, br | BR_DECC_CHK_GEN); in fsl_elbc_attach_chip()
773 out_be32(&lbc->bank[priv->bank].br, br | BR_DECC_OFF); in fsl_elbc_attach_chip()
822 clrbits32(&lbc->bank[priv->bank].or, OR_FCM_PGS); in fsl_elbc_attach_chip()
825 setbits32(&lbc->bank[priv->bank].or, OR_FCM_PGS); in fsl_elbc_attach_chip()
859 struct fsl_lbc_regs __iomem *lbc; in fsl_elbc_nand_probe() local
873 lbc = fsl_lbc_ctrl_dev->regs; in fsl_elbc_nand_probe()
885 if ((in_be32(&lbc->bank[bank].br) & BR_V) && in fsl_elbc_nand_probe()
886 (in_be32(&lbc->bank[bank].br) & BR_MSEL) == BR_MS_FCM && in fsl_elbc_nand_probe()
887 (in_be32(&lbc->bank[bank].br) & in fsl_elbc_nand_probe()
888 in_be32(&lbc->bank[bank].or) & BR_BA) in fsl_elbc_nand_probe()