Lines Matching refs:phy
84 static int set_phy_regs(struct cphy *phy, const struct reg_val *rv) in set_phy_regs() argument
90 err = t3_mdio_write(phy, rv->mmd_addr, rv->reg_addr, in set_phy_regs()
93 err = t3_mdio_change_bits(phy, rv->mmd_addr, in set_phy_regs()
100 static void ael100x_txon(struct cphy *phy) in ael100x_txon() argument
103 phy->mdio.prtad == 0 ? F_GPIO7_OUT_VAL : F_GPIO2_OUT_VAL; in ael100x_txon()
106 t3_set_reg_field(phy->adapter, A_T3DBG_GPIO_EN, 0, tx_on_gpio); in ael100x_txon()
113 static int ael_i2c_rd(struct cphy *phy, int dev_addr, int word_addr) in ael_i2c_rd() argument
118 err = t3_mdio_write(phy, MDIO_MMD_PMAPMD, AEL_I2C_CTRL, in ael_i2c_rd()
125 err = t3_mdio_read(phy, MDIO_MMD_PMAPMD, AEL_I2C_STAT, &stat); in ael_i2c_rd()
129 err = t3_mdio_read(phy, MDIO_MMD_PMAPMD, AEL_I2C_DATA, in ael_i2c_rd()
136 CH_WARN(phy->adapter, "PHY %u i2c read of dev.addr %#x.%#x timed out\n", in ael_i2c_rd()
137 phy->mdio.prtad, dev_addr, word_addr); in ael_i2c_rd()
141 static int ael1002_power_down(struct cphy *phy, int enable) in ael1002_power_down() argument
145 err = t3_mdio_write(phy, MDIO_MMD_PMAPMD, MDIO_PMA_TXDIS, !!enable); in ael1002_power_down()
147 err = mdio_set_flag(&phy->mdio, phy->mdio.prtad, in ael1002_power_down()
153 static int ael1002_reset(struct cphy *phy, int wait) in ael1002_reset() argument
157 if ((err = ael1002_power_down(phy, 0)) || in ael1002_reset()
158 (err = t3_mdio_write(phy, MDIO_MMD_PMAPMD, AEL100X_TX_CONFIG1, 1)) || in ael1002_reset()
159 (err = t3_mdio_write(phy, MDIO_MMD_PMAPMD, AEL1002_PWR_DOWN_HI, 0)) || in ael1002_reset()
160 (err = t3_mdio_write(phy, MDIO_MMD_PMAPMD, AEL1002_PWR_DOWN_LO, 0)) || in ael1002_reset()
161 (err = t3_mdio_write(phy, MDIO_MMD_PMAPMD, AEL1002_XFI_EQL, 0x18)) || in ael1002_reset()
162 (err = t3_mdio_change_bits(phy, MDIO_MMD_PMAPMD, AEL1002_LB_EN, in ael1002_reset()
168 static int ael1002_intr_noop(struct cphy *phy) in ael1002_intr_noop() argument
176 static int get_link_status_r(struct cphy *phy, int *link_ok, int *speed, in get_link_status_r() argument
181 int err = t3_mdio_read(phy, MDIO_MMD_PMAPMD, in get_link_status_r()
185 err = t3_mdio_read(phy, MDIO_MMD_PCS, in get_link_status_r()
188 err = t3_mdio_read(phy, MDIO_MMD_PHYXS, in get_link_status_r()
212 int t3_ael1002_phy_prep(struct cphy *phy, struct adapter *adapter, in t3_ael1002_phy_prep() argument
215 cphy_init(phy, adapter, phy_addr, &ael1002_ops, mdio_ops, in t3_ael1002_phy_prep()
218 ael100x_txon(phy); in t3_ael1002_phy_prep()
222 static int ael1006_reset(struct cphy *phy, int wait) in ael1006_reset() argument
224 return t3_phy_reset(phy, MDIO_MMD_PMAPMD, wait); in ael1006_reset()
238 int t3_ael1006_phy_prep(struct cphy *phy, struct adapter *adapter, in t3_ael1006_phy_prep() argument
241 cphy_init(phy, adapter, phy_addr, &ael1006_ops, mdio_ops, in t3_ael1006_phy_prep()
244 ael100x_txon(phy); in t3_ael1006_phy_prep()
251 static int ael2xxx_get_module_type(struct cphy *phy, int delay_ms) in ael2xxx_get_module_type() argument
259 v = ael_i2c_rd(phy, MODULE_DEV_ADDR, 3); in ael2xxx_get_module_type()
270 v = ael_i2c_rd(phy, MODULE_DEV_ADDR, 6); in ael2xxx_get_module_type()
276 v = ael_i2c_rd(phy, MODULE_DEV_ADDR, 10); in ael2xxx_get_module_type()
281 v = ael_i2c_rd(phy, MODULE_DEV_ADDR, 0x12); in ael2xxx_get_module_type()
293 static int ael2005_setup_sr_edc(struct cphy *phy) in ael2005_setup_sr_edc() argument
304 err = set_phy_regs(phy, regs); in ael2005_setup_sr_edc()
310 if (phy->priv != edc_sr) in ael2005_setup_sr_edc()
311 err = t3_get_edc_fw(phy, EDC_OPT_AEL2005, in ael2005_setup_sr_edc()
317 err = t3_mdio_write(phy, MDIO_MMD_PMAPMD, in ael2005_setup_sr_edc()
318 phy->phy_cache[i], in ael2005_setup_sr_edc()
319 phy->phy_cache[i + 1]); in ael2005_setup_sr_edc()
321 phy->priv = edc_sr; in ael2005_setup_sr_edc()
325 static int ael2005_setup_twinax_edc(struct cphy *phy, int modtype) in ael2005_setup_twinax_edc() argument
338 err = set_phy_regs(phy, regs); in ael2005_setup_twinax_edc()
340 err = set_phy_regs(phy, preemphasis); in ael2005_setup_twinax_edc()
346 if (phy->priv != edc_twinax) in ael2005_setup_twinax_edc()
347 err = t3_get_edc_fw(phy, EDC_TWX_AEL2005, in ael2005_setup_twinax_edc()
353 err = t3_mdio_write(phy, MDIO_MMD_PMAPMD, in ael2005_setup_twinax_edc()
354 phy->phy_cache[i], in ael2005_setup_twinax_edc()
355 phy->phy_cache[i + 1]); in ael2005_setup_twinax_edc()
357 phy->priv = edc_twinax; in ael2005_setup_twinax_edc()
361 static int ael2005_get_module_type(struct cphy *phy, int delay_ms) in ael2005_get_module_type() argument
366 v = t3_mdio_read(phy, MDIO_MMD_PMAPMD, AEL2005_GPIO_CTRL, &stat); in ael2005_get_module_type()
373 return ael2xxx_get_module_type(phy, delay_ms); in ael2005_get_module_type()
376 static int ael2005_intr_enable(struct cphy *phy) in ael2005_intr_enable() argument
378 int err = t3_mdio_write(phy, MDIO_MMD_PMAPMD, AEL2005_GPIO_CTRL, 0x200); in ael2005_intr_enable()
379 return err ? err : t3_phy_lasi_intr_enable(phy); in ael2005_intr_enable()
382 static int ael2005_intr_disable(struct cphy *phy) in ael2005_intr_disable() argument
384 int err = t3_mdio_write(phy, MDIO_MMD_PMAPMD, AEL2005_GPIO_CTRL, 0x100); in ael2005_intr_disable()
385 return err ? err : t3_phy_lasi_intr_disable(phy); in ael2005_intr_disable()
388 static int ael2005_intr_clear(struct cphy *phy) in ael2005_intr_clear() argument
390 int err = t3_mdio_write(phy, MDIO_MMD_PMAPMD, AEL2005_GPIO_CTRL, 0xd00); in ael2005_intr_clear()
391 return err ? err : t3_phy_lasi_intr_clear(phy); in ael2005_intr_clear()
394 static int ael2005_reset(struct cphy *phy, int wait) in ael2005_reset() argument
415 err = t3_mdio_read(phy, MDIO_MMD_PMAPMD, MDIO_PMA_LASI_CTRL, in ael2005_reset()
420 err = t3_phy_reset(phy, MDIO_MMD_PMAPMD, 0); in ael2005_reset()
425 phy->priv = edc_none; in ael2005_reset()
426 err = set_phy_regs(phy, regs0); in ael2005_reset()
432 err = ael2005_get_module_type(phy, 0); in ael2005_reset()
435 phy->modtype = err; in ael2005_reset()
438 err = ael2005_setup_twinax_edc(phy, err); in ael2005_reset()
440 err = ael2005_setup_sr_edc(phy); in ael2005_reset()
444 err = set_phy_regs(phy, regs1); in ael2005_reset()
450 err = ael2005_intr_enable(phy); in ael2005_reset()
454 static int ael2005_intr_handler(struct cphy *phy) in ael2005_intr_handler() argument
459 ret = t3_mdio_read(phy, MDIO_MMD_PMAPMD, AEL2005_GPIO_STAT, &stat); in ael2005_intr_handler()
464 ret = t3_mdio_write(phy, MDIO_MMD_PMAPMD, AEL2005_GPIO_CTRL, in ael2005_intr_handler()
470 ret = ael2005_get_module_type(phy, 300); in ael2005_intr_handler()
474 phy->modtype = ret; in ael2005_intr_handler()
476 edc_needed = phy->priv; /* on unplug retain EDC */ in ael2005_intr_handler()
483 if (edc_needed != phy->priv) { in ael2005_intr_handler()
484 ret = ael2005_reset(phy, 0); in ael2005_intr_handler()
490 ret = t3_phy_lasi_intr_handler(phy); in ael2005_intr_handler()
509 int t3_ael2005_phy_prep(struct cphy *phy, struct adapter *adapter, in t3_ael2005_phy_prep() argument
512 cphy_init(phy, adapter, phy_addr, &ael2005_ops, mdio_ops, in t3_ael2005_phy_prep()
516 return t3_mdio_change_bits(phy, MDIO_MMD_PMAPMD, AEL_OPT_SETTINGS, 0, in t3_ael2005_phy_prep()
523 static int ael2020_setup_sr_edc(struct cphy *phy) in ael2020_setup_sr_edc() argument
539 err = set_phy_regs(phy, regs); in ael2020_setup_sr_edc()
544 phy->priv = edc_sr; in ael2020_setup_sr_edc()
551 static int ael2020_setup_twinax_edc(struct cphy *phy, int modtype) in ael2020_setup_twinax_edc() argument
575 err = set_phy_regs(phy, uCclock40MHz); in ael2020_setup_twinax_edc()
579 err = set_phy_regs(phy, uCclockActivate); in ael2020_setup_twinax_edc()
584 if (phy->priv != edc_twinax) in ael2020_setup_twinax_edc()
585 err = t3_get_edc_fw(phy, EDC_TWX_AEL2020, in ael2020_setup_twinax_edc()
591 err = t3_mdio_write(phy, MDIO_MMD_PMAPMD, in ael2020_setup_twinax_edc()
592 phy->phy_cache[i], in ael2020_setup_twinax_edc()
593 phy->phy_cache[i + 1]); in ael2020_setup_twinax_edc()
595 err = set_phy_regs(phy, uCactivate); in ael2020_setup_twinax_edc()
597 phy->priv = edc_twinax; in ael2020_setup_twinax_edc()
604 static int ael2020_get_module_type(struct cphy *phy, int delay_ms) in ael2020_get_module_type() argument
609 v = t3_mdio_read(phy, MDIO_MMD_PMAPMD, AEL2020_GPIO_STAT, &stat); in ael2020_get_module_type()
618 return ael2xxx_get_module_type(phy, delay_ms); in ael2020_get_module_type()
625 static int ael2020_intr_enable(struct cphy *phy) in ael2020_intr_enable() argument
644 err = set_phy_regs(phy, regs); in ael2020_intr_enable()
648 err = get_link_status_r(phy, &link_ok, NULL, NULL, NULL); in ael2020_intr_enable()
652 t3_link_changed(phy->adapter, in ael2020_intr_enable()
653 phy2portid(phy)); in ael2020_intr_enable()
655 err = t3_phy_lasi_intr_enable(phy); in ael2020_intr_enable()
665 static int ael2020_intr_disable(struct cphy *phy) in ael2020_intr_disable() argument
682 err = set_phy_regs(phy, regs); in ael2020_intr_disable()
686 return t3_phy_lasi_intr_disable(phy); in ael2020_intr_disable()
692 static int ael2020_intr_clear(struct cphy *phy) in ael2020_intr_clear() argument
700 int err = t3_mdio_read(phy, MDIO_MMD_PMAPMD, AEL2020_GPIO_INTR, &stat); in ael2020_intr_clear()
701 return err ? err : t3_phy_lasi_intr_clear(phy); in ael2020_intr_clear()
722 static int ael2020_reset(struct cphy *phy, int wait) in ael2020_reset() argument
728 err = t3_mdio_read(phy, MDIO_MMD_PMAPMD, MDIO_PMA_LASI_CTRL, in ael2020_reset()
733 err = t3_phy_reset(phy, MDIO_MMD_PMAPMD, 125); in ael2020_reset()
739 phy->priv = edc_none; in ael2020_reset()
740 err = set_phy_regs(phy, ael2020_reset_regs); in ael2020_reset()
745 err = ael2020_get_module_type(phy, 0); in ael2020_reset()
748 phy->modtype = (u8)err; in ael2020_reset()
750 err = ael2020_setup_twinax_edc(phy, err); in ael2020_reset()
752 err = ael2020_setup_sr_edc(phy); in ael2020_reset()
758 err = ael2005_intr_enable(phy); in ael2020_reset()
765 static int ael2020_intr_handler(struct cphy *phy) in ael2020_intr_handler() argument
770 ret = t3_mdio_read(phy, MDIO_MMD_PMAPMD, AEL2020_GPIO_INTR, &stat); in ael2020_intr_handler()
776 ret = ael2020_get_module_type(phy, 300); in ael2020_intr_handler()
780 phy->modtype = (u8)ret; in ael2020_intr_handler()
782 edc_needed = phy->priv; /* on unplug retain EDC */ in ael2020_intr_handler()
789 if (edc_needed != phy->priv) { in ael2020_intr_handler()
790 ret = ael2020_reset(phy, 0); in ael2020_intr_handler()
796 ret = t3_phy_lasi_intr_handler(phy); in ael2020_intr_handler()
815 int t3_ael2020_phy_prep(struct cphy *phy, struct adapter *adapter, int phy_addr, in t3_ael2020_phy_prep() argument
818 cphy_init(phy, adapter, phy_addr, &ael2020_ops, mdio_ops, in t3_ael2020_phy_prep()
823 return set_phy_regs(phy, ael2020_reset_regs); in t3_ael2020_phy_prep()
829 static int get_link_status_x(struct cphy *phy, int *link_ok, int *speed, in get_link_status_x() argument
834 int err = t3_mdio_read(phy, MDIO_MMD_PMAPMD, in get_link_status_x()
838 err = t3_mdio_read(phy, MDIO_MMD_PCS, in get_link_status_x()
841 err = t3_mdio_read(phy, MDIO_MMD_PHYXS, in get_link_status_x()
865 int t3_qt2045_phy_prep(struct cphy *phy, struct adapter *adapter, in t3_qt2045_phy_prep() argument
870 cphy_init(phy, adapter, phy_addr, &qt2045_ops, mdio_ops, in t3_qt2045_phy_prep()
879 !t3_mdio_read(phy, MDIO_MMD_PMAPMD, MDIO_STAT1, &stat) && in t3_qt2045_phy_prep()
881 phy->mdio.prtad = 1; in t3_qt2045_phy_prep()
885 static int xaui_direct_reset(struct cphy *phy, int wait) in xaui_direct_reset() argument
890 static int xaui_direct_get_link_status(struct cphy *phy, int *link_ok, in xaui_direct_get_link_status() argument
895 int prtad = phy->mdio.prtad; in xaui_direct_get_link_status()
897 status = t3_read_reg(phy->adapter, in xaui_direct_get_link_status()
899 t3_read_reg(phy->adapter, in xaui_direct_get_link_status()
901 t3_read_reg(phy->adapter, in xaui_direct_get_link_status()
903 t3_read_reg(phy->adapter, in xaui_direct_get_link_status()
914 static int xaui_direct_power_down(struct cphy *phy, int enable) in xaui_direct_power_down() argument
929 int t3_xaui_direct_phy_prep(struct cphy *phy, struct adapter *adapter, in t3_xaui_direct_phy_prep() argument
932 cphy_init(phy, adapter, phy_addr, &xaui_direct_ops, mdio_ops, in t3_xaui_direct_phy_prep()