Lines Matching refs:tmp_reg
683 u32 tmp_reg; in dma_init() local
688 tmp_reg = (DMA_STATUS_BUS_ERR | DMA_STATUS_READ_ECC | in dma_init()
690 iowrite32be(ioread32be(&dma_rg->fmdmsr) | tmp_reg, &dma_rg->fmdmsr); in dma_init()
693 tmp_reg = 0; in dma_init()
694 tmp_reg |= cfg->dma_cache_override << DMA_MODE_CACHE_OR_SHIFT; in dma_init()
696 tmp_reg |= DMA_MODE_BER; in dma_init()
700 tmp_reg |= DMA_MODE_ECC; in dma_init()
702 tmp_reg |= (DMA_MODE_AXI_DBG_MASK & in dma_init()
706 tmp_reg |= (((cfg->dma_cam_num_of_entries / DMA_CAM_UNITS) - 1) & in dma_init()
708 tmp_reg |= DMA_MODE_SECURE_PROT; in dma_init()
709 tmp_reg |= cfg->dma_dbg_cnt_mode << DMA_MODE_DBG_SHIFT; in dma_init()
710 tmp_reg |= cfg->dma_aid_mode << DMA_MODE_AID_MODE_SHIFT; in dma_init()
712 iowrite32be(tmp_reg, &dma_rg->fmdmmr); in dma_init()
715 tmp_reg = ((u32)cfg->dma_comm_qtsh_asrt_emer << in dma_init()
717 tmp_reg |= (cfg->dma_read_buf_tsh_asrt_emer & in dma_init()
719 tmp_reg |= cfg->dma_write_buf_tsh_asrt_emer & in dma_init()
722 iowrite32be(tmp_reg, &dma_rg->fmdmtr); in dma_init()
725 tmp_reg = ((u32)cfg->dma_comm_qtsh_clr_emer << in dma_init()
727 tmp_reg |= (cfg->dma_read_buf_tsh_clr_emer & in dma_init()
729 tmp_reg |= cfg->dma_write_buf_tsh_clr_emer & in dma_init()
732 iowrite32be(tmp_reg, &dma_rg->fmdmhy); in dma_init()
789 u32 tmp_reg; in fpm_init() local
794 tmp_reg = (u32)(cfg->disp_limit_tsh << FPM_DISP_LIMIT_SHIFT); in fpm_init()
795 iowrite32be(tmp_reg, &fpm_rg->fmfp_mxd); in fpm_init()
797 tmp_reg = (((u32)cfg->prs_disp_tsh << FPM_THR1_PRS_SHIFT) | in fpm_init()
801 iowrite32be(tmp_reg, &fpm_rg->fmfp_dist1); in fpm_init()
803 tmp_reg = in fpm_init()
808 iowrite32be(tmp_reg, &fpm_rg->fmfp_dist2); in fpm_init()
811 tmp_reg = 0; in fpm_init()
813 tmp_reg |= (FPM_EV_MASK_STALL | FPM_EV_MASK_DOUBLE_ECC | in fpm_init()
817 tmp_reg |= FPM_EV_MASK_STALL_EN; in fpm_init()
819 tmp_reg |= FPM_EV_MASK_SINGLE_ECC_EN; in fpm_init()
821 tmp_reg |= FPM_EV_MASK_DOUBLE_ECC_EN; in fpm_init()
822 tmp_reg |= (cfg->catastrophic_err << FPM_EV_MASK_CAT_ERR_SHIFT); in fpm_init()
823 tmp_reg |= (cfg->dma_err << FPM_EV_MASK_DMA_ERR_SHIFT); in fpm_init()
825 tmp_reg |= FPM_EV_MASK_EXTERNAL_HALT; in fpm_init()
827 tmp_reg |= FPM_EV_MASK_ECC_ERR_HALT; in fpm_init()
828 iowrite32be(tmp_reg, &fpm_rg->fmfp_ee); in fpm_init()
839 tmp_reg = (FPM_RAM_MURAM_ECC | FPM_RAM_IRAM_ECC); in fpm_init()
841 iowrite32be(tmp_reg, &fpm_rg->fm_rcr); in fpm_init()
843 tmp_reg = 0; in fpm_init()
845 tmp_reg |= FPM_IRAM_ECC_ERR_EX_EN; in fpm_init()
849 tmp_reg |= FPM_MURAM_ECC_ERR_EX_EN; in fpm_init()
852 iowrite32be(tmp_reg, &fpm_rg->fm_rie); in fpm_init()
858 u32 tmp_reg; in bmi_init() local
863 tmp_reg = cfg->fifo_base_addr; in bmi_init()
864 tmp_reg = tmp_reg / BMI_FIFO_ALIGN; in bmi_init()
866 tmp_reg |= ((cfg->total_fifo_size / FMAN_BMI_FIFO_UNITS - 1) << in bmi_init()
868 iowrite32be(tmp_reg, &bmi_rg->fmbm_cfg1); in bmi_init()
870 tmp_reg = ((cfg->total_num_of_tasks - 1) & BMI_CFG2_TASKS_MASK) << in bmi_init()
873 iowrite32be(tmp_reg, &bmi_rg->fmbm_cfg2); in bmi_init()
876 tmp_reg = 0; in bmi_init()
883 tmp_reg |= BMI_ERR_INTR_EN_LIST_RAM_ECC; in bmi_init()
885 tmp_reg |= BMI_ERR_INTR_EN_STORAGE_PROFILE_ECC; in bmi_init()
887 tmp_reg |= BMI_ERR_INTR_EN_STATISTICS_RAM_ECC; in bmi_init()
889 tmp_reg |= BMI_ERR_INTR_EN_DISPATCH_RAM_ECC; in bmi_init()
890 iowrite32be(tmp_reg, &bmi_rg->fmbm_ier); in bmi_init()
896 u32 tmp_reg; in qmi_init() local
904 tmp_reg = 0; in qmi_init()
906 tmp_reg |= QMI_ERR_INTR_EN_DEQ_FROM_DEF; in qmi_init()
908 tmp_reg |= QMI_ERR_INTR_EN_DOUBLE_ECC; in qmi_init()
910 iowrite32be(tmp_reg, &qmi_rg->fmqm_eien); in qmi_init()
912 tmp_reg = 0; in qmi_init()
916 tmp_reg |= QMI_INTR_EN_SINGLE_ECC; in qmi_init()
918 iowrite32be(tmp_reg, &qmi_rg->fmqm_ien); in qmi_init()