Lines Matching refs:arq
27 hw->aq.arq.tail = I40E_VF_ARQT1; in i40e_adminq_init_regs()
28 hw->aq.arq.head = I40E_VF_ARQH1; in i40e_adminq_init_regs()
29 hw->aq.arq.len = I40E_VF_ARQLEN1; in i40e_adminq_init_regs()
30 hw->aq.arq.bal = I40E_VF_ARQBAL1; in i40e_adminq_init_regs()
31 hw->aq.arq.bah = I40E_VF_ARQBAH1; in i40e_adminq_init_regs()
38 hw->aq.arq.tail = I40E_PF_ARQT; in i40e_adminq_init_regs()
39 hw->aq.arq.head = I40E_PF_ARQH; in i40e_adminq_init_regs()
40 hw->aq.arq.len = I40E_PF_ARQLEN; in i40e_adminq_init_regs()
41 hw->aq.arq.bal = I40E_PF_ARQBAL; in i40e_adminq_init_regs()
42 hw->aq.arq.bah = I40E_PF_ARQBAH; in i40e_adminq_init_regs()
81 ret_code = i40e_allocate_dma_mem(hw, &hw->aq.arq.desc_buf, in i40e_alloc_adminq_arq_ring()
111 i40e_free_dma_mem(hw, &hw->aq.arq.desc_buf); in i40e_free_adminq_arq()
130 ret_code = i40e_allocate_virt_mem(hw, &hw->aq.arq.dma_head, in i40e_alloc_arq_bufs()
134 hw->aq.arq.r.arq_bi = (struct i40e_dma_mem *)hw->aq.arq.dma_head.va; in i40e_alloc_arq_bufs()
138 bi = &hw->aq.arq.r.arq_bi[i]; in i40e_alloc_arq_bufs()
147 desc = I40E_ADMINQ_DESC(hw->aq.arq, i); in i40e_alloc_arq_bufs()
175 i40e_free_dma_mem(hw, &hw->aq.arq.r.arq_bi[i]); in i40e_alloc_arq_bufs()
176 i40e_free_virt_mem(hw, &hw->aq.arq.dma_head); in i40e_alloc_arq_bufs()
231 i40e_free_dma_mem(hw, &hw->aq.arq.r.arq_bi[i]); in i40e_free_arq_bufs()
234 i40e_free_dma_mem(hw, &hw->aq.arq.desc_buf); in i40e_free_arq_bufs()
237 i40e_free_virt_mem(hw, &hw->aq.arq.dma_head); in i40e_free_arq_bufs()
304 wr32(hw, hw->aq.arq.head, 0); in i40e_config_arq_regs()
305 wr32(hw, hw->aq.arq.tail, 0); in i40e_config_arq_regs()
308 wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries | in i40e_config_arq_regs()
310 wr32(hw, hw->aq.arq.bal, lower_32_bits(hw->aq.arq.desc_buf.pa)); in i40e_config_arq_regs()
311 wr32(hw, hw->aq.arq.bah, upper_32_bits(hw->aq.arq.desc_buf.pa)); in i40e_config_arq_regs()
314 wr32(hw, hw->aq.arq.tail, hw->aq.num_arq_entries - 1); in i40e_config_arq_regs()
317 reg = rd32(hw, hw->aq.arq.bal); in i40e_config_arq_regs()
318 if (reg != lower_32_bits(hw->aq.arq.desc_buf.pa)) in i40e_config_arq_regs()
400 if (hw->aq.arq.count > 0) { in i40e_init_arq()
413 hw->aq.arq.next_to_use = 0; in i40e_init_arq()
414 hw->aq.arq.next_to_clean = 0; in i40e_init_arq()
432 hw->aq.arq.count = hw->aq.num_arq_entries; in i40e_init_arq()
488 if (hw->aq.arq.count == 0) { in i40e_shutdown_arq()
494 wr32(hw, hw->aq.arq.head, 0); in i40e_shutdown_arq()
495 wr32(hw, hw->aq.arq.tail, 0); in i40e_shutdown_arq()
496 wr32(hw, hw->aq.arq.len, 0); in i40e_shutdown_arq()
497 wr32(hw, hw->aq.arq.bal, 0); in i40e_shutdown_arq()
498 wr32(hw, hw->aq.arq.bah, 0); in i40e_shutdown_arq()
500 hw->aq.arq.count = 0; /* to indicate uninitialized queue */ in i40e_shutdown_arq()
1091 u16 ntc = hw->aq.arq.next_to_clean; in i40e_clean_arq_element()
1106 if (hw->aq.arq.count == 0) { in i40e_clean_arq_element()
1114 ntu = rd32(hw, hw->aq.arq.head) & I40E_PF_ARQH_ARQH_MASK; in i40e_clean_arq_element()
1122 desc = I40E_ADMINQ_DESC(hw->aq.arq, ntc); in i40e_clean_arq_element()
1140 memcpy(e->msg_buf, hw->aq.arq.r.arq_bi[desc_idx].va, in i40e_clean_arq_element()
1151 bi = &hw->aq.arq.r.arq_bi[ntc]; in i40e_clean_arq_element()
1162 wr32(hw, hw->aq.arq.tail, ntc); in i40e_clean_arq_element()
1167 hw->aq.arq.next_to_clean = ntc; in i40e_clean_arq_element()
1168 hw->aq.arq.next_to_use = ntu; in i40e_clean_arq_element()
1174 *pending = (ntc > ntu ? hw->aq.arq.count : 0) + (ntu - ntc); in i40e_clean_arq_element()
1189 hw->aq.arq.next_to_use = 0; in i40e_resume_aq()
1190 hw->aq.arq.next_to_clean = 0; in i40e_resume_aq()