Lines Matching refs:rd32
30 nsec = rd32(IGC_SYSTIML); in igc_ptp_read()
31 sec = rd32(IGC_SYSTIMH); in igc_ptp_read()
102 ts->tv_nsec = rd32(IGC_SYSTIML); in igc_ptp_gettimex64_i225()
103 ts->tv_sec = rd32(IGC_SYSTIMH); in igc_ptp_gettimex64_i225()
177 ctrl = rd32(IGC_CTRL); in igc_pin_perout()
178 ctrl_ext = rd32(IGC_CTRL_EXT); in igc_pin_perout()
179 tssdp = rd32(IGC_TSSDP); in igc_pin_perout()
223 ctrl = rd32(IGC_CTRL); in igc_pin_extts()
224 ctrl_ext = rd32(IGC_CTRL_EXT); in igc_pin_extts()
225 tssdp = rd32(IGC_TSSDP); in igc_pin_extts()
286 tsauxc = rd32(IGC_TSAUXC); in igc_ptp_feature_enable_i225()
287 tsim = rd32(IGC_TSIM); in igc_ptp_feature_enable_i225()
347 tsauxc = rd32(IGC_TSAUXC); in igc_ptp_feature_enable_i225()
348 tsim = rd32(IGC_TSIM); in igc_ptp_feature_enable_i225()
381 tsim = rd32(IGC_TSIM); in igc_ptp_feature_enable_i225()
504 val = rd32(IGC_SRRCTL(i)); in igc_ptp_disable_rx_timestamp()
509 val = rd32(IGC_RXPBS); in igc_ptp_disable_rx_timestamp()
520 val = rd32(IGC_RXPBS); in igc_ptp_enable_rx_timestamp()
525 val = rd32(IGC_SRRCTL(i)); in igc_ptp_enable_rx_timestamp()
553 rd32(IGC_TXSTMPL); in igc_ptp_enable_tx_timestamp()
554 rd32(IGC_TXSTMPH); in igc_ptp_enable_tx_timestamp()
615 rd32(IGC_TXSTMPH); in igc_ptp_tx_timeout()
656 regval = rd32(IGC_TXSTMPL); in igc_ptp_tx_hwtstamp()
657 regval |= (u64)rd32(IGC_TXSTMPH) << 32; in igc_ptp_tx_hwtstamp()
709 tsynctxctl = rd32(IGC_TSYNCTXCTL); in igc_ptp_tx_work()
847 ctrl = rd32(IGC_PTM_CTRL); in igc_phc_get_syncdevicetime()
859 err = readx_poll_timeout(rd32, IGC_PTM_STAT, stat, in igc_phc_get_syncdevicetime()
886 t1 = ktime_set(rd32(IGC_PTM_T1_TIM0_H), rd32(IGC_PTM_T1_TIM0_L)); in igc_phc_get_syncdevicetime()
888 t2_curr_l = rd32(IGC_PTM_CURR_T2_L); in igc_phc_get_syncdevicetime()
889 t2_curr_h = rd32(IGC_PTM_CURR_T2_H); in igc_phc_get_syncdevicetime()
1005 ctrl = rd32(IGC_PTM_CTRL); in igc_ptm_stop()
1071 timadj = rd32(IGC_TIMADJ); in igc_ptp_reset()