Lines Matching refs:INTR_MASK
2534 RVU_AF_PFAF_MBOX_INT, INTR_MASK(hw->total_pfs)); in rvu_enable_mbox_intr()
2538 INTR_MASK(hw->total_pfs) & ~1ULL); in rvu_enable_mbox_intr()
2776 INTR_MASK(rvu->hw->total_pfs) & ~1ULL); in rvu_unregister_interrupts()
2780 INTR_MASK(rvu->hw->total_pfs) & ~1ULL); in rvu_unregister_interrupts()
2784 INTR_MASK(rvu->hw->total_pfs) & ~1ULL); in rvu_unregister_interrupts()
2871 RVU_AF_PFFLR_INT, INTR_MASK(rvu->hw->total_pfs)); in rvu_register_interrupts()
2874 INTR_MASK(rvu->hw->total_pfs) & ~1ULL); in rvu_register_interrupts()
2891 RVU_AF_PFTRPEND, INTR_MASK(rvu->hw->total_pfs)); in rvu_register_interrupts()
2894 RVU_AF_PFME_INT, INTR_MASK(rvu->hw->total_pfs)); in rvu_register_interrupts()
2897 INTR_MASK(rvu->hw->total_pfs) & ~1ULL); in rvu_register_interrupts()
3044 rvupf_write64(rvu, RVU_PF_VFPF_MBOX_INT_ENA_W1CX(0), INTR_MASK(vfs)); in rvu_disable_afvf_intr()
3045 rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1CX(0), INTR_MASK(vfs)); in rvu_disable_afvf_intr()
3046 rvupf_write64(rvu, RVU_PF_VFME_INT_ENA_W1CX(0), INTR_MASK(vfs)); in rvu_disable_afvf_intr()
3051 INTR_MASK(vfs - 64)); in rvu_disable_afvf_intr()
3052 rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1CX(1), INTR_MASK(vfs - 64)); in rvu_disable_afvf_intr()
3053 rvupf_write64(rvu, RVU_PF_VFME_INT_ENA_W1CX(1), INTR_MASK(vfs - 64)); in rvu_disable_afvf_intr()
3064 rvupf_write64(rvu, RVU_PF_VFPF_MBOX_INTX(0), INTR_MASK(vfs)); in rvu_enable_afvf_intr()
3065 rvupf_write64(rvu, RVU_PF_VFPF_MBOX_INT_ENA_W1SX(0), INTR_MASK(vfs)); in rvu_enable_afvf_intr()
3068 rvupf_write64(rvu, RVU_PF_VFFLR_INTX(0), INTR_MASK(vfs)); in rvu_enable_afvf_intr()
3069 rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1SX(0), INTR_MASK(vfs)); in rvu_enable_afvf_intr()
3070 rvupf_write64(rvu, RVU_PF_VFME_INT_ENA_W1SX(0), INTR_MASK(vfs)); in rvu_enable_afvf_intr()
3076 rvupf_write64(rvu, RVU_PF_VFPF_MBOX_INTX(1), INTR_MASK(vfs - 64)); in rvu_enable_afvf_intr()
3078 INTR_MASK(vfs - 64)); in rvu_enable_afvf_intr()
3080 rvupf_write64(rvu, RVU_PF_VFFLR_INTX(1), INTR_MASK(vfs - 64)); in rvu_enable_afvf_intr()
3081 rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1SX(1), INTR_MASK(vfs - 64)); in rvu_enable_afvf_intr()
3082 rvupf_write64(rvu, RVU_PF_VFME_INT_ENA_W1SX(1), INTR_MASK(vfs - 64)); in rvu_enable_afvf_intr()