Lines Matching refs:pcifunc
418 inline bool is_cgx_config_permitted(struct rvu *rvu, u16 pcifunc) in is_cgx_config_permitted() argument
420 if ((pcifunc & RVU_PFVF_FUNC_MASK) || in is_cgx_config_permitted()
421 !is_pf_cgxmapped(rvu, rvu_get_pf(pcifunc))) in is_cgx_config_permitted()
446 int rvu_cgx_config_rxtx(struct rvu *rvu, u16 pcifunc, bool start) in rvu_cgx_config_rxtx() argument
448 int pf = rvu_get_pf(pcifunc); in rvu_cgx_config_rxtx()
453 if (!is_cgx_config_permitted(rvu, pcifunc)) in rvu_cgx_config_rxtx()
471 void rvu_cgx_disable_dmac_entries(struct rvu *rvu, u16 pcifunc) in rvu_cgx_disable_dmac_entries() argument
473 int pf = rvu_get_pf(pcifunc); in rvu_cgx_disable_dmac_entries()
480 if (!is_cgx_config_permitted(rvu, pcifunc)) in rvu_cgx_disable_dmac_entries()
484 rvu_npc_exact_reset(rvu, pcifunc); in rvu_cgx_disable_dmac_entries()
510 rvu_cgx_config_rxtx(rvu, req->hdr.pcifunc, true); in rvu_mbox_handler_cgx_start_rxtx()
517 rvu_cgx_config_rxtx(rvu, req->hdr.pcifunc, false); in rvu_mbox_handler_cgx_stop_rxtx()
524 int pf = rvu_get_pf(req->hdr.pcifunc); in rvu_lmac_get_stats()
531 if (!is_cgx_config_permitted(rvu, req->hdr.pcifunc)) in rvu_lmac_get_stats()
581 int pf = rvu_get_pf(req->hdr.pcifunc); in rvu_mbox_handler_cgx_fec_stats()
586 if (!is_cgx_config_permitted(rvu, req->hdr.pcifunc)) in rvu_mbox_handler_cgx_fec_stats()
599 int pf = rvu_get_pf(req->hdr.pcifunc); in rvu_mbox_handler_cgx_mac_addr_set()
602 if (!is_cgx_config_permitted(rvu, req->hdr.pcifunc)) in rvu_mbox_handler_cgx_mac_addr_set()
619 int pf = rvu_get_pf(req->hdr.pcifunc); in rvu_mbox_handler_cgx_mac_addr_add()
623 if (!is_cgx_config_permitted(rvu, req->hdr.pcifunc)) in rvu_mbox_handler_cgx_mac_addr_add()
643 int pf = rvu_get_pf(req->hdr.pcifunc); in rvu_mbox_handler_cgx_mac_addr_del()
646 if (!is_cgx_config_permitted(rvu, req->hdr.pcifunc)) in rvu_mbox_handler_cgx_mac_addr_del()
661 int pf = rvu_get_pf(req->hdr.pcifunc); in rvu_mbox_handler_cgx_mac_max_entries_get()
668 if (!is_cgx_config_permitted(rvu, req->hdr.pcifunc)) { in rvu_mbox_handler_cgx_mac_max_entries_get()
687 int pf = rvu_get_pf(req->hdr.pcifunc); in rvu_mbox_handler_cgx_mac_addr_get()
692 if (!is_cgx_config_permitted(rvu, req->hdr.pcifunc)) in rvu_mbox_handler_cgx_mac_addr_get()
708 u16 pcifunc = req->hdr.pcifunc; in rvu_mbox_handler_cgx_promisc_enable() local
709 int pf = rvu_get_pf(pcifunc); in rvu_mbox_handler_cgx_promisc_enable()
712 if (!is_cgx_config_permitted(rvu, req->hdr.pcifunc)) in rvu_mbox_handler_cgx_promisc_enable()
717 return rvu_npc_exact_promisc_enable(rvu, req->hdr.pcifunc); in rvu_mbox_handler_cgx_promisc_enable()
728 int pf = rvu_get_pf(req->hdr.pcifunc); in rvu_mbox_handler_cgx_promisc_disable()
731 if (!is_cgx_config_permitted(rvu, req->hdr.pcifunc)) in rvu_mbox_handler_cgx_promisc_disable()
736 return rvu_npc_exact_promisc_disable(rvu, req->hdr.pcifunc); in rvu_mbox_handler_cgx_promisc_disable()
744 static int rvu_cgx_ptp_rx_cfg(struct rvu *rvu, u16 pcifunc, bool enable) in rvu_cgx_ptp_rx_cfg() argument
746 struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc); in rvu_cgx_ptp_rx_cfg()
747 int pf = rvu_get_pf(pcifunc); in rvu_cgx_ptp_rx_cfg()
758 if ((pcifunc & RVU_PFVF_FUNC_MASK) || in rvu_cgx_ptp_rx_cfg()
771 if (npc_config_ts_kpuaction(rvu, pf, pcifunc, enable)) in rvu_cgx_ptp_rx_cfg()
782 if (!is_pf_cgxmapped(rvu, rvu_get_pf(req->hdr.pcifunc))) in rvu_mbox_handler_cgx_ptp_rx_enable()
785 return rvu_cgx_ptp_rx_cfg(rvu, req->hdr.pcifunc, true); in rvu_mbox_handler_cgx_ptp_rx_enable()
791 return rvu_cgx_ptp_rx_cfg(rvu, req->hdr.pcifunc, false); in rvu_mbox_handler_cgx_ptp_rx_disable()
794 static int rvu_cgx_config_linkevents(struct rvu *rvu, u16 pcifunc, bool en) in rvu_cgx_config_linkevents() argument
796 int pf = rvu_get_pf(pcifunc); in rvu_cgx_config_linkevents()
799 if (!is_cgx_config_permitted(rvu, pcifunc)) in rvu_cgx_config_linkevents()
818 rvu_cgx_config_linkevents(rvu, req->hdr.pcifunc, true); in rvu_mbox_handler_cgx_start_linkevents()
825 rvu_cgx_config_linkevents(rvu, req->hdr.pcifunc, false); in rvu_mbox_handler_cgx_stop_linkevents()
835 pf = rvu_get_pf(req->hdr.pcifunc); in rvu_mbox_handler_cgx_get_linkinfo()
851 int pf = rvu_get_pf(req->hdr.pcifunc); in rvu_mbox_handler_cgx_features_get()
892 static int rvu_cgx_config_intlbk(struct rvu *rvu, u16 pcifunc, bool en) in rvu_cgx_config_intlbk() argument
894 int pf = rvu_get_pf(pcifunc); in rvu_cgx_config_intlbk()
898 if (!is_cgx_config_permitted(rvu, pcifunc)) in rvu_cgx_config_intlbk()
911 rvu_cgx_config_intlbk(rvu, req->hdr.pcifunc, true); in rvu_mbox_handler_cgx_intlbk_enable()
918 rvu_cgx_config_intlbk(rvu, req->hdr.pcifunc, false); in rvu_mbox_handler_cgx_intlbk_disable()
922 int rvu_cgx_cfg_pause_frm(struct rvu *rvu, u16 pcifunc, u8 tx_pause, u8 rx_pause) in rvu_cgx_cfg_pause_frm() argument
924 int pf = rvu_get_pf(pcifunc); in rvu_cgx_cfg_pause_frm()
952 pcifunc & RVU_PFVF_FUNC_MASK)) { in rvu_cgx_cfg_pause_frm()
965 int pf = rvu_get_pf(req->hdr.pcifunc); in rvu_mbox_handler_cgx_cfg_pause_frm()
982 err = rvu_cgx_cfg_pause_frm(rvu, req->hdr.pcifunc, req->tx_pause, req->rx_pause); in rvu_mbox_handler_cgx_cfg_pause_frm()
992 int pf = rvu_get_pf(req->hdr.pcifunc); in rvu_mbox_handler_cgx_get_phy_fec_stats()
1010 u16 pcifunc; in rvu_cgx_nix_cuml_stats() local
1025 pcifunc = pf << RVU_PFVF_PF_SHIFT; in rvu_cgx_nix_cuml_stats()
1026 blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc); in rvu_cgx_nix_cuml_stats()
1033 if (!((block->fn_map[lf] & ~RVU_PFVF_FUNC_MASK) == (pcifunc & in rvu_cgx_nix_cuml_stats()
1047 int rvu_cgx_start_stop_io(struct rvu *rvu, u16 pcifunc, bool start) in rvu_cgx_start_stop_io() argument
1052 if (!is_pf_cgxmapped(rvu, rvu_get_pf(pcifunc))) in rvu_cgx_start_stop_io()
1055 parent_pf = &rvu->pf[rvu_get_pf(pcifunc)]; in rvu_cgx_start_stop_io()
1056 pfvf = rvu_get_pfvf(rvu, pcifunc); in rvu_cgx_start_stop_io()
1077 err = rvu_cgx_config_rxtx(rvu, pcifunc & ~RVU_PFVF_FUNC_MASK, in rvu_cgx_start_stop_io()
1098 int pf = rvu_get_pf(req->hdr.pcifunc); in rvu_mbox_handler_cgx_set_fec_param()
1114 int pf = rvu_get_pf(req->hdr.pcifunc); in rvu_mbox_handler_cgx_get_aux_link_info()
1141 int pf = rvu_get_pf(req->hdr.pcifunc); in rvu_mbox_handler_cgx_set_link_mode()
1145 if (!is_cgx_config_permitted(rvu, req->hdr.pcifunc)) in rvu_mbox_handler_cgx_set_link_mode()
1157 int pf = rvu_get_pf(req->hdr.pcifunc); in rvu_mbox_handler_cgx_mac_addr_reset()
1160 if (!is_cgx_config_permitted(rvu, req->hdr.pcifunc)) in rvu_mbox_handler_cgx_mac_addr_reset()
1175 int pf = rvu_get_pf(req->hdr.pcifunc); in rvu_mbox_handler_cgx_mac_addr_update()
1178 if (!is_cgx_config_permitted(rvu, req->hdr.pcifunc)) in rvu_mbox_handler_cgx_mac_addr_update()
1188 int rvu_cgx_prio_flow_ctrl_cfg(struct rvu *rvu, u16 pcifunc, u8 tx_pause, in rvu_cgx_prio_flow_ctrl_cfg() argument
1191 int pf = rvu_get_pf(pcifunc); in rvu_cgx_prio_flow_ctrl_cfg()
1216 pcifunc & RVU_PFVF_FUNC_MASK)) { in rvu_cgx_prio_flow_ctrl_cfg()
1229 int pf = rvu_get_pf(req->hdr.pcifunc); in rvu_mbox_handler_cgx_prio_flow_ctrl_cfg()
1245 err = rvu_cgx_prio_flow_ctrl_cfg(rvu, req->hdr.pcifunc, req->tx_pause, in rvu_mbox_handler_cgx_prio_flow_ctrl_cfg()