Lines Matching refs:rvu
29 reg = rvu_read64(rvu, blkaddr, CPT_AF_EXEX_STS(e)); \
43 struct rvu *rvu = block->rvu; in cpt_af_flt_intr_handler() local
49 reg = rvu_read64(rvu, blkaddr, CPT_AF_FLTX_INT(vec)); in cpt_af_flt_intr_handler()
50 dev_err_ratelimited(rvu->dev, "Received CPTAF FLT%d irq : 0x%llx", vec, reg); in cpt_af_flt_intr_handler()
65 grp = rvu_read64(rvu, blkaddr, CPT_AF_EXEX_CTL2(eng)) & 0xFF; in cpt_af_flt_intr_handler()
67 rvu_write64(rvu, blkaddr, CPT_AF_EXEX_CTL2(eng), 0x0); in cpt_af_flt_intr_handler()
68 val = rvu_read64(rvu, blkaddr, CPT_AF_EXEX_CTL(eng)); in cpt_af_flt_intr_handler()
69 rvu_write64(rvu, blkaddr, CPT_AF_EXEX_CTL(eng), val & ~1ULL); in cpt_af_flt_intr_handler()
71 rvu_write64(rvu, blkaddr, CPT_AF_EXEX_CTL2(eng), grp); in cpt_af_flt_intr_handler()
72 rvu_write64(rvu, blkaddr, CPT_AF_EXEX_CTL(eng), val | 1ULL); in cpt_af_flt_intr_handler()
74 spin_lock(&rvu->cpt_intr_lock); in cpt_af_flt_intr_handler()
76 val = rvu_read64(rvu, blkaddr, CPT_AF_EXEX_STS(eng)); in cpt_af_flt_intr_handler()
80 spin_unlock(&rvu->cpt_intr_lock); in cpt_af_flt_intr_handler()
82 rvu_write64(rvu, blkaddr, CPT_AF_FLTX_INT(vec), reg); in cpt_af_flt_intr_handler()
105 struct rvu *rvu = block->rvu; in rvu_cpt_af_rvu_intr_handler() local
109 reg = rvu_read64(rvu, blkaddr, CPT_AF_RVU_INT); in rvu_cpt_af_rvu_intr_handler()
110 dev_err_ratelimited(rvu->dev, "Received CPTAF RVU irq : 0x%llx", reg); in rvu_cpt_af_rvu_intr_handler()
112 rvu_write64(rvu, blkaddr, CPT_AF_RVU_INT, reg); in rvu_cpt_af_rvu_intr_handler()
119 struct rvu *rvu = block->rvu; in rvu_cpt_af_ras_intr_handler() local
123 reg = rvu_read64(rvu, blkaddr, CPT_AF_RAS_INT); in rvu_cpt_af_ras_intr_handler()
124 dev_err_ratelimited(rvu->dev, "Received CPTAF RAS irq : 0x%llx", reg); in rvu_cpt_af_ras_intr_handler()
126 rvu_write64(rvu, blkaddr, CPT_AF_RAS_INT, reg); in rvu_cpt_af_ras_intr_handler()
134 struct rvu *rvu = block->rvu; in rvu_cpt_do_register_interrupt() local
137 ret = request_irq(pci_irq_vector(rvu->pdev, irq_offs), handler, 0, in rvu_cpt_do_register_interrupt()
140 dev_err(rvu->dev, "RVUAF: %s irq registration failed", name); in rvu_cpt_do_register_interrupt()
144 WARN_ON(rvu->irq_allocated[irq_offs]); in rvu_cpt_do_register_interrupt()
145 rvu->irq_allocated[irq_offs] = true; in rvu_cpt_do_register_interrupt()
151 struct rvu *rvu = block->rvu; in cpt_10k_unregister_interrupts() local
156 rvu_write64(rvu, blkaddr, CPT_AF_FLTX_INT_ENA_W1C(0), ~0ULL); in cpt_10k_unregister_interrupts()
157 rvu_write64(rvu, blkaddr, CPT_AF_FLTX_INT_ENA_W1C(1), ~0ULL); in cpt_10k_unregister_interrupts()
158 rvu_write64(rvu, blkaddr, CPT_AF_FLTX_INT_ENA_W1C(2), 0xFFFF); in cpt_10k_unregister_interrupts()
160 rvu_write64(rvu, blkaddr, CPT_AF_RVU_INT_ENA_W1C, 0x1); in cpt_10k_unregister_interrupts()
161 rvu_write64(rvu, blkaddr, CPT_AF_RAS_INT_ENA_W1C, 0x1); in cpt_10k_unregister_interrupts()
164 if (rvu->irq_allocated[off + i]) { in cpt_10k_unregister_interrupts()
165 free_irq(pci_irq_vector(rvu->pdev, off + i), block); in cpt_10k_unregister_interrupts()
166 rvu->irq_allocated[off + i] = false; in cpt_10k_unregister_interrupts()
170 static void cpt_unregister_interrupts(struct rvu *rvu, int blkaddr) in cpt_unregister_interrupts() argument
172 struct rvu_hwinfo *hw = rvu->hw; in cpt_unregister_interrupts()
176 if (!is_block_implemented(rvu->hw, blkaddr)) in cpt_unregister_interrupts()
178 offs = rvu_read64(rvu, blkaddr, CPT_PRIV_AF_INT_CFG) & 0x7FF; in cpt_unregister_interrupts()
180 dev_warn(rvu->dev, in cpt_unregister_interrupts()
185 if (!is_rvu_otx2(rvu)) in cpt_unregister_interrupts()
190 rvu_write64(rvu, blkaddr, CPT_AF_FLTX_INT_ENA_W1C(i), ~0ULL); in cpt_unregister_interrupts()
191 rvu_write64(rvu, blkaddr, CPT_AF_RVU_INT_ENA_W1C, 0x1); in cpt_unregister_interrupts()
192 rvu_write64(rvu, blkaddr, CPT_AF_RAS_INT_ENA_W1C, 0x1); in cpt_unregister_interrupts()
195 if (rvu->irq_allocated[offs + i]) { in cpt_unregister_interrupts()
196 free_irq(pci_irq_vector(rvu->pdev, offs + i), block); in cpt_unregister_interrupts()
197 rvu->irq_allocated[offs + i] = false; in cpt_unregister_interrupts()
201 void rvu_cpt_unregister_interrupts(struct rvu *rvu) in rvu_cpt_unregister_interrupts() argument
203 cpt_unregister_interrupts(rvu, BLKADDR_CPT0); in rvu_cpt_unregister_interrupts()
204 cpt_unregister_interrupts(rvu, BLKADDR_CPT1); in rvu_cpt_unregister_interrupts()
209 struct rvu *rvu = block->rvu; in cpt_10k_register_interrupts() local
215 sprintf(&rvu->irq_name[(off + i) * NAME_SIZE], "CPTAF FLT%d", i); in cpt_10k_register_interrupts()
229 flt_fn, &rvu->irq_name[(off + i) * NAME_SIZE]); in cpt_10k_register_interrupts()
233 rvu_write64(rvu, blkaddr, CPT_AF_FLTX_INT_ENA_W1S(i), 0xFFFF); in cpt_10k_register_interrupts()
235 rvu_write64(rvu, blkaddr, CPT_AF_FLTX_INT_ENA_W1S(i), ~0ULL); in cpt_10k_register_interrupts()
243 rvu_write64(rvu, blkaddr, CPT_AF_RVU_INT_ENA_W1S, 0x1); in cpt_10k_register_interrupts()
250 rvu_write64(rvu, blkaddr, CPT_AF_RAS_INT_ENA_W1S, 0x1); in cpt_10k_register_interrupts()
254 rvu_cpt_unregister_interrupts(rvu); in cpt_10k_register_interrupts()
258 static int cpt_register_interrupts(struct rvu *rvu, int blkaddr) in cpt_register_interrupts() argument
260 struct rvu_hwinfo *hw = rvu->hw; in cpt_register_interrupts()
265 if (!is_block_implemented(rvu->hw, blkaddr)) in cpt_register_interrupts()
269 offs = rvu_read64(rvu, blkaddr, CPT_PRIV_AF_INT_CFG) & 0x7FF; in cpt_register_interrupts()
271 dev_warn(rvu->dev, in cpt_register_interrupts()
276 if (!is_rvu_otx2(rvu)) in cpt_register_interrupts()
280 sprintf(&rvu->irq_name[(offs + i) * NAME_SIZE], "CPTAF FLT%d", i); in cpt_register_interrupts()
290 flt_fn, &rvu->irq_name[(offs + i) * NAME_SIZE]); in cpt_register_interrupts()
293 rvu_write64(rvu, blkaddr, CPT_AF_FLTX_INT_ENA_W1S(i), ~0ULL); in cpt_register_interrupts()
301 rvu_write64(rvu, blkaddr, CPT_AF_RVU_INT_ENA_W1S, 0x1); in cpt_register_interrupts()
308 rvu_write64(rvu, blkaddr, CPT_AF_RAS_INT_ENA_W1S, 0x1); in cpt_register_interrupts()
312 rvu_cpt_unregister_interrupts(rvu); in cpt_register_interrupts()
316 int rvu_cpt_register_interrupts(struct rvu *rvu) in rvu_cpt_register_interrupts() argument
320 ret = cpt_register_interrupts(rvu, BLKADDR_CPT0); in rvu_cpt_register_interrupts()
324 return cpt_register_interrupts(rvu, BLKADDR_CPT1); in rvu_cpt_register_interrupts()
327 static int get_cpt_pf_num(struct rvu *rvu) in get_cpt_pf_num() argument
332 domain_nr = pci_domain_nr(rvu->pdev->bus); in get_cpt_pf_num()
333 for (i = 0; i < rvu->hw->total_pfs; i++) { in get_cpt_pf_num()
349 static bool is_cpt_pf(struct rvu *rvu, u16 pcifunc) in is_cpt_pf() argument
351 int cpt_pf_num = rvu->cpt_pf_num; in is_cpt_pf()
361 static bool is_cpt_vf(struct rvu *rvu, u16 pcifunc) in is_cpt_vf() argument
363 int cpt_pf_num = rvu->cpt_pf_num; in is_cpt_vf()
384 int rvu_mbox_handler_cpt_lf_alloc(struct rvu *rvu, in rvu_mbox_handler_cpt_lf_alloc() argument
401 block = &rvu->hw->block[blkaddr]; in rvu_mbox_handler_cpt_lf_alloc()
402 num_lfs = rvu_get_rsrc_mapcount(rvu_get_pfvf(rvu, pcifunc), in rvu_mbox_handler_cpt_lf_alloc()
412 if (!is_pffunc_map_valid(rvu, req->nix_pf_func, BLKTYPE_NIX)) in rvu_mbox_handler_cpt_lf_alloc()
421 if (!is_pffunc_map_valid(rvu, req->sso_pf_func, BLKTYPE_SSO)) in rvu_mbox_handler_cpt_lf_alloc()
426 cptlf = rvu_get_lf(rvu, block, pcifunc, slot); in rvu_mbox_handler_cpt_lf_alloc()
432 if (!is_rvu_otx2(rvu)) { in rvu_mbox_handler_cpt_lf_alloc()
439 rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf), val); in rvu_mbox_handler_cpt_lf_alloc()
444 val = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf)); in rvu_mbox_handler_cpt_lf_alloc()
448 rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf), val); in rvu_mbox_handler_cpt_lf_alloc()
454 static int cpt_lf_free(struct rvu *rvu, struct msg_req *req, int blkaddr) in cpt_lf_free() argument
460 block = &rvu->hw->block[blkaddr]; in cpt_lf_free()
461 num_lfs = rvu_get_rsrc_mapcount(rvu_get_pfvf(rvu, pcifunc), in cpt_lf_free()
467 cptlf = rvu_get_lf(rvu, block, pcifunc, slot); in cpt_lf_free()
472 rvu_cpt_lf_teardown(rvu, pcifunc, blkaddr, cptlf, slot); in cpt_lf_free()
475 err = rvu_lf_reset(rvu, block, cptlf); in cpt_lf_free()
477 dev_err(rvu->dev, "Failed to reset blkaddr %d LF%d\n", in cpt_lf_free()
485 int rvu_mbox_handler_cpt_lf_free(struct rvu *rvu, struct msg_req *req, in rvu_mbox_handler_cpt_lf_free() argument
490 ret = cpt_lf_free(rvu, req, BLKADDR_CPT0); in rvu_mbox_handler_cpt_lf_free()
494 if (is_block_implemented(rvu->hw, BLKADDR_CPT1)) in rvu_mbox_handler_cpt_lf_free()
495 ret = cpt_lf_free(rvu, req, BLKADDR_CPT1); in rvu_mbox_handler_cpt_lf_free()
500 static int cpt_inline_ipsec_cfg_inbound(struct rvu *rvu, int blkaddr, u8 cptlf, in cpt_inline_ipsec_cfg_inbound() argument
507 val = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf)); in cpt_inline_ipsec_cfg_inbound()
516 if (sso_pf_func && !is_pffunc_map_valid(rvu, sso_pf_func, BLKTYPE_SSO)) in cpt_inline_ipsec_cfg_inbound()
527 rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf), val); in cpt_inline_ipsec_cfg_inbound()
531 val = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf)); in cpt_inline_ipsec_cfg_inbound()
534 rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf), val); in cpt_inline_ipsec_cfg_inbound()
538 rvu_write64(rvu, blkaddr, CPT_AF_ECO, 0x1); in cpt_inline_ipsec_cfg_inbound()
543 if (!is_rvu_otx2(rvu)) { in cpt_inline_ipsec_cfg_inbound()
545 val |= (u64)rvu->hw->cpt_chan_base; in cpt_inline_ipsec_cfg_inbound()
547 rvu_write64(rvu, blkaddr, CPT_AF_X2PX_LINK_CFG(0), val); in cpt_inline_ipsec_cfg_inbound()
548 rvu_write64(rvu, blkaddr, CPT_AF_X2PX_LINK_CFG(1), val); in cpt_inline_ipsec_cfg_inbound()
554 static int cpt_inline_ipsec_cfg_outbound(struct rvu *rvu, int blkaddr, u8 cptlf, in cpt_inline_ipsec_cfg_outbound() argument
562 val = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf)); in cpt_inline_ipsec_cfg_outbound()
572 if (nix_pf_func && !is_pffunc_map_valid(rvu, nix_pf_func, BLKTYPE_NIX)) in cpt_inline_ipsec_cfg_outbound()
580 rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf), val); in cpt_inline_ipsec_cfg_outbound()
584 val = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf)); in cpt_inline_ipsec_cfg_outbound()
586 rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf), val); in cpt_inline_ipsec_cfg_outbound()
588 nix_blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, nix_pf_func); in cpt_inline_ipsec_cfg_outbound()
591 val = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf)); in cpt_inline_ipsec_cfg_outbound()
593 rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf), val); in cpt_inline_ipsec_cfg_outbound()
599 int rvu_mbox_handler_cpt_inline_ipsec_cfg(struct rvu *rvu, in rvu_mbox_handler_cpt_inline_ipsec_cfg() argument
608 blkaddr = rvu_get_blkaddr_from_slot(rvu, BLKTYPE_CPT, pcifunc, in rvu_mbox_handler_cpt_inline_ipsec_cfg()
613 block = &rvu->hw->block[blkaddr]; in rvu_mbox_handler_cpt_inline_ipsec_cfg()
615 cptlf = rvu_get_lf(rvu, block, pcifunc, actual_slot); in rvu_mbox_handler_cpt_inline_ipsec_cfg()
621 ret = cpt_inline_ipsec_cfg_inbound(rvu, blkaddr, cptlf, req); in rvu_mbox_handler_cpt_inline_ipsec_cfg()
625 ret = cpt_inline_ipsec_cfg_outbound(rvu, blkaddr, cptlf, req); in rvu_mbox_handler_cpt_inline_ipsec_cfg()
635 static bool is_valid_offset(struct rvu *rvu, struct cpt_rd_wr_reg_msg *req) in is_valid_offset() argument
653 block = &rvu->hw->block[blkaddr]; in is_valid_offset()
654 pfvf = rvu_get_pfvf(rvu, req->hdr.pcifunc); in is_valid_offset()
661 lf = rvu_get_lf(rvu, &rvu->hw->block[blkaddr], in is_valid_offset()
695 int rvu_mbox_handler_cpt_rd_wr_register(struct rvu *rvu, in rvu_mbox_handler_cpt_rd_wr_register() argument
706 if (!is_cpt_pf(rvu, req->hdr.pcifunc) && in rvu_mbox_handler_cpt_rd_wr_register()
707 !is_cpt_vf(rvu, req->hdr.pcifunc)) in rvu_mbox_handler_cpt_rd_wr_register()
714 if (!is_valid_offset(rvu, req)) in rvu_mbox_handler_cpt_rd_wr_register()
718 rvu_write64(rvu, blkaddr, req->reg_offset, req->val); in rvu_mbox_handler_cpt_rd_wr_register()
720 rsp->val = rvu_read64(rvu, blkaddr, req->reg_offset); in rvu_mbox_handler_cpt_rd_wr_register()
725 static void get_ctx_pc(struct rvu *rvu, struct cpt_sts_rsp *rsp, int blkaddr) in get_ctx_pc() argument
727 if (is_rvu_otx2(rvu)) in get_ctx_pc()
730 rsp->ctx_mis_pc = rvu_read64(rvu, blkaddr, CPT_AF_CTX_MIS_PC); in get_ctx_pc()
731 rsp->ctx_hit_pc = rvu_read64(rvu, blkaddr, CPT_AF_CTX_HIT_PC); in get_ctx_pc()
732 rsp->ctx_aop_pc = rvu_read64(rvu, blkaddr, CPT_AF_CTX_AOP_PC); in get_ctx_pc()
733 rsp->ctx_aop_lat_pc = rvu_read64(rvu, blkaddr, in get_ctx_pc()
735 rsp->ctx_ifetch_pc = rvu_read64(rvu, blkaddr, CPT_AF_CTX_IFETCH_PC); in get_ctx_pc()
736 rsp->ctx_ifetch_lat_pc = rvu_read64(rvu, blkaddr, in get_ctx_pc()
738 rsp->ctx_ffetch_pc = rvu_read64(rvu, blkaddr, CPT_AF_CTX_FFETCH_PC); in get_ctx_pc()
739 rsp->ctx_ffetch_lat_pc = rvu_read64(rvu, blkaddr, in get_ctx_pc()
741 rsp->ctx_wback_pc = rvu_read64(rvu, blkaddr, CPT_AF_CTX_FFETCH_PC); in get_ctx_pc()
742 rsp->ctx_wback_lat_pc = rvu_read64(rvu, blkaddr, in get_ctx_pc()
744 rsp->ctx_psh_pc = rvu_read64(rvu, blkaddr, CPT_AF_CTX_FFETCH_PC); in get_ctx_pc()
745 rsp->ctx_psh_lat_pc = rvu_read64(rvu, blkaddr, in get_ctx_pc()
747 rsp->ctx_err = rvu_read64(rvu, blkaddr, CPT_AF_CTX_ERR); in get_ctx_pc()
748 rsp->ctx_enc_id = rvu_read64(rvu, blkaddr, CPT_AF_CTX_ENC_ID); in get_ctx_pc()
749 rsp->ctx_flush_timer = rvu_read64(rvu, blkaddr, CPT_AF_CTX_FLUSH_TIMER); in get_ctx_pc()
751 rsp->rxc_time = rvu_read64(rvu, blkaddr, CPT_AF_RXC_TIME); in get_ctx_pc()
752 rsp->rxc_time_cfg = rvu_read64(rvu, blkaddr, CPT_AF_RXC_TIME_CFG); in get_ctx_pc()
753 rsp->rxc_active_sts = rvu_read64(rvu, blkaddr, CPT_AF_RXC_ACTIVE_STS); in get_ctx_pc()
754 rsp->rxc_zombie_sts = rvu_read64(rvu, blkaddr, CPT_AF_RXC_ZOMBIE_STS); in get_ctx_pc()
755 rsp->rxc_dfrg = rvu_read64(rvu, blkaddr, CPT_AF_RXC_DFRG); in get_ctx_pc()
756 rsp->x2p_link_cfg0 = rvu_read64(rvu, blkaddr, CPT_AF_X2PX_LINK_CFG(0)); in get_ctx_pc()
757 rsp->x2p_link_cfg1 = rvu_read64(rvu, blkaddr, CPT_AF_X2PX_LINK_CFG(1)); in get_ctx_pc()
760 static void get_eng_sts(struct rvu *rvu, struct cpt_sts_rsp *rsp, int blkaddr) in get_eng_sts() argument
766 reg = rvu_read64(rvu, blkaddr, CPT_AF_CONSTANTS1); in get_eng_sts()
785 int rvu_mbox_handler_cpt_sts(struct rvu *rvu, struct cpt_sts_req *req, in rvu_mbox_handler_cpt_sts() argument
795 if (!is_cpt_pf(rvu, req->hdr.pcifunc) && in rvu_mbox_handler_cpt_sts()
796 !is_cpt_vf(rvu, req->hdr.pcifunc)) in rvu_mbox_handler_cpt_sts()
799 get_ctx_pc(rvu, rsp, blkaddr); in rvu_mbox_handler_cpt_sts()
802 get_eng_sts(rvu, rsp, blkaddr); in rvu_mbox_handler_cpt_sts()
805 rsp->inst_req_pc = rvu_read64(rvu, blkaddr, CPT_AF_INST_REQ_PC); in rvu_mbox_handler_cpt_sts()
806 rsp->inst_lat_pc = rvu_read64(rvu, blkaddr, CPT_AF_INST_LATENCY_PC); in rvu_mbox_handler_cpt_sts()
807 rsp->rd_req_pc = rvu_read64(rvu, blkaddr, CPT_AF_RD_REQ_PC); in rvu_mbox_handler_cpt_sts()
808 rsp->rd_lat_pc = rvu_read64(rvu, blkaddr, CPT_AF_RD_LATENCY_PC); in rvu_mbox_handler_cpt_sts()
809 rsp->rd_uc_pc = rvu_read64(rvu, blkaddr, CPT_AF_RD_UC_PC); in rvu_mbox_handler_cpt_sts()
810 rsp->active_cycles_pc = rvu_read64(rvu, blkaddr, in rvu_mbox_handler_cpt_sts()
812 rsp->exe_err_info = rvu_read64(rvu, blkaddr, CPT_AF_EXE_ERR_INFO); in rvu_mbox_handler_cpt_sts()
813 rsp->cptclk_cnt = rvu_read64(rvu, blkaddr, CPT_AF_CPTCLK_CNT); in rvu_mbox_handler_cpt_sts()
814 rsp->diag = rvu_read64(rvu, blkaddr, CPT_AF_DIAG); in rvu_mbox_handler_cpt_sts()
826 static void cpt_rxc_time_cfg(struct rvu *rvu, struct cpt_rxc_time_cfg_req *req, in cpt_rxc_time_cfg() argument
833 dfrg_reg = rvu_read64(rvu, blkaddr, CPT_AF_RXC_DFRG); in cpt_rxc_time_cfg()
839 save->step = rvu_read64(rvu, blkaddr, CPT_AF_RXC_TIME_CFG); in cpt_rxc_time_cfg()
847 rvu_write64(rvu, blkaddr, CPT_AF_RXC_TIME_CFG, req->step); in cpt_rxc_time_cfg()
848 rvu_write64(rvu, blkaddr, CPT_AF_RXC_DFRG, dfrg_reg); in cpt_rxc_time_cfg()
851 int rvu_mbox_handler_cpt_rxc_time_cfg(struct rvu *rvu, in rvu_mbox_handler_cpt_rxc_time_cfg() argument
862 if (!is_cpt_pf(rvu, req->hdr.pcifunc) && in rvu_mbox_handler_cpt_rxc_time_cfg()
863 !is_cpt_vf(rvu, req->hdr.pcifunc)) in rvu_mbox_handler_cpt_rxc_time_cfg()
866 cpt_rxc_time_cfg(rvu, req, blkaddr, NULL); in rvu_mbox_handler_cpt_rxc_time_cfg()
871 int rvu_mbox_handler_cpt_ctx_cache_sync(struct rvu *rvu, struct msg_req *req, in rvu_mbox_handler_cpt_ctx_cache_sync() argument
874 return rvu_cpt_ctx_flush(rvu, req->hdr.pcifunc); in rvu_mbox_handler_cpt_ctx_cache_sync()
877 int rvu_mbox_handler_cpt_lf_reset(struct rvu *rvu, struct cpt_lf_rst_req *req, in rvu_mbox_handler_cpt_lf_reset() argument
886 blkaddr = rvu_get_blkaddr_from_slot(rvu, BLKTYPE_CPT, pcifunc, in rvu_mbox_handler_cpt_lf_reset()
891 block = &rvu->hw->block[blkaddr]; in rvu_mbox_handler_cpt_lf_reset()
893 cptlf = rvu_get_lf(rvu, block, pcifunc, actual_slot); in rvu_mbox_handler_cpt_lf_reset()
896 ctl = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf)); in rvu_mbox_handler_cpt_lf_reset()
897 ctl2 = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf)); in rvu_mbox_handler_cpt_lf_reset()
899 ret = rvu_lf_reset(rvu, block, cptlf); in rvu_mbox_handler_cpt_lf_reset()
901 dev_err(rvu->dev, "Failed to reset blkaddr %d LF%d\n", in rvu_mbox_handler_cpt_lf_reset()
904 rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf), ctl); in rvu_mbox_handler_cpt_lf_reset()
905 rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf), ctl2); in rvu_mbox_handler_cpt_lf_reset()
910 int rvu_mbox_handler_cpt_flt_eng_info(struct rvu *rvu, struct cpt_flt_eng_info_req *req, in rvu_mbox_handler_cpt_flt_eng_info() argument
921 block = &rvu->hw->block[blkaddr]; in rvu_mbox_handler_cpt_flt_eng_info()
923 spin_lock_irqsave(&rvu->cpt_intr_lock, flags); in rvu_mbox_handler_cpt_flt_eng_info()
930 spin_unlock_irqrestore(&rvu->cpt_intr_lock, flags); in rvu_mbox_handler_cpt_flt_eng_info()
935 static void cpt_rxc_teardown(struct rvu *rvu, int blkaddr) in cpt_rxc_teardown() argument
941 if (is_rvu_otx2(rvu)) in cpt_rxc_teardown()
953 cpt_rxc_time_cfg(rvu, &req, blkaddr, &prev); in cpt_rxc_teardown()
956 reg = rvu_read64(rvu, blkaddr, CPT_AF_RXC_ACTIVE_STS); in cpt_rxc_teardown()
965 dev_warn(rvu->dev, "Poll for RXC active count hits hard loop counter\n"); in cpt_rxc_teardown()
969 reg = rvu_read64(rvu, blkaddr, CPT_AF_RXC_ZOMBIE_STS); in cpt_rxc_teardown()
978 dev_warn(rvu->dev, "Poll for RXC zombie count hits hard loop counter\n"); in cpt_rxc_teardown()
981 cpt_rxc_time_cfg(rvu, &prev, blkaddr, NULL); in cpt_rxc_teardown()
991 static void cpt_lf_disable_iqueue(struct rvu *rvu, int blkaddr, int slot) in cpt_lf_disable_iqueue() argument
999 rvu_write64(rvu, blkaddr, CPT_AF_BAR2_ALIASX(slot, CPT_LF_CTL), 0x0); in cpt_lf_disable_iqueue()
1001 inprog = rvu_read64(rvu, blkaddr, in cpt_lf_disable_iqueue()
1004 rvu_write64(rvu, blkaddr, in cpt_lf_disable_iqueue()
1007 qsize = rvu_read64(rvu, blkaddr, in cpt_lf_disable_iqueue()
1010 inst_ptr = rvu_read64(rvu, blkaddr, in cpt_lf_disable_iqueue()
1020 dev_warn(rvu->dev, "TIMEOUT: CPT poll on pending instructions\n"); in cpt_lf_disable_iqueue()
1025 inprog = rvu_read64(rvu, blkaddr, in cpt_lf_disable_iqueue()
1038 dev_warn(rvu->dev, "TIMEOUT: CPT poll on inflight count\n"); in cpt_lf_disable_iqueue()
1043 int rvu_cpt_lf_teardown(struct rvu *rvu, u16 pcifunc, int blkaddr, int lf, int slot) in rvu_cpt_lf_teardown() argument
1047 if (is_cpt_pf(rvu, pcifunc) || is_cpt_vf(rvu, pcifunc)) in rvu_cpt_lf_teardown()
1048 cpt_rxc_teardown(rvu, blkaddr); in rvu_cpt_lf_teardown()
1050 mutex_lock(&rvu->alias_lock); in rvu_cpt_lf_teardown()
1053 rvu_bar2_sel_write64(rvu, blkaddr, CPT_AF_BAR2_SEL, reg); in rvu_cpt_lf_teardown()
1055 cpt_lf_disable_iqueue(rvu, blkaddr, slot); in rvu_cpt_lf_teardown()
1057 rvu_bar2_sel_write64(rvu, blkaddr, CPT_AF_BAR2_SEL, 0); in rvu_cpt_lf_teardown()
1058 mutex_unlock(&rvu->alias_lock); in rvu_cpt_lf_teardown()
1066 static int cpt_inline_inb_lf_cmd_send(struct rvu *rvu, int blkaddr, in cpt_inline_inb_lf_cmd_send() argument
1069 int cpt_pf_num = rvu->cpt_pf_num; in cpt_inline_inb_lf_cmd_send()
1082 res_daddr = dma_map_single(rvu->dev, res, CPT_RES_LEN, in cpt_inline_inb_lf_cmd_send()
1084 if (dma_mapping_error(rvu->dev, res_daddr)) { in cpt_inline_inb_lf_cmd_send()
1085 dev_err(rvu->dev, "DMA mapping failed for CPT result\n"); in cpt_inline_inb_lf_cmd_send()
1093 otx2_mbox_alloc_msg_rsp(&rvu->afpf_wq_info.mbox_up, in cpt_inline_inb_lf_cmd_send()
1121 rvu_write64(rvu, nix_blkaddr, NIX_AF_RX_CPTX_CREDIT(cpt_idx), in cpt_inline_inb_lf_cmd_send()
1124 otx2_mbox_msg_send(&rvu->afpf_wq_info.mbox_up, cpt_pf_num); in cpt_inline_inb_lf_cmd_send()
1125 rc = otx2_mbox_wait_for_rsp(&rvu->afpf_wq_info.mbox_up, cpt_pf_num); in cpt_inline_inb_lf_cmd_send()
1127 dev_warn(rvu->dev, "notification to pf %d failed\n", in cpt_inline_inb_lf_cmd_send()
1139 dev_warn(rvu->dev, "Poll for result hits hard loop counter\n"); in cpt_inline_inb_lf_cmd_send()
1142 dma_unmap_single(rvu->dev, res_daddr, CPT_RES_LEN, DMA_BIDIRECTIONAL); in cpt_inline_inb_lf_cmd_send()
1152 int rvu_cpt_ctx_flush(struct rvu *rvu, u16 pcifunc) in rvu_cpt_ctx_flush() argument
1160 nix_blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc); in rvu_cpt_ctx_flush()
1164 if (is_rvu_otx2(rvu)) in rvu_cpt_ctx_flush()
1172 rc = cpt_inline_inb_lf_cmd_send(rvu, blkaddr, nix_blkaddr); in rvu_cpt_ctx_flush()
1177 cpt_rxc_teardown(rvu, blkaddr); in rvu_cpt_ctx_flush()
1179 reg = rvu_read64(rvu, blkaddr, CPT_AF_CONSTANTS0); in rvu_cpt_ctx_flush()
1182 mutex_lock(&rvu->rsrc_lock); in rvu_cpt_ctx_flush()
1184 num_lfs = rvu_get_rsrc_mapcount(rvu_get_pfvf(rvu, pcifunc), in rvu_cpt_ctx_flush()
1187 dev_warn(rvu->dev, "CPT LF is not configured\n"); in rvu_cpt_ctx_flush()
1193 rvu_bar2_sel_write64(rvu, blkaddr, CPT_AF_BAR2_SEL, reg); in rvu_cpt_ctx_flush()
1196 cam_data = rvu_read64(rvu, blkaddr, CPT_AF_CTX_CAM_DATA(i)); in rvu_cpt_ctx_flush()
1201 rvu_write64(rvu, blkaddr, in rvu_cpt_ctx_flush()
1206 rvu_bar2_sel_write64(rvu, blkaddr, CPT_AF_BAR2_SEL, 0); in rvu_cpt_ctx_flush()
1209 mutex_unlock(&rvu->rsrc_lock); in rvu_cpt_ctx_flush()
1214 int rvu_cpt_init(struct rvu *rvu) in rvu_cpt_init() argument
1217 rvu->cpt_pf_num = get_cpt_pf_num(rvu); in rvu_cpt_init()
1218 spin_lock_init(&rvu->cpt_intr_lock); in rvu_cpt_init()