Lines Matching refs:reg_map
738 mtk_w32(eth, val, soc->reg_map->qdma.qtx_sch + ofs); in mtk_set_queue_speed()
843 val = mtk_r32(eth, eth->soc->reg_map->tx_irq_mask); in mtk_tx_irq_disable()
844 mtk_w32(eth, val & ~mask, eth->soc->reg_map->tx_irq_mask); in mtk_tx_irq_disable()
854 val = mtk_r32(eth, eth->soc->reg_map->tx_irq_mask); in mtk_tx_irq_enable()
855 mtk_w32(eth, val | mask, eth->soc->reg_map->tx_irq_mask); in mtk_tx_irq_enable()
865 val = mtk_r32(eth, eth->soc->reg_map->pdma.irq_mask); in mtk_rx_irq_disable()
866 mtk_w32(eth, val & ~mask, eth->soc->reg_map->pdma.irq_mask); in mtk_rx_irq_disable()
876 val = mtk_r32(eth, eth->soc->reg_map->pdma.irq_mask); in mtk_rx_irq_enable()
877 mtk_w32(eth, val | mask, eth->soc->reg_map->pdma.irq_mask); in mtk_rx_irq_enable()
928 const struct mtk_reg_map *reg_map = eth->soc->reg_map; in mtk_stats_update_mac() local
932 hw_stats->rx_bytes += mtk_r32(mac->hw, reg_map->gdm1_cnt + offs); in mtk_stats_update_mac()
933 stats = mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x4 + offs); in mtk_stats_update_mac()
937 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x8 + offs); in mtk_stats_update_mac()
939 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x10 + offs); in mtk_stats_update_mac()
941 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x14 + offs); in mtk_stats_update_mac()
943 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x18 + offs); in mtk_stats_update_mac()
945 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x1c + offs); in mtk_stats_update_mac()
947 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x20 + offs); in mtk_stats_update_mac()
949 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x24 + offs); in mtk_stats_update_mac()
951 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x28 + offs); in mtk_stats_update_mac()
953 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x2c + offs); in mtk_stats_update_mac()
955 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x30 + offs); in mtk_stats_update_mac()
956 stats = mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x34 + offs); in mtk_stats_update_mac()
960 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x38 + offs); in mtk_stats_update_mac()
1110 mtk_w32(eth, eth->phy_scratch_ring, soc->reg_map->qdma.fq_head); in mtk_init_fq_dma()
1111 mtk_w32(eth, phy_ring_tail, soc->reg_map->qdma.fq_tail); in mtk_init_fq_dma()
1112 mtk_w32(eth, (cnt << 16) | cnt, soc->reg_map->qdma.fq_count); in mtk_init_fq_dma()
1113 mtk_w32(eth, MTK_QDMA_PAGE_SIZE << 16, soc->reg_map->qdma.fq_blen); in mtk_init_fq_dma()
1424 mtk_w32(eth, txd->txd2, soc->reg_map->qdma.ctx_ptr); in mtk_tx_map()
1790 mtk_w32(eth, txd->txd2, soc->reg_map->qdma.ctx_ptr); in mtk_xdp_submit_frame()
2170 const struct mtk_reg_map *reg_map = eth->soc->reg_map; in mtk_poll_tx_qdma() local
2178 dma = mtk_r32(eth, reg_map->qdma.drx_ptr); in mtk_poll_tx_qdma()
2215 mtk_w32(eth, cpu, reg_map->qdma.crx_ptr); in mtk_poll_tx_qdma()
2297 const struct mtk_reg_map *reg_map = eth->soc->reg_map; in mtk_napi_tx() local
2302 mtk_w32(eth, MTK_TX_DONE_INT, reg_map->tx_irq_status); in mtk_napi_tx()
2308 mtk_r32(eth, reg_map->tx_irq_status), in mtk_napi_tx()
2309 mtk_r32(eth, reg_map->tx_irq_mask)); in mtk_napi_tx()
2315 if (mtk_r32(eth, reg_map->tx_irq_status) & MTK_TX_DONE_INT) in mtk_napi_tx()
2327 const struct mtk_reg_map *reg_map = eth->soc->reg_map; in mtk_napi_rx() local
2336 reg_map->pdma.irq_status); in mtk_napi_rx()
2343 mtk_r32(eth, reg_map->pdma.irq_status), in mtk_napi_rx()
2344 mtk_r32(eth, reg_map->pdma.irq_mask)); in mtk_napi_rx()
2350 } while (mtk_r32(eth, reg_map->pdma.irq_status) & in mtk_napi_rx()
2428 mtk_w32(eth, ring->phys, soc->reg_map->qdma.ctx_ptr); in mtk_tx_alloc()
2429 mtk_w32(eth, ring->phys, soc->reg_map->qdma.dtx_ptr); in mtk_tx_alloc()
2432 soc->reg_map->qdma.crx_ptr); in mtk_tx_alloc()
2433 mtk_w32(eth, ring->last_free_ptr, soc->reg_map->qdma.drx_ptr); in mtk_tx_alloc()
2437 mtk_w32(eth, val, soc->reg_map->qdma.qtx_cfg + ofs); in mtk_tx_alloc()
2446 mtk_w32(eth, val, soc->reg_map->qdma.qtx_sch + ofs); in mtk_tx_alloc()
2450 mtk_w32(eth, val, soc->reg_map->qdma.tx_sch_rate); in mtk_tx_alloc()
2452 mtk_w32(eth, val, soc->reg_map->qdma.tx_sch_rate + 4); in mtk_tx_alloc()
2457 mtk_w32(eth, MT7628_PST_DTX_IDX0, soc->reg_map->pdma.rst_idx); in mtk_tx_alloc()
2496 const struct mtk_reg_map *reg_map = eth->soc->reg_map; in mtk_rx_alloc() local
2592 ring->crx_idx_reg = reg_map->qdma.qcrx_ptr + in mtk_rx_alloc()
2595 ring->crx_idx_reg = reg_map->pdma.pcrx_ptr + in mtk_rx_alloc()
2604 reg_map->qdma.rx_ptr + ring_no * MTK_QRX_OFFSET); in mtk_rx_alloc()
2606 reg_map->qdma.rx_cnt_cfg + ring_no * MTK_QRX_OFFSET); in mtk_rx_alloc()
2608 reg_map->qdma.rst_idx); in mtk_rx_alloc()
2611 reg_map->pdma.rx_ptr + ring_no * MTK_QRX_OFFSET); in mtk_rx_alloc()
2613 reg_map->pdma.rx_cnt_cfg + ring_no * MTK_QRX_OFFSET); in mtk_rx_alloc()
2615 reg_map->pdma.rst_idx); in mtk_rx_alloc()
2948 reg = eth->soc->reg_map->qdma.glo_cfg; in mtk_dma_busy_wait()
2950 reg = eth->soc->reg_map->pdma.glo_cfg; in mtk_dma_busy_wait()
3008 FC_THRES_MIN, eth->soc->reg_map->qdma.fc_th); in mtk_dma_init()
3009 mtk_w32(eth, 0x0, eth->soc->reg_map->qdma.hred); in mtk_dma_init()
3098 const struct mtk_reg_map *reg_map = eth->soc->reg_map; in mtk_handle_irq() local
3100 if (mtk_r32(eth, reg_map->pdma.irq_mask) & in mtk_handle_irq()
3102 if (mtk_r32(eth, reg_map->pdma.irq_status) & in mtk_handle_irq()
3106 if (mtk_r32(eth, reg_map->tx_irq_mask) & MTK_TX_DONE_INT) { in mtk_handle_irq()
3107 if (mtk_r32(eth, reg_map->tx_irq_status) & MTK_TX_DONE_INT) in mtk_handle_irq()
3131 const struct mtk_reg_map *reg_map = eth->soc->reg_map; in mtk_start_dma() local
3141 val = mtk_r32(eth, reg_map->qdma.glo_cfg); in mtk_start_dma()
3152 mtk_w32(eth, val, reg_map->qdma.glo_cfg); in mtk_start_dma()
3157 reg_map->pdma.glo_cfg); in mtk_start_dma()
3161 reg_map->pdma.glo_cfg); in mtk_start_dma()
3297 gdm_config = soc->offload_version ? soc->reg_map->gdma_to_ppe in mtk_open()
3366 mtk_stop_dma(eth, eth->soc->reg_map->qdma.glo_cfg); in mtk_stop()
3367 mtk_stop_dma(eth, eth->soc->reg_map->pdma.glo_cfg); in mtk_stop()
3463 const struct mtk_reg_map *reg_map = eth->soc->reg_map; in mtk_dim_rx() local
3471 val = mtk_r32(eth, reg_map->pdma.delay_irq); in mtk_dim_rx()
3481 mtk_w32(eth, val, reg_map->pdma.delay_irq); in mtk_dim_rx()
3483 mtk_w32(eth, val, reg_map->qdma.delay_irq); in mtk_dim_rx()
3494 const struct mtk_reg_map *reg_map = eth->soc->reg_map; in mtk_dim_tx() local
3502 val = mtk_r32(eth, reg_map->pdma.delay_irq); in mtk_dim_tx()
3512 mtk_w32(eth, val, reg_map->pdma.delay_irq); in mtk_dim_tx()
3514 mtk_w32(eth, val, reg_map->qdma.delay_irq); in mtk_dim_tx()
3615 const struct mtk_reg_map *reg_map = eth->soc->reg_map; in mtk_hw_check_dma_hang() local
3627 wdidx = mtk_r32(eth, reg_map->wdma_base[0] + 0xc); in mtk_hw_check_dma_hang()
3629 val = mtk_r32(eth, reg_map->wdma_base[0] + 0x204); in mtk_hw_check_dma_hang()
3632 val = mtk_r32(eth, reg_map->wdma_base[0] + 0x230); in mtk_hw_check_dma_hang()
3635 oq_free = (!(mtk_r32(eth, reg_map->pse_oq_sta) & GENMASK(24, 16)) && in mtk_hw_check_dma_hang()
3636 !(mtk_r32(eth, reg_map->pse_oq_sta + 0x4) & GENMASK(8, 0)) && in mtk_hw_check_dma_hang()
3637 !(mtk_r32(eth, reg_map->pse_oq_sta + 0x10) & GENMASK(24, 16))); in mtk_hw_check_dma_hang()
3648 qfsm_hang = !!mtk_r32(eth, reg_map->qdma.qtx_cfg + 0x234); in mtk_hw_check_dma_hang()
3649 qfwd_hang = !mtk_r32(eth, reg_map->qdma.qtx_cfg + 0x308); in mtk_hw_check_dma_hang()
3655 gdm1_fc = mtk_r32(eth, reg_map->gdm1_cnt + 0x24); in mtk_hw_check_dma_hang()
3656 gdm2_fc = mtk_r32(eth, reg_map->gdm1_cnt + 0x64); in mtk_hw_check_dma_hang()
3669 oq_hang = !!(mtk_r32(eth, reg_map->pse_oq_sta) & GENMASK(8, 0)); in mtk_hw_check_dma_hang()
3671 adma_busy = !(mtk_r32(eth, reg_map->pdma.adma_rx_dbg0) & GENMASK(4, 0)) && in mtk_hw_check_dma_hang()
3672 !(mtk_r32(eth, reg_map->pdma.adma_rx_dbg0) & BIT(6)); in mtk_hw_check_dma_hang()
3713 const struct mtk_reg_map *reg_map = eth->soc->reg_map; in mtk_hw_init() local
3811 mtk_w32(eth, MTK_TX_DONE_INT, reg_map->pdma.int_grp); in mtk_hw_init()
3812 mtk_w32(eth, eth->soc->txrx.rx_irq_done_mask, reg_map->pdma.int_grp + 4); in mtk_hw_init()
3813 mtk_w32(eth, MTK_TX_DONE_INT, reg_map->qdma.int_grp); in mtk_hw_init()
3814 mtk_w32(eth, eth->soc->txrx.rx_irq_done_mask, reg_map->qdma.int_grp + 4); in mtk_hw_init()
4593 if (i >= ARRAY_SIZE(eth->soc->reg_map->wdma_base)) in mtk_probe()
4601 wdma_base = eth->soc->reg_map->wdma_base[i]; in mtk_probe()
4692 u32 ppe_addr = eth->soc->reg_map->ppe_base + i * 0x400; in mtk_probe()
4774 .reg_map = &mtk_reg_map,
4790 .reg_map = &mtk_reg_map,
4809 .reg_map = &mtk_reg_map,
4829 .reg_map = &mtk_reg_map,
4848 .reg_map = &mtk_reg_map,
4865 .reg_map = &mt7986_reg_map,
4885 .reg_map = &mt7628_reg_map,