Lines Matching refs:inbox
692 struct mlx4_cmd_mailbox *inbox) in update_pkey_index() argument
694 u8 sched = *(u8 *)(inbox->buf + 64); in update_pkey_index()
695 u8 orig_index = *(u8 *)(inbox->buf + 35); in update_pkey_index()
703 *(u8 *)(inbox->buf + 35) = new_index; in update_pkey_index()
706 static void update_gid(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *inbox, in update_gid() argument
709 struct mlx4_qp_context *qp_ctx = inbox->buf + 8; in update_gid()
710 enum mlx4_qp_optpar optpar = be32_to_cpu(*(__be32 *) inbox->buf); in update_gid()
750 struct mlx4_cmd_mailbox *inbox, in update_vport_qp_param() argument
753 struct mlx4_qp_context *qpc = inbox->buf + 8; in update_vport_qp_param()
779 *(__be32 *)inbox->buf = in update_vport_qp_param()
780 cpu_to_be32(be32_to_cpu(*(__be32 *)inbox->buf) | in update_vport_qp_param()
2296 struct mlx4_cmd_mailbox *inbox, in mlx4_ALLOC_RES_wrapper() argument
2610 struct mlx4_cmd_mailbox *inbox, in mlx4_FREE_RES_wrapper() argument
2757 struct mlx4_cmd_mailbox *inbox, in mlx4_SW2HW_MPT_wrapper() argument
2765 int mtt_base = mr_get_mtt_addr(inbox->buf) / dev->caps.mtt_entry_sz; in mlx4_SW2HW_MPT_wrapper()
2777 if (!mr_is_region(inbox->buf)) { in mlx4_SW2HW_MPT_wrapper()
2783 pd = mr_get_pd(inbox->buf); in mlx4_SW2HW_MPT_wrapper()
2790 if (mr_is_fmr(inbox->buf)) { in mlx4_SW2HW_MPT_wrapper()
2792 if (mr_is_bind_enabled(inbox->buf)) { in mlx4_SW2HW_MPT_wrapper()
2797 if (!mr_is_region(inbox->buf)) { in mlx4_SW2HW_MPT_wrapper()
2803 phys = mr_phys_mpt(inbox->buf); in mlx4_SW2HW_MPT_wrapper()
2810 mr_get_mtt_size(inbox->buf), mtt); in mlx4_SW2HW_MPT_wrapper()
2817 err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); in mlx4_SW2HW_MPT_wrapper()
2840 struct mlx4_cmd_mailbox *inbox, in mlx4_HW2SW_MPT_wrapper() argument
2854 err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); in mlx4_HW2SW_MPT_wrapper()
2872 struct mlx4_cmd_mailbox *inbox, in mlx4_QUERY_MPT_wrapper() argument
2908 err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); in mlx4_QUERY_MPT_wrapper()
2950 struct mlx4_cmd_mailbox *inbox);
2954 struct mlx4_cmd_mailbox *inbox, in mlx4_RST2INIT_QP_wrapper() argument
2962 struct mlx4_qp_context *qpc = inbox->buf + 8; in mlx4_RST2INIT_QP_wrapper()
2974 err = adjust_qp_sched_queue(dev, slave, qpc, inbox); in mlx4_RST2INIT_QP_wrapper()
3017 update_pkey_index(dev, slave, inbox); in mlx4_RST2INIT_QP_wrapper()
3018 err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); in mlx4_RST2INIT_QP_wrapper()
3095 struct mlx4_cmd_mailbox *inbox, in mlx4_SW2HW_EQ_wrapper() argument
3102 struct mlx4_eq_context *eqc = inbox->buf; in mlx4_SW2HW_EQ_wrapper()
3123 err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); in mlx4_SW2HW_EQ_wrapper()
3144 struct mlx4_cmd_mailbox *inbox, in mlx4_CONFIG_DEV_wrapper() argument
3154 err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); in mlx4_CONFIG_DEV_wrapper()
3185 struct mlx4_cmd_mailbox *inbox, in verify_qp_parameters() argument
3195 qp_ctx = inbox->buf + 8; in verify_qp_parameters()
3197 optpar = be32_to_cpu(*(__be32 *) inbox->buf); in verify_qp_parameters()
3265 struct mlx4_cmd_mailbox *inbox, in mlx4_WRITE_MTT_wrapper() argument
3270 __be64 *page_list = inbox->buf; in mlx4_WRITE_MTT_wrapper()
3303 struct mlx4_cmd_mailbox *inbox, in mlx4_HW2SW_EQ_wrapper() argument
3320 err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); in mlx4_HW2SW_EQ_wrapper()
3409 struct mlx4_cmd_mailbox *inbox, in mlx4_QUERY_EQ_wrapper() argument
3427 err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); in mlx4_QUERY_EQ_wrapper()
3436 struct mlx4_cmd_mailbox *inbox, in mlx4_SW2HW_CQ_wrapper() argument
3442 struct mlx4_cq_context *cqc = inbox->buf; in mlx4_SW2HW_CQ_wrapper()
3456 err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); in mlx4_SW2HW_CQ_wrapper()
3474 struct mlx4_cmd_mailbox *inbox, in mlx4_HW2SW_CQ_wrapper() argument
3485 err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); in mlx4_HW2SW_CQ_wrapper()
3499 struct mlx4_cmd_mailbox *inbox, in mlx4_QUERY_CQ_wrapper() argument
3514 err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); in mlx4_QUERY_CQ_wrapper()
3523 struct mlx4_cmd_mailbox *inbox, in handle_resize() argument
3531 struct mlx4_cq_context *cqc = inbox->buf; in handle_resize()
3550 err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); in handle_resize()
3571 struct mlx4_cmd_mailbox *inbox, in mlx4_MODIFY_CQ_wrapper() argument
3587 err = handle_resize(dev, slave, vhcr, inbox, outbox, cmd, cq); in mlx4_MODIFY_CQ_wrapper()
3591 err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); in mlx4_MODIFY_CQ_wrapper()
3612 struct mlx4_cmd_mailbox *inbox, in mlx4_SW2HW_SRQ_wrapper() argument
3620 struct mlx4_srq_context *srqc = inbox->buf; in mlx4_SW2HW_SRQ_wrapper()
3637 err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); in mlx4_SW2HW_SRQ_wrapper()
3657 struct mlx4_cmd_mailbox *inbox, in mlx4_HW2SW_SRQ_wrapper() argument
3668 err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); in mlx4_HW2SW_SRQ_wrapper()
3686 struct mlx4_cmd_mailbox *inbox, in mlx4_QUERY_SRQ_wrapper() argument
3701 err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); in mlx4_QUERY_SRQ_wrapper()
3709 struct mlx4_cmd_mailbox *inbox, in mlx4_ARM_SRQ_wrapper() argument
3726 err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); in mlx4_ARM_SRQ_wrapper()
3734 struct mlx4_cmd_mailbox *inbox, in mlx4_GEN_QP_wrapper() argument
3750 err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); in mlx4_GEN_QP_wrapper()
3758 struct mlx4_cmd_mailbox *inbox, in mlx4_INIT2INIT_QP_wrapper() argument
3762 struct mlx4_qp_context *context = inbox->buf + 8; in mlx4_INIT2INIT_QP_wrapper()
3764 update_pkey_index(dev, slave, inbox); in mlx4_INIT2INIT_QP_wrapper()
3765 return mlx4_GEN_QP_wrapper(dev, slave, vhcr, inbox, outbox, cmd); in mlx4_INIT2INIT_QP_wrapper()
3770 struct mlx4_cmd_mailbox *inbox) in adjust_qp_sched_queue() argument
3772 enum mlx4_qp_optpar optpar = be32_to_cpu(*(__be32 *)inbox->buf); in adjust_qp_sched_queue()
3803 struct mlx4_cmd_mailbox *inbox) in roce_verify_mac() argument
3808 u8 sched = *(u8 *)(inbox->buf + 64); in roce_verify_mac()
3822 struct mlx4_cmd_mailbox *inbox, in mlx4_INIT2RTR_QP_wrapper() argument
3827 struct mlx4_qp_context *qpc = inbox->buf + 8; in mlx4_INIT2RTR_QP_wrapper()
3837 err = adjust_qp_sched_queue(dev, slave, qpc, inbox); in mlx4_INIT2RTR_QP_wrapper()
3840 err = verify_qp_parameters(dev, vhcr, inbox, QP_TRANS_INIT2RTR, slave); in mlx4_INIT2RTR_QP_wrapper()
3844 if (roce_verify_mac(dev, slave, qpc, inbox)) in mlx4_INIT2RTR_QP_wrapper()
3847 update_pkey_index(dev, slave, inbox); in mlx4_INIT2RTR_QP_wrapper()
3848 update_gid(dev, inbox, (u8)slave); in mlx4_INIT2RTR_QP_wrapper()
3860 err = update_vport_qp_param(dev, inbox, slave, qpn); in mlx4_INIT2RTR_QP_wrapper()
3864 err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); in mlx4_INIT2RTR_QP_wrapper()
3884 struct mlx4_cmd_mailbox *inbox, in mlx4_RTR2RTS_QP_wrapper() argument
3889 struct mlx4_qp_context *context = inbox->buf + 8; in mlx4_RTR2RTS_QP_wrapper()
3891 err = adjust_qp_sched_queue(dev, slave, context, inbox); in mlx4_RTR2RTS_QP_wrapper()
3894 err = verify_qp_parameters(dev, vhcr, inbox, QP_TRANS_RTR2RTS, slave); in mlx4_RTR2RTS_QP_wrapper()
3898 update_pkey_index(dev, slave, inbox); in mlx4_RTR2RTS_QP_wrapper()
3899 update_gid(dev, inbox, (u8)slave); in mlx4_RTR2RTS_QP_wrapper()
3901 return mlx4_GEN_QP_wrapper(dev, slave, vhcr, inbox, outbox, cmd); in mlx4_RTR2RTS_QP_wrapper()
3906 struct mlx4_cmd_mailbox *inbox, in mlx4_RTS2RTS_QP_wrapper() argument
3911 struct mlx4_qp_context *context = inbox->buf + 8; in mlx4_RTS2RTS_QP_wrapper()
3913 err = adjust_qp_sched_queue(dev, slave, context, inbox); in mlx4_RTS2RTS_QP_wrapper()
3916 err = verify_qp_parameters(dev, vhcr, inbox, QP_TRANS_RTS2RTS, slave); in mlx4_RTS2RTS_QP_wrapper()
3920 update_pkey_index(dev, slave, inbox); in mlx4_RTS2RTS_QP_wrapper()
3921 update_gid(dev, inbox, (u8)slave); in mlx4_RTS2RTS_QP_wrapper()
3923 return mlx4_GEN_QP_wrapper(dev, slave, vhcr, inbox, outbox, cmd); in mlx4_RTS2RTS_QP_wrapper()
3929 struct mlx4_cmd_mailbox *inbox, in mlx4_SQERR2RTS_QP_wrapper() argument
3933 struct mlx4_qp_context *context = inbox->buf + 8; in mlx4_SQERR2RTS_QP_wrapper()
3934 int err = adjust_qp_sched_queue(dev, slave, context, inbox); in mlx4_SQERR2RTS_QP_wrapper()
3938 return mlx4_GEN_QP_wrapper(dev, slave, vhcr, inbox, outbox, cmd); in mlx4_SQERR2RTS_QP_wrapper()
3943 struct mlx4_cmd_mailbox *inbox, in mlx4_SQD2SQD_QP_wrapper() argument
3948 struct mlx4_qp_context *context = inbox->buf + 8; in mlx4_SQD2SQD_QP_wrapper()
3950 err = adjust_qp_sched_queue(dev, slave, context, inbox); in mlx4_SQD2SQD_QP_wrapper()
3953 err = verify_qp_parameters(dev, vhcr, inbox, QP_TRANS_SQD2SQD, slave); in mlx4_SQD2SQD_QP_wrapper()
3958 update_gid(dev, inbox, (u8)slave); in mlx4_SQD2SQD_QP_wrapper()
3959 update_pkey_index(dev, slave, inbox); in mlx4_SQD2SQD_QP_wrapper()
3960 return mlx4_GEN_QP_wrapper(dev, slave, vhcr, inbox, outbox, cmd); in mlx4_SQD2SQD_QP_wrapper()
3965 struct mlx4_cmd_mailbox *inbox, in mlx4_SQD2RTS_QP_wrapper() argument
3970 struct mlx4_qp_context *context = inbox->buf + 8; in mlx4_SQD2RTS_QP_wrapper()
3972 err = adjust_qp_sched_queue(dev, slave, context, inbox); in mlx4_SQD2RTS_QP_wrapper()
3975 err = verify_qp_parameters(dev, vhcr, inbox, QP_TRANS_SQD2RTS, slave); in mlx4_SQD2RTS_QP_wrapper()
3980 update_gid(dev, inbox, (u8)slave); in mlx4_SQD2RTS_QP_wrapper()
3981 update_pkey_index(dev, slave, inbox); in mlx4_SQD2RTS_QP_wrapper()
3982 return mlx4_GEN_QP_wrapper(dev, slave, vhcr, inbox, outbox, cmd); in mlx4_SQD2RTS_QP_wrapper()
3987 struct mlx4_cmd_mailbox *inbox, in mlx4_2RST_QP_wrapper() argument
3998 err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); in mlx4_2RST_QP_wrapper()
4140 struct mlx4_cmd_mailbox *inbox, in mlx4_QP_ATTACH_wrapper() argument
4145 u8 *gid = inbox->buf; in mlx4_QP_ATTACH_wrapper()
4226 struct mlx4_cmd_mailbox *inbox, in add_eth_header() argument
4238 ctrl = (struct mlx4_net_trans_rule_hw_ctrl *)inbox->buf; in add_eth_header()
4286 struct mlx4_cmd_mailbox *inbox, in mlx4_UPDATE_QP_wrapper() argument
4299 cmd = (struct mlx4_update_qp_context *)inbox->buf; in mlx4_UPDATE_QP_wrapper()
4336 err = mlx4_cmd(dev, inbox->dma, in mlx4_UPDATE_QP_wrapper()
4368 struct mlx4_cmd_mailbox *inbox, in mlx4_QP_FLOW_STEERING_ATTACH_wrapper() argument
4389 ctrl = (struct mlx4_net_trans_rule_hw_ctrl *)inbox->buf; in mlx4_QP_FLOW_STEERING_ATTACH_wrapper()
4419 if (add_eth_header(dev, slave, inbox, rlist, header_id)) { in mlx4_QP_FLOW_STEERING_ATTACH_wrapper()
4432 err = mlx4_cmd_imm(dev, inbox->dma, &vhcr->out_param, in mlx4_QP_FLOW_STEERING_ATTACH_wrapper()
4450 mbox_size = qp_attach_mbox_size(inbox->buf); in mlx4_QP_FLOW_STEERING_ATTACH_wrapper()
4458 memcpy(rrule->mirr_mbox, inbox->buf, mbox_size); in mlx4_QP_FLOW_STEERING_ATTACH_wrapper()
4502 struct mlx4_cmd_mailbox *inbox, in mlx4_QP_FLOW_STEERING_DETACH_wrapper() argument
4566 struct mlx4_cmd_mailbox *inbox, in mlx4_QUERY_IF_STAT_wrapper() argument
4577 err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd); in mlx4_QUERY_IF_STAT_wrapper()