Lines Matching refs:portmode
97 if (port->conf.portmode == PHY_INTERFACE_MODE_1000BASEX) in sparx5_get_dev2g5_status()
99 else if (port->conf.portmode == PHY_INTERFACE_MODE_2500BASEX) in sparx5_get_dev2g5_status()
110 if (port->conf.portmode == PHY_INTERFACE_MODE_SGMII) { in sparx5_get_dev2g5_status()
125 bool high_speed_dev = sparx5_is_baser(port->conf.portmode); in sparx5_get_sfi_status()
148 if (port->conf.portmode == PHY_INTERFACE_MODE_5GBASER) in sparx5_get_sfi_status()
150 else if (port->conf.portmode == PHY_INTERFACE_MODE_10GBASER) in sparx5_get_sfi_status()
170 switch (port->conf.portmode) { in sparx5_get_port_status()
197 conf->speed, phy_modes(conf->portmode)); in sparx5_port_error()
202 phy_modes(conf->portmode)); in sparx5_port_error()
224 switch (conf->portmode) { in sparx5_port_verify_speed()
268 return sparx5_is_baser(port->conf.portmode) ^ in sparx5_dev_change()
269 sparx5_is_baser(conf->portmode); in sparx5_dev_change()
523 if (port->conf.portmode == conf->portmode) in sparx5_port_mux_set()
526 switch (conf->portmode) { in sparx5_port_mux_set()
675 if (conf->portmode == PHY_INTERFACE_MODE_1000BASEX) /* cl-37 aneg */ in sparx5_get_aneg_word()
685 int portmode, err, speed = conf->speed; in sparx5_serdes_set() local
687 if (conf->portmode == PHY_INTERFACE_MODE_QSGMII && in sparx5_serdes_set()
691 if (sparx5_is_baser(conf->portmode)) { in sparx5_serdes_set()
692 if (conf->portmode == PHY_INTERFACE_MODE_25GBASER) in sparx5_serdes_set()
694 else if (conf->portmode == PHY_INTERFACE_MODE_10GBASER) in sparx5_serdes_set()
717 portmode = conf->portmode; in sparx5_serdes_set()
718 if (sparx5_is_baser(conf->portmode)) in sparx5_serdes_set()
719 portmode = PHY_INTERFACE_MODE_10GBASER; in sparx5_serdes_set()
720 err = phy_set_mode_ext(port->serdes, PHY_MODE_ETHERNET, portmode); in sparx5_serdes_set()
735 if (conf->portmode == PHY_INTERFACE_MODE_SGMII || in sparx5_port_pcs_low_set()
736 conf->portmode == PHY_INTERFACE_MODE_QSGMII) in sparx5_port_pcs_low_set()
738 else if (conf->portmode == PHY_INTERFACE_MODE_1000BASEX && in sparx5_port_pcs_low_set()
791 u32 clk_spd = conf->portmode == PHY_INTERFACE_MODE_5GBASER ? 1 : 0; in sparx5_port_pcs_high_set()
806 if (conf->portmode == PHY_INTERFACE_MODE_25GBASER) { in sparx5_port_pcs_high_set()
926 bool high_speed_dev = sparx5_is_baser(conf->portmode); in sparx5_port_pcs_set()
974 bool high_speed_dev = sparx5_is_baser(conf->portmode); in sparx5_port_config()
1079 if (conf->portmode == PHY_INTERFACE_MODE_QSGMII || in sparx5_port_init()
1080 conf->portmode == PHY_INTERFACE_MODE_SGMII) { in sparx5_port_init()
1094 if (conf->portmode == PHY_INTERFACE_MODE_QSGMII) { in sparx5_port_init()
1112 if (conf->portmode == PHY_INTERFACE_MODE_NA) in sparx5_port_init()
1113 conf->portmode = PHY_INTERFACE_MODE_10GBASER; in sparx5_port_init()
1115 if (sparx5_is_baser(conf->portmode)) in sparx5_port_init()