Lines Matching refs:p_hwfn
47 #define SB_ATTN_ALIGNED_SIZE(p_hwfn) \ argument
48 ALIGNED_TYPE_SIZE(struct atten_status_block, p_hwfn)
77 int (*cb)(struct qed_hwfn *p_hwfn);
90 static int qed_mcp_attn_cb(struct qed_hwfn *p_hwfn) in qed_mcp_attn_cb() argument
92 u32 tmp = qed_rd(p_hwfn, p_hwfn->p_dpc_ptt, MCP_REG_CPU_STATE); in qed_mcp_attn_cb()
95 DP_INFO(p_hwfn->cdev, "MCP_REG_CPU_STATE: %08x - Masking...\n", in qed_mcp_attn_cb()
97 qed_wr(p_hwfn, p_hwfn->p_dpc_ptt, MCP_REG_CPU_EVENT_MASK, in qed_mcp_attn_cb()
116 static int qed_pswhst_attn_cb(struct qed_hwfn *p_hwfn) in qed_pswhst_attn_cb() argument
118 u32 tmp = qed_rd(p_hwfn, p_hwfn->p_dpc_ptt, in qed_pswhst_attn_cb()
124 addr = qed_rd(p_hwfn, p_hwfn->p_dpc_ptt, in qed_pswhst_attn_cb()
126 data = qed_rd(p_hwfn, p_hwfn->p_dpc_ptt, in qed_pswhst_attn_cb()
128 length = qed_rd(p_hwfn, p_hwfn->p_dpc_ptt, in qed_pswhst_attn_cb()
131 DP_INFO(p_hwfn->cdev, in qed_pswhst_attn_cb()
180 static int qed_grc_attn_cb(struct qed_hwfn *p_hwfn) in qed_grc_attn_cb() argument
187 tmp = qed_rd(p_hwfn, p_hwfn->p_dpc_ptt, in qed_grc_attn_cb()
193 tmp = qed_rd(p_hwfn, p_hwfn->p_dpc_ptt, in qed_grc_attn_cb()
195 tmp2 = qed_rd(p_hwfn, p_hwfn->p_dpc_ptt, in qed_grc_attn_cb()
198 DP_INFO(p_hwfn->cdev, in qed_grc_attn_cb()
211 qed_wr(p_hwfn, p_hwfn->p_dpc_ptt, in qed_grc_attn_cb()
234 int qed_pglueb_rbc_attn_handler(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, in qed_pglueb_rbc_attn_handler() argument
240 tmp = qed_rd(p_hwfn, p_ptt, PGLUE_B_REG_TX_ERR_WR_DETAILS2); in qed_pglueb_rbc_attn_handler()
244 addr_lo = qed_rd(p_hwfn, p_ptt, in qed_pglueb_rbc_attn_handler()
246 addr_hi = qed_rd(p_hwfn, p_ptt, in qed_pglueb_rbc_attn_handler()
248 details = qed_rd(p_hwfn, p_ptt, in qed_pglueb_rbc_attn_handler()
265 DP_VERBOSE(p_hwfn, NETIF_MSG_INTR, "%s\n", msg); in qed_pglueb_rbc_attn_handler()
267 DP_NOTICE(p_hwfn, "%s\n", msg); in qed_pglueb_rbc_attn_handler()
270 tmp = qed_rd(p_hwfn, p_ptt, PGLUE_B_REG_TX_ERR_RD_DETAILS2); in qed_pglueb_rbc_attn_handler()
274 addr_lo = qed_rd(p_hwfn, p_ptt, in qed_pglueb_rbc_attn_handler()
276 addr_hi = qed_rd(p_hwfn, p_ptt, in qed_pglueb_rbc_attn_handler()
278 details = qed_rd(p_hwfn, p_ptt, in qed_pglueb_rbc_attn_handler()
281 DP_NOTICE(p_hwfn, in qed_pglueb_rbc_attn_handler()
299 tmp = qed_rd(p_hwfn, p_ptt, PGLUE_B_REG_TX_ERR_WR_DETAILS_ICPL); in qed_pglueb_rbc_attn_handler()
304 DP_VERBOSE(p_hwfn, NETIF_MSG_INTR, "%s\n", msg); in qed_pglueb_rbc_attn_handler()
306 DP_NOTICE(p_hwfn, "%s\n", msg); in qed_pglueb_rbc_attn_handler()
309 tmp = qed_rd(p_hwfn, p_ptt, PGLUE_B_REG_MASTER_ZLR_ERR_DETAILS); in qed_pglueb_rbc_attn_handler()
313 addr_lo = qed_rd(p_hwfn, p_ptt, in qed_pglueb_rbc_attn_handler()
315 addr_hi = qed_rd(p_hwfn, p_ptt, in qed_pglueb_rbc_attn_handler()
318 DP_NOTICE(p_hwfn, "ZLR error - %08x [Address %08x:%08x]\n", in qed_pglueb_rbc_attn_handler()
322 tmp = qed_rd(p_hwfn, p_ptt, PGLUE_B_REG_VF_ILT_ERR_DETAILS2); in qed_pglueb_rbc_attn_handler()
326 addr_lo = qed_rd(p_hwfn, p_ptt, in qed_pglueb_rbc_attn_handler()
328 addr_hi = qed_rd(p_hwfn, p_ptt, in qed_pglueb_rbc_attn_handler()
330 details = qed_rd(p_hwfn, p_ptt, in qed_pglueb_rbc_attn_handler()
333 DP_NOTICE(p_hwfn, in qed_pglueb_rbc_attn_handler()
339 qed_wr(p_hwfn, p_ptt, PGLUE_B_REG_LATCHED_ERRORS_CLR, BIT(2)); in qed_pglueb_rbc_attn_handler()
344 static int qed_pglueb_rbc_attn_cb(struct qed_hwfn *p_hwfn) in qed_pglueb_rbc_attn_cb() argument
346 return qed_pglueb_rbc_attn_handler(p_hwfn, p_hwfn->p_dpc_ptt, false); in qed_pglueb_rbc_attn_cb()
349 static int qed_fw_assertion(struct qed_hwfn *p_hwfn) in qed_fw_assertion() argument
351 qed_hw_err_notify(p_hwfn, p_hwfn->p_dpc_ptt, QED_HW_ERR_FW_ASSERT, in qed_fw_assertion()
355 qed_wr(p_hwfn, p_hwfn->p_dpc_ptt, MISC_REG_AEU_GENERAL_ATTN_32, 0); in qed_fw_assertion()
360 static int qed_general_attention_35(struct qed_hwfn *p_hwfn) in qed_general_attention_35() argument
362 DP_INFO(p_hwfn, "General attention 35!\n"); in qed_general_attention_35()
376 static int qed_db_rec_flush_queue(struct qed_hwfn *p_hwfn, in qed_db_rec_flush_queue() argument
383 qed_wr(p_hwfn, p_ptt, DORQ_REG_DPM_FORCE_ABORT, 0x1); in qed_db_rec_flush_queue()
396 usage = qed_rd(p_hwfn, p_ptt, DORQ_REG_PF_USAGE_CNT); in qed_db_rec_flush_queue()
402 DP_NOTICE(p_hwfn->cdev, in qed_db_rec_flush_queue()
411 int qed_db_rec_handler(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) in qed_db_rec_handler() argument
417 &p_hwfn->db_recovery_info.overflow); in qed_db_rec_handler()
418 cur_ovfl = qed_rd(p_hwfn, p_ptt, DORQ_REG_PF_OVFL_STICKY); in qed_db_rec_handler()
422 DP_NOTICE(p_hwfn, "PF Overflow sticky: attn %u current %u\n", in qed_db_rec_handler()
425 if (cur_ovfl && !p_hwfn->db_bar_no_edpm) { in qed_db_rec_handler()
426 rc = qed_db_rec_flush_queue(p_hwfn, p_ptt); in qed_db_rec_handler()
432 qed_wr(p_hwfn, p_ptt, DORQ_REG_PF_OVFL_STICKY, 0x0); in qed_db_rec_handler()
435 qed_db_recovery_execute(p_hwfn); in qed_db_rec_handler()
440 static void qed_dorq_attn_overflow(struct qed_hwfn *p_hwfn) in qed_dorq_attn_overflow() argument
442 struct qed_ptt *p_ptt = p_hwfn->p_dpc_ptt; in qed_dorq_attn_overflow()
446 overflow = qed_rd(p_hwfn, p_ptt, DORQ_REG_PF_OVFL_STICKY); in qed_dorq_attn_overflow()
451 set_bit(QED_OVERFLOW_BIT, &p_hwfn->db_recovery_info.overflow); in qed_dorq_attn_overflow()
453 if (!p_hwfn->db_bar_no_edpm) { in qed_dorq_attn_overflow()
454 rc = qed_db_rec_flush_queue(p_hwfn, p_ptt); in qed_dorq_attn_overflow()
459 qed_wr(p_hwfn, p_ptt, DORQ_REG_PF_OVFL_STICKY, 0x0); in qed_dorq_attn_overflow()
462 qed_periodic_db_rec_start(p_hwfn); in qed_dorq_attn_overflow()
465 static int qed_dorq_attn_int_sts(struct qed_hwfn *p_hwfn) in qed_dorq_attn_int_sts() argument
468 struct qed_ptt *p_ptt = p_hwfn->p_dpc_ptt; in qed_dorq_attn_int_sts()
470 int_sts = qed_rd(p_hwfn, p_ptt, DORQ_REG_INT_STS); in qed_dorq_attn_int_sts()
472 DP_NOTICE(p_hwfn->cdev, in qed_dorq_attn_int_sts()
486 DP_NOTICE(p_hwfn->cdev, "DORQ attention. int_sts was %x\n", int_sts); in qed_dorq_attn_int_sts()
492 first_drop_reason = qed_rd(p_hwfn, p_ptt, in qed_dorq_attn_int_sts()
495 details = qed_rd(p_hwfn, p_ptt, DORQ_REG_DB_DROP_DETAILS); in qed_dorq_attn_int_sts()
496 address = qed_rd(p_hwfn, p_ptt, in qed_dorq_attn_int_sts()
498 all_drops_reason = qed_rd(p_hwfn, p_ptt, in qed_dorq_attn_int_sts()
502 DP_NOTICE(p_hwfn->cdev, in qed_dorq_attn_int_sts()
515 qed_wr(p_hwfn, p_ptt, DORQ_REG_DB_DROP_DETAILS_REL, 0); in qed_dorq_attn_int_sts()
520 qed_wr(p_hwfn, in qed_dorq_attn_int_sts()
534 DP_INFO(p_hwfn, "DORQ fatal attention\n"); in qed_dorq_attn_int_sts()
539 static int qed_dorq_attn_cb(struct qed_hwfn *p_hwfn) in qed_dorq_attn_cb() argument
541 if (p_hwfn->cdev->recov_in_prog) in qed_dorq_attn_cb()
544 p_hwfn->db_recovery_info.dorq_attn = true; in qed_dorq_attn_cb()
545 qed_dorq_attn_overflow(p_hwfn); in qed_dorq_attn_cb()
547 return qed_dorq_attn_int_sts(p_hwfn); in qed_dorq_attn_cb()
550 static void qed_dorq_attn_handler(struct qed_hwfn *p_hwfn) in qed_dorq_attn_handler() argument
552 if (p_hwfn->db_recovery_info.dorq_attn) in qed_dorq_attn_handler()
556 qed_dorq_attn_cb(p_hwfn); in qed_dorq_attn_handler()
558 p_hwfn->db_recovery_info.dorq_attn = false; in qed_dorq_attn_handler()
782 qed_int_aeu_translate(struct qed_hwfn *p_hwfn, in qed_int_aeu_translate() argument
785 if (!QED_IS_BB(p_hwfn->cdev)) in qed_int_aeu_translate()
795 static bool qed_int_is_parity_flag(struct qed_hwfn *p_hwfn, in qed_int_is_parity_flag() argument
798 return !!(qed_int_aeu_translate(p_hwfn, p_bit)->flags & in qed_int_is_parity_flag()
825 static inline u16 qed_attn_update_idx(struct qed_hwfn *p_hwfn, in qed_attn_update_idx() argument
847 static int qed_int_assertion(struct qed_hwfn *p_hwfn, u16 asserted_bits) in qed_int_assertion() argument
849 struct qed_sb_attn_info *sb_attn_sw = p_hwfn->p_sb_attn; in qed_int_assertion()
853 igu_mask = qed_rd(p_hwfn, p_hwfn->p_dpc_ptt, IGU_REG_ATTENTION_ENABLE); in qed_int_assertion()
854 DP_VERBOSE(p_hwfn, NETIF_MSG_INTR, "IGU mask: 0x%08x --> 0x%08x\n", in qed_int_assertion()
857 qed_wr(p_hwfn, p_hwfn->p_dpc_ptt, IGU_REG_ATTENTION_ENABLE, igu_mask); in qed_int_assertion()
859 DP_VERBOSE(p_hwfn, NETIF_MSG_INTR, in qed_int_assertion()
867 qed_mcp_handle_events(p_hwfn, p_hwfn->p_dpc_ptt); in qed_int_assertion()
869 qed_wr(p_hwfn, p_hwfn->p_dpc_ptt, in qed_int_assertion()
873 DIRECT_REG_WR((u8 __iomem *)p_hwfn->regview + in qed_int_assertion()
879 DP_VERBOSE(p_hwfn, NETIF_MSG_INTR, "set cmd IGU: 0x%04x\n", in qed_int_assertion()
885 static void qed_int_attn_print(struct qed_hwfn *p_hwfn, in qed_int_attn_print() argument
894 status = qed_dbg_read_attn(p_hwfn, p_hwfn->p_dpc_ptt, id, type, in qed_int_attn_print()
897 DP_NOTICE(p_hwfn, in qed_int_attn_print()
901 qed_dbg_parse_attn(p_hwfn, &attn_results); in qed_int_attn_print()
918 qed_int_deassertion_aeu_bit(struct qed_hwfn *p_hwfn, in qed_int_deassertion_aeu_bit() argument
927 DP_INFO(p_hwfn, "Deasserted attention `%s'[%08x]\n", in qed_int_deassertion_aeu_bit()
932 DP_INFO(p_hwfn, "`%s (attention)': Calling Callback function\n", in qed_int_deassertion_aeu_bit()
934 rc = p_aeu->cb(p_hwfn); in qed_int_deassertion_aeu_bit()
942 qed_int_attn_print(p_hwfn, p_aeu->block_index, in qed_int_deassertion_aeu_bit()
947 qed_hw_err_notify(p_hwfn, p_hwfn->p_dpc_ptt, QED_HW_ERR_HW_ATTN, in qed_int_deassertion_aeu_bit()
954 val = qed_rd(p_hwfn, p_hwfn->p_dpc_ptt, aeu_en_reg); in qed_int_deassertion_aeu_bit()
955 qed_wr(p_hwfn, p_hwfn->p_dpc_ptt, aeu_en_reg, (val & ~bitmask)); in qed_int_deassertion_aeu_bit()
956 DP_INFO(p_hwfn, "`%s' - Disabled future attentions\n", in qed_int_deassertion_aeu_bit()
960 val = qed_rd(p_hwfn, p_hwfn->p_dpc_ptt, in qed_int_deassertion_aeu_bit()
963 qed_wr(p_hwfn, p_hwfn->p_dpc_ptt, in qed_int_deassertion_aeu_bit()
978 static void qed_int_deassertion_parity(struct qed_hwfn *p_hwfn, in qed_int_deassertion_parity() argument
984 DP_NOTICE(p_hwfn->cdev, in qed_int_deassertion_parity()
989 qed_int_attn_print(p_hwfn, block_id, ATTN_TYPE_PARITY, false); in qed_int_deassertion_parity()
993 qed_int_attn_print(p_hwfn, BLOCK_OPTE, in qed_int_deassertion_parity()
995 qed_int_attn_print(p_hwfn, BLOCK_MCP, in qed_int_deassertion_parity()
1002 val = qed_rd(p_hwfn, p_hwfn->p_dpc_ptt, aeu_en_reg); in qed_int_deassertion_parity()
1003 qed_wr(p_hwfn, p_hwfn->p_dpc_ptt, aeu_en_reg, val & mask); in qed_int_deassertion_parity()
1004 DP_INFO(p_hwfn, "`%s' - Disabled future parity errors\n", in qed_int_deassertion_parity()
1017 static int qed_int_deassertion(struct qed_hwfn *p_hwfn, in qed_int_deassertion() argument
1020 struct qed_sb_attn_info *sb_attn_sw = p_hwfn->p_sb_attn; in qed_int_deassertion()
1027 aeu_inv_arr[i] = qed_rd(p_hwfn, p_hwfn->p_dpc_ptt, in qed_int_deassertion()
1030 DP_VERBOSE(p_hwfn, NETIF_MSG_INTR, in qed_int_deassertion()
1041 en = qed_rd(p_hwfn, p_hwfn->p_dpc_ptt, aeu_en); in qed_int_deassertion()
1051 if (qed_int_is_parity_flag(p_hwfn, p_bit) && in qed_int_deassertion()
1053 qed_int_deassertion_parity(p_hwfn, p_bit, in qed_int_deassertion()
1075 en = qed_rd(p_hwfn, p_hwfn->p_dpc_ptt, aeu_en); in qed_int_deassertion()
1091 p_aeu = qed_int_aeu_translate(p_hwfn, p_aeu); in qed_int_deassertion()
1095 if (qed_int_is_parity_flag(p_hwfn, p_aeu)) { in qed_int_deassertion()
1131 qed_int_deassertion_aeu_bit(p_hwfn, in qed_int_deassertion()
1144 qed_dorq_attn_handler(p_hwfn); in qed_int_deassertion()
1147 DIRECT_REG_WR((u8 __iomem *)p_hwfn->regview + in qed_int_deassertion()
1154 aeu_mask = qed_rd(p_hwfn, p_hwfn->p_dpc_ptt, IGU_REG_ATTENTION_ENABLE); in qed_int_deassertion()
1156 qed_wr(p_hwfn, p_hwfn->p_dpc_ptt, IGU_REG_ATTENTION_ENABLE, aeu_mask); in qed_int_deassertion()
1164 static int qed_int_attentions(struct qed_hwfn *p_hwfn) in qed_int_attentions() argument
1166 struct qed_sb_attn_info *p_sb_attn_sw = p_hwfn->p_sb_attn; in qed_int_attentions()
1196 DP_INFO(p_hwfn, in qed_int_attentions()
1201 DP_VERBOSE(p_hwfn, NETIF_MSG_INTR, in qed_int_attentions()
1204 DP_VERBOSE(p_hwfn, NETIF_MSG_INTR, in qed_int_attentions()
1209 rc = qed_int_assertion(p_hwfn, asserted_bits); in qed_int_attentions()
1215 rc = qed_int_deassertion(p_hwfn, deasserted_bits); in qed_int_attentions()
1220 static void qed_sb_ack_attn(struct qed_hwfn *p_hwfn, in qed_sb_ack_attn() argument
1241 struct qed_hwfn *p_hwfn = from_tasklet(p_hwfn, t, sp_dpc); in qed_int_sp_dpc() local
1248 if (!p_hwfn->p_sp_sb) { in qed_int_sp_dpc()
1249 DP_ERR(p_hwfn->cdev, "DPC called - no p_sp_sb\n"); in qed_int_sp_dpc()
1253 sb_info = &p_hwfn->p_sp_sb->sb_info; in qed_int_sp_dpc()
1254 arr_size = ARRAY_SIZE(p_hwfn->p_sp_sb->pi_info_arr); in qed_int_sp_dpc()
1256 DP_ERR(p_hwfn->cdev, in qed_int_sp_dpc()
1261 if (!p_hwfn->p_sb_attn) { in qed_int_sp_dpc()
1262 DP_ERR(p_hwfn->cdev, "DPC called - no p_sb_attn"); in qed_int_sp_dpc()
1265 sb_attn = p_hwfn->p_sb_attn; in qed_int_sp_dpc()
1267 DP_VERBOSE(p_hwfn, NETIF_MSG_INTR, "DPC Called! (hwfn %p %d)\n", in qed_int_sp_dpc()
1268 p_hwfn, p_hwfn->my_id); in qed_int_sp_dpc()
1277 DP_ERR(p_hwfn->cdev, in qed_int_sp_dpc()
1283 DP_VERBOSE(p_hwfn->cdev, NETIF_MSG_INTR, in qed_int_sp_dpc()
1289 DP_ERR(p_hwfn->cdev, in qed_int_sp_dpc()
1294 rc |= qed_attn_update_idx(p_hwfn, sb_attn); in qed_int_sp_dpc()
1295 DP_VERBOSE(p_hwfn->cdev, NETIF_MSG_INTR, in qed_int_sp_dpc()
1307 if (!p_hwfn->p_dpc_ptt) { in qed_int_sp_dpc()
1308 DP_NOTICE(p_hwfn->cdev, "Failed to allocate PTT\n"); in qed_int_sp_dpc()
1314 qed_int_attentions(p_hwfn); in qed_int_sp_dpc()
1321 pi_info = &p_hwfn->p_sp_sb->pi_info_arr[pi]; in qed_int_sp_dpc()
1323 pi_info->comp_cb(p_hwfn, pi_info->cookie); in qed_int_sp_dpc()
1331 qed_sb_ack_attn(p_hwfn, sb_info->igu_addr, sb_attn->index); in qed_int_sp_dpc()
1336 static void qed_int_sb_attn_free(struct qed_hwfn *p_hwfn) in qed_int_sb_attn_free() argument
1338 struct qed_sb_attn_info *p_sb = p_hwfn->p_sb_attn; in qed_int_sb_attn_free()
1344 dma_free_coherent(&p_hwfn->cdev->pdev->dev, in qed_int_sb_attn_free()
1345 SB_ATTN_ALIGNED_SIZE(p_hwfn), in qed_int_sb_attn_free()
1348 p_hwfn->p_sb_attn = NULL; in qed_int_sb_attn_free()
1351 static void qed_int_sb_attn_setup(struct qed_hwfn *p_hwfn, in qed_int_sb_attn_setup() argument
1354 struct qed_sb_attn_info *sb_info = p_hwfn->p_sb_attn; in qed_int_sb_attn_setup()
1362 qed_wr(p_hwfn, p_ptt, IGU_REG_ATTN_MSG_ADDR_L, in qed_int_sb_attn_setup()
1363 lower_32_bits(p_hwfn->p_sb_attn->sb_phys)); in qed_int_sb_attn_setup()
1364 qed_wr(p_hwfn, p_ptt, IGU_REG_ATTN_MSG_ADDR_H, in qed_int_sb_attn_setup()
1365 upper_32_bits(p_hwfn->p_sb_attn->sb_phys)); in qed_int_sb_attn_setup()
1368 static void qed_int_sb_attn_init(struct qed_hwfn *p_hwfn, in qed_int_sb_attn_init() argument
1372 struct qed_sb_attn_info *sb_info = p_hwfn->p_sb_attn; in qed_int_sb_attn_init()
1389 if (qed_int_is_parity_flag(p_hwfn, p_aeu)) in qed_int_sb_attn_init()
1394 DP_VERBOSE(p_hwfn, NETIF_MSG_INTR, in qed_int_sb_attn_init()
1400 sb_info->mfw_attn_addr = (p_hwfn->rel_pf_id << 3) + in qed_int_sb_attn_init()
1403 qed_int_sb_attn_setup(p_hwfn, p_ptt); in qed_int_sb_attn_init()
1406 static int qed_int_sb_attn_alloc(struct qed_hwfn *p_hwfn, in qed_int_sb_attn_alloc() argument
1409 struct qed_dev *cdev = p_hwfn->cdev; in qed_int_sb_attn_alloc()
1421 SB_ATTN_ALIGNED_SIZE(p_hwfn), in qed_int_sb_attn_alloc()
1430 p_hwfn->p_sb_attn = p_sb; in qed_int_sb_attn_alloc()
1431 qed_int_sb_attn_init(p_hwfn, p_ptt, p_virt, p_phys); in qed_int_sb_attn_alloc()
1440 void qed_init_cau_sb_entry(struct qed_hwfn *p_hwfn, in qed_init_cau_sb_entry() argument
1444 struct qed_dev *cdev = p_hwfn->cdev; in qed_init_cau_sb_entry()
1491 static void qed_int_cau_conf_pi(struct qed_hwfn *p_hwfn, in qed_int_cau_conf_pi() argument
1501 if (IS_VF(p_hwfn->cdev)) in qed_int_cau_conf_pi()
1513 if (p_hwfn->hw_init_done) in qed_int_cau_conf_pi()
1514 qed_wr(p_hwfn, p_ptt, in qed_int_cau_conf_pi()
1517 STORE_RT_REG(p_hwfn, CAU_REG_PI_MEMORY_RT_OFFSET + pi_offset, in qed_int_cau_conf_pi()
1521 void qed_int_cau_conf_sb(struct qed_hwfn *p_hwfn, in qed_int_cau_conf_sb() argument
1528 qed_init_cau_sb_entry(p_hwfn, &sb_entry, p_hwfn->rel_pf_id, in qed_int_cau_conf_sb()
1531 if (p_hwfn->hw_init_done) { in qed_int_cau_conf_sb()
1535 qed_dmae_host2grc(p_hwfn, p_ptt, (u64)(uintptr_t)&phys_addr, in qed_int_cau_conf_sb()
1538 qed_dmae_host2grc(p_hwfn, p_ptt, (u64)(uintptr_t)&sb_entry, in qed_int_cau_conf_sb()
1543 STORE_RT_REG_AGG(p_hwfn, in qed_int_cau_conf_sb()
1548 STORE_RT_REG_AGG(p_hwfn, in qed_int_cau_conf_sb()
1555 if (p_hwfn->cdev->int_coalescing_mode == QED_COAL_MODE_ENABLE) { in qed_int_cau_conf_sb()
1556 u8 num_tc = p_hwfn->hw_info.num_hw_tc; in qed_int_cau_conf_sb()
1561 if (p_hwfn->cdev->rx_coalesce_usecs <= 0x7F) in qed_int_cau_conf_sb()
1563 else if (p_hwfn->cdev->rx_coalesce_usecs <= 0xFF) in qed_int_cau_conf_sb()
1567 timeset = (u8)(p_hwfn->cdev->rx_coalesce_usecs >> timer_res); in qed_int_cau_conf_sb()
1568 qed_int_cau_conf_pi(p_hwfn, p_ptt, igu_sb_id, RX_PI, in qed_int_cau_conf_sb()
1571 if (p_hwfn->cdev->tx_coalesce_usecs <= 0x7F) in qed_int_cau_conf_sb()
1573 else if (p_hwfn->cdev->tx_coalesce_usecs <= 0xFF) in qed_int_cau_conf_sb()
1577 timeset = (u8)(p_hwfn->cdev->tx_coalesce_usecs >> timer_res); in qed_int_cau_conf_sb()
1579 qed_int_cau_conf_pi(p_hwfn, p_ptt, in qed_int_cau_conf_sb()
1587 void qed_int_sb_setup(struct qed_hwfn *p_hwfn, in qed_int_sb_setup() argument
1594 if (IS_PF(p_hwfn->cdev)) in qed_int_sb_setup()
1595 qed_int_cau_conf_sb(p_hwfn, p_ptt, sb_info->sb_phys, in qed_int_sb_setup()
1599 struct qed_igu_block *qed_get_igu_free_sb(struct qed_hwfn *p_hwfn, bool b_is_pf) in qed_get_igu_free_sb() argument
1604 for (igu_id = 0; igu_id < QED_MAPPING_MEMORY_SIZE(p_hwfn->cdev); in qed_get_igu_free_sb()
1606 p_block = &p_hwfn->hw_info.p_igu_info->entry[igu_id]; in qed_get_igu_free_sb()
1619 static u16 qed_get_pf_igu_sb_id(struct qed_hwfn *p_hwfn, u16 vector_id) in qed_get_pf_igu_sb_id() argument
1624 for (igu_id = 0; igu_id < QED_MAPPING_MEMORY_SIZE(p_hwfn->cdev); in qed_get_pf_igu_sb_id()
1626 p_block = &p_hwfn->hw_info.p_igu_info->entry[igu_id]; in qed_get_pf_igu_sb_id()
1639 u16 qed_get_igu_sb_id(struct qed_hwfn *p_hwfn, u16 sb_id) in qed_get_igu_sb_id() argument
1645 igu_sb_id = p_hwfn->hw_info.p_igu_info->igu_dsb_id; in qed_get_igu_sb_id()
1646 else if (IS_PF(p_hwfn->cdev)) in qed_get_igu_sb_id()
1647 igu_sb_id = qed_get_pf_igu_sb_id(p_hwfn, sb_id + 1); in qed_get_igu_sb_id()
1649 igu_sb_id = qed_vf_get_igu_sb_id(p_hwfn, sb_id); in qed_get_igu_sb_id()
1652 DP_VERBOSE(p_hwfn, NETIF_MSG_INTR, in qed_get_igu_sb_id()
1655 DP_VERBOSE(p_hwfn, NETIF_MSG_INTR, in qed_get_igu_sb_id()
1661 int qed_int_sb_init(struct qed_hwfn *p_hwfn, in qed_int_sb_init() argument
1669 sb_info->igu_sb_id = qed_get_igu_sb_id(p_hwfn, sb_id); in qed_int_sb_init()
1672 if (IS_PF(p_hwfn->cdev)) { in qed_int_sb_init()
1676 p_info = p_hwfn->hw_info.p_igu_info; in qed_int_sb_init()
1683 qed_vf_set_sb_info(p_hwfn, sb_id, sb_info); in qed_int_sb_init()
1687 sb_info->cdev = p_hwfn->cdev; in qed_int_sb_init()
1692 if (IS_PF(p_hwfn->cdev)) { in qed_int_sb_init()
1693 sb_info->igu_addr = (u8 __iomem *)p_hwfn->regview + in qed_int_sb_init()
1697 sb_info->igu_addr = (u8 __iomem *)p_hwfn->regview + in qed_int_sb_init()
1705 qed_int_sb_setup(p_hwfn, p_ptt, sb_info); in qed_int_sb_init()
1710 int qed_int_sb_release(struct qed_hwfn *p_hwfn, in qed_int_sb_release() argument
1723 if (IS_VF(p_hwfn->cdev)) { in qed_int_sb_release()
1724 qed_vf_set_sb_info(p_hwfn, sb_id, NULL); in qed_int_sb_release()
1728 p_info = p_hwfn->hw_info.p_igu_info; in qed_int_sb_release()
1733 DP_ERR(p_hwfn, "Do Not free sp sb using this function"); in qed_int_sb_release()
1745 static void qed_int_sp_sb_free(struct qed_hwfn *p_hwfn) in qed_int_sp_sb_free() argument
1747 struct qed_sb_sp_info *p_sb = p_hwfn->p_sp_sb; in qed_int_sp_sb_free()
1753 dma_free_coherent(&p_hwfn->cdev->pdev->dev, in qed_int_sp_sb_free()
1754 SB_ALIGNED_SIZE(p_hwfn), in qed_int_sp_sb_free()
1758 p_hwfn->p_sp_sb = NULL; in qed_int_sp_sb_free()
1761 static int qed_int_sp_sb_alloc(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) in qed_int_sp_sb_alloc() argument
1773 p_virt = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev, in qed_int_sp_sb_alloc()
1774 SB_ALIGNED_SIZE(p_hwfn), in qed_int_sp_sb_alloc()
1782 p_hwfn->p_sp_sb = p_sb; in qed_int_sp_sb_alloc()
1783 qed_int_sb_init(p_hwfn, p_ptt, &p_sb->sb_info, p_virt, in qed_int_sp_sb_alloc()
1791 int qed_int_register_cb(struct qed_hwfn *p_hwfn, in qed_int_register_cb() argument
1795 struct qed_sb_sp_info *p_sp_sb = p_hwfn->p_sp_sb; in qed_int_register_cb()
1815 int qed_int_unregister_cb(struct qed_hwfn *p_hwfn, u8 pi) in qed_int_unregister_cb() argument
1817 struct qed_sb_sp_info *p_sp_sb = p_hwfn->p_sp_sb; in qed_int_unregister_cb()
1828 u16 qed_int_get_sp_sb_id(struct qed_hwfn *p_hwfn) in qed_int_get_sp_sb_id() argument
1830 return p_hwfn->p_sp_sb->sb_info.igu_sb_id; in qed_int_get_sp_sb_id()
1833 void qed_int_igu_enable_int(struct qed_hwfn *p_hwfn, in qed_int_igu_enable_int() argument
1838 p_hwfn->cdev->int_mode = int_mode; in qed_int_igu_enable_int()
1839 switch (p_hwfn->cdev->int_mode) { in qed_int_igu_enable_int()
1857 qed_wr(p_hwfn, p_ptt, IGU_REG_PF_CONFIGURATION, igu_pf_conf); in qed_int_igu_enable_int()
1860 static void qed_int_igu_enable_attn(struct qed_hwfn *p_hwfn, in qed_int_igu_enable_attn() argument
1865 qed_wr(p_hwfn, p_ptt, IGU_REG_ATTENTION_ENABLE, 0); in qed_int_igu_enable_attn()
1866 qed_wr(p_hwfn, p_ptt, IGU_REG_LEADING_EDGE_LATCH, 0xfff); in qed_int_igu_enable_attn()
1867 qed_wr(p_hwfn, p_ptt, IGU_REG_TRAILING_EDGE_LATCH, 0xfff); in qed_int_igu_enable_attn()
1868 qed_wr(p_hwfn, p_ptt, IGU_REG_ATTENTION_ENABLE, 0xfff); in qed_int_igu_enable_attn()
1871 qed_wr(p_hwfn, p_ptt, MISC_REG_AEU_MASK_ATTN_IGU, 0xff); in qed_int_igu_enable_attn()
1875 qed_int_igu_enable(struct qed_hwfn *p_hwfn, in qed_int_igu_enable() argument
1880 qed_int_igu_enable_attn(p_hwfn, p_ptt); in qed_int_igu_enable()
1882 if ((int_mode != QED_INT_MODE_INTA) || IS_LEAD_HWFN(p_hwfn)) { in qed_int_igu_enable()
1883 rc = qed_slowpath_irq_req(p_hwfn); in qed_int_igu_enable()
1885 DP_NOTICE(p_hwfn, "Slowpath IRQ request failed\n"); in qed_int_igu_enable()
1888 p_hwfn->b_int_requested = true; in qed_int_igu_enable()
1891 qed_int_igu_enable_int(p_hwfn, p_ptt, int_mode); in qed_int_igu_enable()
1892 p_hwfn->b_int_enabled = 1; in qed_int_igu_enable()
1897 void qed_int_igu_disable_int(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) in qed_int_igu_disable_int() argument
1899 p_hwfn->b_int_enabled = 0; in qed_int_igu_disable_int()
1901 if (IS_VF(p_hwfn->cdev)) in qed_int_igu_disable_int()
1904 qed_wr(p_hwfn, p_ptt, IGU_REG_PF_CONFIGURATION, 0); in qed_int_igu_disable_int()
1908 static void qed_int_igu_cleanup_sb(struct qed_hwfn *p_hwfn, in qed_int_igu_cleanup_sb() argument
1927 qed_wr(p_hwfn, p_ptt, IGU_REG_COMMAND_REG_32LSB_DATA, data); in qed_int_igu_cleanup_sb()
1931 qed_wr(p_hwfn, p_ptt, IGU_REG_COMMAND_REG_CTRL, cmd_ctrl); in qed_int_igu_cleanup_sb()
1941 val = qed_rd(p_hwfn, p_ptt, sb_bit_addr); in qed_int_igu_cleanup_sb()
1950 DP_NOTICE(p_hwfn, in qed_int_igu_cleanup_sb()
1955 void qed_int_igu_init_pure_rt_single(struct qed_hwfn *p_hwfn, in qed_int_igu_init_pure_rt_single() argument
1962 p_block = &p_hwfn->hw_info.p_igu_info->entry[igu_sb_id]; in qed_int_igu_init_pure_rt_single()
1963 DP_VERBOSE(p_hwfn, NETIF_MSG_INTR, in qed_int_igu_init_pure_rt_single()
1971 qed_int_igu_cleanup_sb(p_hwfn, p_ptt, igu_sb_id, 1, opaque); in qed_int_igu_init_pure_rt_single()
1974 qed_int_igu_cleanup_sb(p_hwfn, p_ptt, igu_sb_id, 0, opaque); in qed_int_igu_init_pure_rt_single()
1980 val = qed_rd(p_hwfn, p_ptt, in qed_int_igu_init_pure_rt_single()
1989 DP_NOTICE(p_hwfn, in qed_int_igu_init_pure_rt_single()
1995 qed_wr(p_hwfn, p_ptt, in qed_int_igu_init_pure_rt_single()
1999 void qed_int_igu_init_pure_rt(struct qed_hwfn *p_hwfn, in qed_int_igu_init_pure_rt() argument
2003 struct qed_igu_info *p_info = p_hwfn->hw_info.p_igu_info; in qed_int_igu_init_pure_rt()
2008 val = qed_rd(p_hwfn, p_ptt, IGU_REG_BLOCK_CONFIGURATION); in qed_int_igu_init_pure_rt()
2011 qed_wr(p_hwfn, p_ptt, IGU_REG_BLOCK_CONFIGURATION, val); in qed_int_igu_init_pure_rt()
2014 igu_sb_id < QED_MAPPING_MEMORY_SIZE(p_hwfn->cdev); igu_sb_id++) { in qed_int_igu_init_pure_rt()
2022 qed_int_igu_init_pure_rt_single(p_hwfn, p_ptt, igu_sb_id, in qed_int_igu_init_pure_rt()
2023 p_hwfn->hw_info.opaque_fid, in qed_int_igu_init_pure_rt()
2028 qed_int_igu_init_pure_rt_single(p_hwfn, p_ptt, in qed_int_igu_init_pure_rt()
2030 p_hwfn->hw_info.opaque_fid, in qed_int_igu_init_pure_rt()
2034 int qed_int_igu_reset_cam(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) in qed_int_igu_reset_cam() argument
2036 struct qed_igu_info *p_info = p_hwfn->hw_info.p_igu_info; in qed_int_igu_reset_cam()
2042 if (!RESC_NUM(p_hwfn, QED_SB)) { in qed_int_igu_reset_cam()
2050 if (p_info->usage.cnt != RESC_NUM(p_hwfn, QED_SB) - 1) { in qed_int_igu_reset_cam()
2051 DP_INFO(p_hwfn, in qed_int_igu_reset_cam()
2053 RESC_NUM(p_hwfn, QED_SB) - 1, in qed_int_igu_reset_cam()
2055 p_info->usage.cnt = RESC_NUM(p_hwfn, QED_SB) - 1; in qed_int_igu_reset_cam()
2058 if (IS_PF_SRIOV(p_hwfn)) { in qed_int_igu_reset_cam()
2059 u16 vfs = p_hwfn->cdev->p_iov_info->total_vfs; in qed_int_igu_reset_cam()
2062 DP_VERBOSE(p_hwfn, in qed_int_igu_reset_cam()
2073 DP_NOTICE(p_hwfn, in qed_int_igu_reset_cam()
2101 igu_sb_id < QED_MAPPING_MEMORY_SIZE(p_hwfn->cdev); igu_sb_id++) { in qed_int_igu_reset_cam()
2109 p_block->function_id = p_hwfn->rel_pf_id; in qed_int_igu_reset_cam()
2117 p_block->function_id = p_hwfn->rel_pf_id; in qed_int_igu_reset_cam()
2125 p_hwfn->cdev->p_iov_info->first_vf_in_pf + in qed_int_igu_reset_cam()
2147 rval = qed_rd(p_hwfn, p_ptt, in qed_int_igu_reset_cam()
2151 qed_wr(p_hwfn, p_ptt, in qed_int_igu_reset_cam()
2155 DP_VERBOSE(p_hwfn, in qed_int_igu_reset_cam()
2168 static void qed_int_igu_read_cam_block(struct qed_hwfn *p_hwfn, in qed_int_igu_read_cam_block() argument
2171 u32 val = qed_rd(p_hwfn, p_ptt, in qed_int_igu_read_cam_block()
2175 p_block = &p_hwfn->hw_info.p_igu_info->entry[igu_sb_id]; in qed_int_igu_read_cam_block()
2184 int qed_int_igu_read_cam(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) in qed_int_igu_read_cam() argument
2191 p_hwfn->hw_info.p_igu_info = kzalloc(sizeof(*p_igu_info), GFP_KERNEL); in qed_int_igu_read_cam()
2192 if (!p_hwfn->hw_info.p_igu_info) in qed_int_igu_read_cam()
2195 p_igu_info = p_hwfn->hw_info.p_igu_info; in qed_int_igu_read_cam()
2201 if (p_hwfn->cdev->p_iov_info) { in qed_int_igu_read_cam()
2202 struct qed_hw_sriov_info *p_iov = p_hwfn->cdev->p_iov_info; in qed_int_igu_read_cam()
2209 igu_sb_id < QED_MAPPING_MEMORY_SIZE(p_hwfn->cdev); igu_sb_id++) { in qed_int_igu_read_cam()
2211 qed_int_igu_read_cam_block(p_hwfn, p_ptt, igu_sb_id); in qed_int_igu_read_cam()
2215 (p_block->function_id == p_hwfn->rel_pf_id)) { in qed_int_igu_read_cam()
2247 (p_hwfn->abs_pf_id == 0)) { in qed_int_igu_read_cam()
2248 DP_VERBOSE(p_hwfn, NETIF_MSG_INTR, in qed_int_igu_read_cam()
2256 DP_NOTICE(p_hwfn, in qed_int_igu_read_cam()
2266 DP_VERBOSE(p_hwfn, NETIF_MSG_INTR, in qed_int_igu_read_cam()
2279 void qed_int_igu_init_rt(struct qed_hwfn *p_hwfn) in qed_int_igu_init_rt() argument
2283 STORE_RT_REG(p_hwfn, IGU_REG_PF_CONFIGURATION_RT_OFFSET, igu_pf_conf); in qed_int_igu_init_rt()
2286 u64 qed_int_igu_read_sisr_reg(struct qed_hwfn *p_hwfn) in qed_int_igu_read_sisr_reg() argument
2295 intr_status_lo = REG_RD(p_hwfn, in qed_int_igu_read_sisr_reg()
2298 intr_status_hi = REG_RD(p_hwfn, in qed_int_igu_read_sisr_reg()
2306 static void qed_int_sp_dpc_setup(struct qed_hwfn *p_hwfn) in qed_int_sp_dpc_setup() argument
2308 tasklet_setup(&p_hwfn->sp_dpc, qed_int_sp_dpc); in qed_int_sp_dpc_setup()
2309 p_hwfn->b_sp_dpc_enabled = true; in qed_int_sp_dpc_setup()
2312 int qed_int_alloc(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) in qed_int_alloc() argument
2316 rc = qed_int_sp_sb_alloc(p_hwfn, p_ptt); in qed_int_alloc()
2320 rc = qed_int_sb_attn_alloc(p_hwfn, p_ptt); in qed_int_alloc()
2325 void qed_int_free(struct qed_hwfn *p_hwfn) in qed_int_free() argument
2327 qed_int_sp_sb_free(p_hwfn); in qed_int_free()
2328 qed_int_sb_attn_free(p_hwfn); in qed_int_free()
2331 void qed_int_setup(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) in qed_int_setup() argument
2333 qed_int_sb_setup(p_hwfn, p_ptt, &p_hwfn->p_sp_sb->sb_info); in qed_int_setup()
2334 qed_int_sb_attn_setup(p_hwfn, p_ptt); in qed_int_setup()
2335 qed_int_sp_dpc_setup(p_hwfn); in qed_int_setup()
2338 void qed_int_get_num_sbs(struct qed_hwfn *p_hwfn, in qed_int_get_num_sbs() argument
2341 struct qed_igu_info *info = p_hwfn->hw_info.p_igu_info; in qed_int_get_num_sbs()
2362 int qed_int_set_timer_res(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, in qed_int_set_timer_res() argument
2369 if (!p_hwfn->hw_init_done) { in qed_int_set_timer_res()
2370 DP_ERR(p_hwfn, "hardware not initialized yet\n"); in qed_int_set_timer_res()
2374 rc = qed_dmae_grc2host(p_hwfn, p_ptt, CAU_REG_SB_VAR_MEMORY + in qed_int_set_timer_res()
2378 DP_ERR(p_hwfn, "dmae_grc2host failed %d\n", rc); in qed_int_set_timer_res()
2391 rc = qed_dmae_host2grc(p_hwfn, p_ptt, in qed_int_set_timer_res()
2396 DP_ERR(p_hwfn, "dmae_host2grc failed %d\n", rc); in qed_int_set_timer_res()
2403 int qed_int_get_sb_dbg(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, in qed_int_get_sb_dbg() argument
2409 if (IS_VF(p_hwfn->cdev)) in qed_int_get_sb_dbg()
2412 if (sbid >= NUM_OF_SBS(p_hwfn->cdev)) in qed_int_get_sb_dbg()
2415 p_info->igu_prod = qed_rd(p_hwfn, p_ptt, IGU_REG_PRODUCER_MEMORY + sbid * 4); in qed_int_get_sb_dbg()
2416 p_info->igu_cons = qed_rd(p_hwfn, p_ptt, IGU_REG_CONSUMER_MEM + sbid * 4); in qed_int_get_sb_dbg()
2419 p_info->pi[i] = (u16)qed_rd(p_hwfn, p_ptt, in qed_int_get_sb_dbg()