Lines Matching refs:etha
459 desc->info1 = cpu_to_le64(INFO1_SPN(rdev->etha->index)); in rswitch_gwca_queue_ext_ts_fill()
971 static int rswitch_etha_change_mode(struct rswitch_etha *etha, in rswitch_etha_change_mode() argument
976 if (!rswitch_agent_clock_is_enabled(etha->coma_addr, etha->index)) in rswitch_etha_change_mode()
977 rswitch_agent_clock_ctrl(etha->coma_addr, etha->index, 1); in rswitch_etha_change_mode()
979 iowrite32(mode, etha->addr + EAMC); in rswitch_etha_change_mode()
981 ret = rswitch_reg_wait(etha->addr, EAMS, EAMS_OPS_MASK, mode); in rswitch_etha_change_mode()
984 rswitch_agent_clock_ctrl(etha->coma_addr, etha->index, 0); in rswitch_etha_change_mode()
989 static void rswitch_etha_read_mac_address(struct rswitch_etha *etha) in rswitch_etha_read_mac_address() argument
991 u32 mrmac0 = ioread32(etha->addr + MRMAC0); in rswitch_etha_read_mac_address()
992 u32 mrmac1 = ioread32(etha->addr + MRMAC1); in rswitch_etha_read_mac_address()
993 u8 *mac = ða->mac_addr[0]; in rswitch_etha_read_mac_address()
1003 static void rswitch_etha_write_mac_address(struct rswitch_etha *etha, const u8 *mac) in rswitch_etha_write_mac_address() argument
1005 iowrite32((mac[0] << 8) | mac[1], etha->addr + MRMAC0); in rswitch_etha_write_mac_address()
1007 etha->addr + MRMAC1); in rswitch_etha_write_mac_address()
1010 static int rswitch_etha_wait_link_verification(struct rswitch_etha *etha) in rswitch_etha_wait_link_verification() argument
1012 iowrite32(MLVC_PLV, etha->addr + MLVC); in rswitch_etha_wait_link_verification()
1014 return rswitch_reg_wait(etha->addr, MLVC, MLVC_PLV, 0); in rswitch_etha_wait_link_verification()
1017 static void rswitch_rmac_setting(struct rswitch_etha *etha, const u8 *mac) in rswitch_rmac_setting() argument
1021 rswitch_etha_write_mac_address(etha, mac); in rswitch_rmac_setting()
1023 switch (etha->speed) { in rswitch_rmac_setting()
1037 iowrite32(MPIC_PIS_GMII | val, etha->addr + MPIC); in rswitch_rmac_setting()
1040 static void rswitch_etha_enable_mii(struct rswitch_etha *etha) in rswitch_etha_enable_mii() argument
1042 rswitch_modify(etha->addr, MPIC, MPIC_PSMCS_MASK | MPIC_PSMHT_MASK, in rswitch_etha_enable_mii()
1044 rswitch_modify(etha->addr, MPSM, 0, MPSM_MFF_C45); in rswitch_etha_enable_mii()
1047 static int rswitch_etha_hw_init(struct rswitch_etha *etha, const u8 *mac) in rswitch_etha_hw_init() argument
1051 err = rswitch_etha_change_mode(etha, EAMC_OPC_DISABLE); in rswitch_etha_hw_init()
1054 err = rswitch_etha_change_mode(etha, EAMC_OPC_CONFIG); in rswitch_etha_hw_init()
1058 iowrite32(EAVCC_VEM_SC_TAG, etha->addr + EAVCC); in rswitch_etha_hw_init()
1059 rswitch_rmac_setting(etha, mac); in rswitch_etha_hw_init()
1060 rswitch_etha_enable_mii(etha); in rswitch_etha_hw_init()
1062 err = rswitch_etha_wait_link_verification(etha); in rswitch_etha_hw_init()
1066 err = rswitch_etha_change_mode(etha, EAMC_OPC_DISABLE); in rswitch_etha_hw_init()
1070 return rswitch_etha_change_mode(etha, EAMC_OPC_OPERATION); in rswitch_etha_hw_init()
1073 static int rswitch_etha_set_access(struct rswitch_etha *etha, bool read, in rswitch_etha_set_access() argument
1083 writel(MMIS1_CLEAR_FLAGS, etha->addr + MMIS1); in rswitch_etha_set_access()
1086 iowrite32((regad << 16) | (devad << 8) | (phyad << 3) | val, etha->addr + MPSM); in rswitch_etha_set_access()
1088 ret = rswitch_reg_wait(etha->addr, MMIS1, MMIS1_PAACS, MMIS1_PAACS); in rswitch_etha_set_access()
1092 rswitch_modify(etha->addr, MMIS1, MMIS1_PAACS, MMIS1_PAACS); in rswitch_etha_set_access()
1095 writel((pop << 13) | (devad << 8) | (phyad << 3) | val, etha->addr + MPSM); in rswitch_etha_set_access()
1097 ret = rswitch_reg_wait(etha->addr, MMIS1, MMIS1_PRACS, MMIS1_PRACS); in rswitch_etha_set_access()
1101 ret = (ioread32(etha->addr + MPSM) & MPSM_PRD_MASK) >> 16; in rswitch_etha_set_access()
1103 rswitch_modify(etha->addr, MMIS1, MMIS1_PRACS, MMIS1_PRACS); in rswitch_etha_set_access()
1106 etha->addr + MPSM); in rswitch_etha_set_access()
1108 ret = rswitch_reg_wait(etha->addr, MMIS1, MMIS1_PWACS, MMIS1_PWACS); in rswitch_etha_set_access()
1117 struct rswitch_etha *etha = bus->priv; in rswitch_etha_mii_read_c45() local
1119 return rswitch_etha_set_access(etha, true, addr, devad, regad, 0); in rswitch_etha_mii_read_c45()
1125 struct rswitch_etha *etha = bus->priv; in rswitch_etha_mii_write_c45() local
1127 return rswitch_etha_set_access(etha, false, addr, devad, regad, val); in rswitch_etha_mii_write_c45()
1148 if (index == rdev->etha->index) { in rswitch_get_port_node()
1169 err = of_get_phy_mode(rdev->np_port, &rdev->etha->phy_interface); in rswitch_etha_get_params()
1175 rdev->etha->speed = max_speed; in rswitch_etha_get_params()
1180 switch (rdev->etha->phy_interface) { in rswitch_etha_get_params()
1182 rdev->etha->speed = SPEED_100; in rswitch_etha_get_params()
1185 rdev->etha->speed = SPEED_1000; in rswitch_etha_get_params()
1188 rdev->etha->speed = SPEED_2500; in rswitch_etha_get_params()
1208 sprintf(mii_bus->id, "etha%d", rdev->etha->index); in rswitch_mii_register()
1209 mii_bus->priv = rdev->etha; in rswitch_mii_register()
1221 rdev->etha->mii = mii_bus; in rswitch_mii_register()
1231 if (rdev->etha->mii) { in rswitch_mii_unregister()
1232 mdiobus_unregister(rdev->etha->mii); in rswitch_mii_unregister()
1233 mdiobus_free(rdev->etha->mii); in rswitch_mii_unregister()
1234 rdev->etha->mii = NULL; in rswitch_mii_unregister()
1244 if (phydev->link != rdev->etha->link) { in rswitch_adjust_link()
1251 rdev->etha->link = phydev->link; in rswitch_adjust_link()
1259 switch (rdev->etha->speed) { in rswitch_phy_remove_link_mode()
1276 phy_set_max_speed(phydev, rdev->etha->speed); in rswitch_phy_remove_link_mode()
1298 __set_bit(rdev->etha->phy_interface, phydev->host_interfaces); in rswitch_phy_device_init()
1301 rdev->etha->phy_interface); in rswitch_phy_device_init()
1334 rdev->etha->phy_interface); in rswitch_serdes_set_params()
1338 return phy_set_speed(rdev->serdes, rdev->etha->speed); in rswitch_serdes_set_params()
1345 if (!rdev->etha->operated) { in rswitch_ether_port_init_one()
1346 err = rswitch_etha_hw_init(rdev->etha, rdev->ndev->dev_addr); in rswitch_ether_port_init_one()
1349 rdev->etha->operated = true; in rswitch_ether_port_init_one()
1498 desc->info1 = cpu_to_le64(INFO1_DV(BIT(rdev->etha->index)) | INFO1_FMT); in rswitch_start_xmit()
1659 struct rswitch_etha *etha = &priv->etha[index]; in rswitch_etha_init() local
1661 memset(etha, 0, sizeof(*etha)); in rswitch_etha_init()
1662 etha->index = index; in rswitch_etha_init()
1663 etha->addr = priv->addr + RSWITCH_ETHA_OFFSET + index * RSWITCH_ETHA_SIZE; in rswitch_etha_init()
1664 etha->coma_addr = priv->addr; in rswitch_etha_init()
1689 rdev->etha = &priv->etha[index]; in rswitch_device_alloc()
1704 if (is_valid_ether_addr(rdev->etha->mac_addr)) in rswitch_device_alloc()
1705 eth_hw_addr_set(ndev, rdev->etha->mac_addr); in rswitch_device_alloc()
1714 if (rdev->priv->gwca.speed < rdev->etha->speed) in rswitch_device_alloc()
1715 rdev->priv->gwca.speed = rdev->etha->speed; in rswitch_device_alloc()
1758 rswitch_etha_read_mac_address(&priv->etha[i]); in rswitch_init()