Lines Matching refs:bsp_priv
30 void (*set_to_rgmii)(struct rk_priv_data *bsp_priv,
32 void (*set_to_rmii)(struct rk_priv_data *bsp_priv);
33 void (*set_rgmii_speed)(struct rk_priv_data *bsp_priv, int speed);
34 void (*set_rmii_speed)(struct rk_priv_data *bsp_priv, int speed);
35 void (*set_clock_selection)(struct rk_priv_data *bsp_priv, bool input,
37 void (*integrated_phy_powerup)(struct rk_priv_data *bsp_priv);
92 static void px30_set_to_rmii(struct rk_priv_data *bsp_priv) in px30_set_to_rmii() argument
94 struct device *dev = &bsp_priv->pdev->dev; in px30_set_to_rmii()
96 if (IS_ERR(bsp_priv->grf)) { in px30_set_to_rmii()
101 regmap_write(bsp_priv->grf, PX30_GRF_GMAC_CON1, in px30_set_to_rmii()
105 static void px30_set_rmii_speed(struct rk_priv_data *bsp_priv, int speed) in px30_set_rmii_speed() argument
107 struct device *dev = &bsp_priv->pdev->dev; in px30_set_rmii_speed()
110 if (IS_ERR(bsp_priv->clk_mac_speed)) { in px30_set_rmii_speed()
116 regmap_write(bsp_priv->grf, PX30_GRF_GMAC_CON1, in px30_set_rmii_speed()
119 ret = clk_set_rate(bsp_priv->clk_mac_speed, 2500000); in px30_set_rmii_speed()
124 regmap_write(bsp_priv->grf, PX30_GRF_GMAC_CON1, in px30_set_rmii_speed()
127 ret = clk_set_rate(bsp_priv->clk_mac_speed, 25000000); in px30_set_rmii_speed()
170 static void rk3128_set_to_rgmii(struct rk_priv_data *bsp_priv, in rk3128_set_to_rgmii() argument
173 struct device *dev = &bsp_priv->pdev->dev; in rk3128_set_to_rgmii()
175 if (IS_ERR(bsp_priv->grf)) { in rk3128_set_to_rgmii()
180 regmap_write(bsp_priv->grf, RK3128_GRF_MAC_CON1, in rk3128_set_to_rgmii()
183 regmap_write(bsp_priv->grf, RK3128_GRF_MAC_CON0, in rk3128_set_to_rgmii()
189 static void rk3128_set_to_rmii(struct rk_priv_data *bsp_priv) in rk3128_set_to_rmii() argument
191 struct device *dev = &bsp_priv->pdev->dev; in rk3128_set_to_rmii()
193 if (IS_ERR(bsp_priv->grf)) { in rk3128_set_to_rmii()
198 regmap_write(bsp_priv->grf, RK3128_GRF_MAC_CON1, in rk3128_set_to_rmii()
202 static void rk3128_set_rgmii_speed(struct rk_priv_data *bsp_priv, int speed) in rk3128_set_rgmii_speed() argument
204 struct device *dev = &bsp_priv->pdev->dev; in rk3128_set_rgmii_speed()
206 if (IS_ERR(bsp_priv->grf)) { in rk3128_set_rgmii_speed()
212 regmap_write(bsp_priv->grf, RK3128_GRF_MAC_CON1, in rk3128_set_rgmii_speed()
215 regmap_write(bsp_priv->grf, RK3128_GRF_MAC_CON1, in rk3128_set_rgmii_speed()
218 regmap_write(bsp_priv->grf, RK3128_GRF_MAC_CON1, in rk3128_set_rgmii_speed()
224 static void rk3128_set_rmii_speed(struct rk_priv_data *bsp_priv, int speed) in rk3128_set_rmii_speed() argument
226 struct device *dev = &bsp_priv->pdev->dev; in rk3128_set_rmii_speed()
228 if (IS_ERR(bsp_priv->grf)) { in rk3128_set_rmii_speed()
234 regmap_write(bsp_priv->grf, RK3128_GRF_MAC_CON1, in rk3128_set_rmii_speed()
238 regmap_write(bsp_priv->grf, RK3128_GRF_MAC_CON1, in rk3128_set_rmii_speed()
286 static void rk3228_set_to_rgmii(struct rk_priv_data *bsp_priv, in rk3228_set_to_rgmii() argument
289 struct device *dev = &bsp_priv->pdev->dev; in rk3228_set_to_rgmii()
291 if (IS_ERR(bsp_priv->grf)) { in rk3228_set_to_rgmii()
296 regmap_write(bsp_priv->grf, RK3228_GRF_MAC_CON1, in rk3228_set_to_rgmii()
301 regmap_write(bsp_priv->grf, RK3228_GRF_MAC_CON0, in rk3228_set_to_rgmii()
306 static void rk3228_set_to_rmii(struct rk_priv_data *bsp_priv) in rk3228_set_to_rmii() argument
308 struct device *dev = &bsp_priv->pdev->dev; in rk3228_set_to_rmii()
310 if (IS_ERR(bsp_priv->grf)) { in rk3228_set_to_rmii()
315 regmap_write(bsp_priv->grf, RK3228_GRF_MAC_CON1, in rk3228_set_to_rmii()
320 regmap_write(bsp_priv->grf, RK3228_GRF_MAC_CON1, GRF_BIT(11)); in rk3228_set_to_rmii()
323 static void rk3228_set_rgmii_speed(struct rk_priv_data *bsp_priv, int speed) in rk3228_set_rgmii_speed() argument
325 struct device *dev = &bsp_priv->pdev->dev; in rk3228_set_rgmii_speed()
327 if (IS_ERR(bsp_priv->grf)) { in rk3228_set_rgmii_speed()
333 regmap_write(bsp_priv->grf, RK3228_GRF_MAC_CON1, in rk3228_set_rgmii_speed()
336 regmap_write(bsp_priv->grf, RK3228_GRF_MAC_CON1, in rk3228_set_rgmii_speed()
339 regmap_write(bsp_priv->grf, RK3228_GRF_MAC_CON1, in rk3228_set_rgmii_speed()
345 static void rk3228_set_rmii_speed(struct rk_priv_data *bsp_priv, int speed) in rk3228_set_rmii_speed() argument
347 struct device *dev = &bsp_priv->pdev->dev; in rk3228_set_rmii_speed()
349 if (IS_ERR(bsp_priv->grf)) { in rk3228_set_rmii_speed()
355 regmap_write(bsp_priv->grf, RK3228_GRF_MAC_CON1, in rk3228_set_rmii_speed()
359 regmap_write(bsp_priv->grf, RK3228_GRF_MAC_CON1, in rk3228_set_rmii_speed()
408 static void rk3288_set_to_rgmii(struct rk_priv_data *bsp_priv, in rk3288_set_to_rgmii() argument
411 struct device *dev = &bsp_priv->pdev->dev; in rk3288_set_to_rgmii()
413 if (IS_ERR(bsp_priv->grf)) { in rk3288_set_to_rgmii()
418 regmap_write(bsp_priv->grf, RK3288_GRF_SOC_CON1, in rk3288_set_to_rgmii()
421 regmap_write(bsp_priv->grf, RK3288_GRF_SOC_CON3, in rk3288_set_to_rgmii()
427 static void rk3288_set_to_rmii(struct rk_priv_data *bsp_priv) in rk3288_set_to_rmii() argument
429 struct device *dev = &bsp_priv->pdev->dev; in rk3288_set_to_rmii()
431 if (IS_ERR(bsp_priv->grf)) { in rk3288_set_to_rmii()
436 regmap_write(bsp_priv->grf, RK3288_GRF_SOC_CON1, in rk3288_set_to_rmii()
440 static void rk3288_set_rgmii_speed(struct rk_priv_data *bsp_priv, int speed) in rk3288_set_rgmii_speed() argument
442 struct device *dev = &bsp_priv->pdev->dev; in rk3288_set_rgmii_speed()
444 if (IS_ERR(bsp_priv->grf)) { in rk3288_set_rgmii_speed()
450 regmap_write(bsp_priv->grf, RK3288_GRF_SOC_CON1, in rk3288_set_rgmii_speed()
453 regmap_write(bsp_priv->grf, RK3288_GRF_SOC_CON1, in rk3288_set_rgmii_speed()
456 regmap_write(bsp_priv->grf, RK3288_GRF_SOC_CON1, in rk3288_set_rgmii_speed()
462 static void rk3288_set_rmii_speed(struct rk_priv_data *bsp_priv, int speed) in rk3288_set_rmii_speed() argument
464 struct device *dev = &bsp_priv->pdev->dev; in rk3288_set_rmii_speed()
466 if (IS_ERR(bsp_priv->grf)) { in rk3288_set_rmii_speed()
472 regmap_write(bsp_priv->grf, RK3288_GRF_SOC_CON1, in rk3288_set_rmii_speed()
476 regmap_write(bsp_priv->grf, RK3288_GRF_SOC_CON1, in rk3288_set_rmii_speed()
501 static void rk3308_set_to_rmii(struct rk_priv_data *bsp_priv) in rk3308_set_to_rmii() argument
503 struct device *dev = &bsp_priv->pdev->dev; in rk3308_set_to_rmii()
505 if (IS_ERR(bsp_priv->grf)) { in rk3308_set_to_rmii()
510 regmap_write(bsp_priv->grf, RK3308_GRF_MAC_CON0, in rk3308_set_to_rmii()
514 static void rk3308_set_rmii_speed(struct rk_priv_data *bsp_priv, int speed) in rk3308_set_rmii_speed() argument
516 struct device *dev = &bsp_priv->pdev->dev; in rk3308_set_rmii_speed()
518 if (IS_ERR(bsp_priv->grf)) { in rk3308_set_rmii_speed()
524 regmap_write(bsp_priv->grf, RK3308_GRF_MAC_CON0, in rk3308_set_rmii_speed()
527 regmap_write(bsp_priv->grf, RK3308_GRF_MAC_CON0, in rk3308_set_rmii_speed()
572 static void rk3328_set_to_rgmii(struct rk_priv_data *bsp_priv, in rk3328_set_to_rgmii() argument
575 struct device *dev = &bsp_priv->pdev->dev; in rk3328_set_to_rgmii()
577 if (IS_ERR(bsp_priv->grf)) { in rk3328_set_to_rgmii()
582 regmap_write(bsp_priv->grf, RK3328_GRF_MAC_CON1, in rk3328_set_to_rgmii()
588 regmap_write(bsp_priv->grf, RK3328_GRF_MAC_CON0, in rk3328_set_to_rgmii()
593 static void rk3328_set_to_rmii(struct rk_priv_data *bsp_priv) in rk3328_set_to_rmii() argument
595 struct device *dev = &bsp_priv->pdev->dev; in rk3328_set_to_rmii()
598 if (IS_ERR(bsp_priv->grf)) { in rk3328_set_to_rmii()
603 reg = bsp_priv->integrated_phy ? RK3328_GRF_MAC_CON2 : in rk3328_set_to_rmii()
606 regmap_write(bsp_priv->grf, reg, in rk3328_set_to_rmii()
611 static void rk3328_set_rgmii_speed(struct rk_priv_data *bsp_priv, int speed) in rk3328_set_rgmii_speed() argument
613 struct device *dev = &bsp_priv->pdev->dev; in rk3328_set_rgmii_speed()
615 if (IS_ERR(bsp_priv->grf)) { in rk3328_set_rgmii_speed()
621 regmap_write(bsp_priv->grf, RK3328_GRF_MAC_CON1, in rk3328_set_rgmii_speed()
624 regmap_write(bsp_priv->grf, RK3328_GRF_MAC_CON1, in rk3328_set_rgmii_speed()
627 regmap_write(bsp_priv->grf, RK3328_GRF_MAC_CON1, in rk3328_set_rgmii_speed()
633 static void rk3328_set_rmii_speed(struct rk_priv_data *bsp_priv, int speed) in rk3328_set_rmii_speed() argument
635 struct device *dev = &bsp_priv->pdev->dev; in rk3328_set_rmii_speed()
638 if (IS_ERR(bsp_priv->grf)) { in rk3328_set_rmii_speed()
643 reg = bsp_priv->integrated_phy ? RK3328_GRF_MAC_CON2 : in rk3328_set_rmii_speed()
647 regmap_write(bsp_priv->grf, reg, in rk3328_set_rmii_speed()
651 regmap_write(bsp_priv->grf, reg, in rk3328_set_rmii_speed()
700 static void rk3366_set_to_rgmii(struct rk_priv_data *bsp_priv, in rk3366_set_to_rgmii() argument
703 struct device *dev = &bsp_priv->pdev->dev; in rk3366_set_to_rgmii()
705 if (IS_ERR(bsp_priv->grf)) { in rk3366_set_to_rgmii()
710 regmap_write(bsp_priv->grf, RK3366_GRF_SOC_CON6, in rk3366_set_to_rgmii()
713 regmap_write(bsp_priv->grf, RK3366_GRF_SOC_CON7, in rk3366_set_to_rgmii()
719 static void rk3366_set_to_rmii(struct rk_priv_data *bsp_priv) in rk3366_set_to_rmii() argument
721 struct device *dev = &bsp_priv->pdev->dev; in rk3366_set_to_rmii()
723 if (IS_ERR(bsp_priv->grf)) { in rk3366_set_to_rmii()
728 regmap_write(bsp_priv->grf, RK3366_GRF_SOC_CON6, in rk3366_set_to_rmii()
732 static void rk3366_set_rgmii_speed(struct rk_priv_data *bsp_priv, int speed) in rk3366_set_rgmii_speed() argument
734 struct device *dev = &bsp_priv->pdev->dev; in rk3366_set_rgmii_speed()
736 if (IS_ERR(bsp_priv->grf)) { in rk3366_set_rgmii_speed()
742 regmap_write(bsp_priv->grf, RK3366_GRF_SOC_CON6, in rk3366_set_rgmii_speed()
745 regmap_write(bsp_priv->grf, RK3366_GRF_SOC_CON6, in rk3366_set_rgmii_speed()
748 regmap_write(bsp_priv->grf, RK3366_GRF_SOC_CON6, in rk3366_set_rgmii_speed()
754 static void rk3366_set_rmii_speed(struct rk_priv_data *bsp_priv, int speed) in rk3366_set_rmii_speed() argument
756 struct device *dev = &bsp_priv->pdev->dev; in rk3366_set_rmii_speed()
758 if (IS_ERR(bsp_priv->grf)) { in rk3366_set_rmii_speed()
764 regmap_write(bsp_priv->grf, RK3366_GRF_SOC_CON6, in rk3366_set_rmii_speed()
768 regmap_write(bsp_priv->grf, RK3366_GRF_SOC_CON6, in rk3366_set_rmii_speed()
811 static void rk3368_set_to_rgmii(struct rk_priv_data *bsp_priv, in rk3368_set_to_rgmii() argument
814 struct device *dev = &bsp_priv->pdev->dev; in rk3368_set_to_rgmii()
816 if (IS_ERR(bsp_priv->grf)) { in rk3368_set_to_rgmii()
821 regmap_write(bsp_priv->grf, RK3368_GRF_SOC_CON15, in rk3368_set_to_rgmii()
824 regmap_write(bsp_priv->grf, RK3368_GRF_SOC_CON16, in rk3368_set_to_rgmii()
830 static void rk3368_set_to_rmii(struct rk_priv_data *bsp_priv) in rk3368_set_to_rmii() argument
832 struct device *dev = &bsp_priv->pdev->dev; in rk3368_set_to_rmii()
834 if (IS_ERR(bsp_priv->grf)) { in rk3368_set_to_rmii()
839 regmap_write(bsp_priv->grf, RK3368_GRF_SOC_CON15, in rk3368_set_to_rmii()
843 static void rk3368_set_rgmii_speed(struct rk_priv_data *bsp_priv, int speed) in rk3368_set_rgmii_speed() argument
845 struct device *dev = &bsp_priv->pdev->dev; in rk3368_set_rgmii_speed()
847 if (IS_ERR(bsp_priv->grf)) { in rk3368_set_rgmii_speed()
853 regmap_write(bsp_priv->grf, RK3368_GRF_SOC_CON15, in rk3368_set_rgmii_speed()
856 regmap_write(bsp_priv->grf, RK3368_GRF_SOC_CON15, in rk3368_set_rgmii_speed()
859 regmap_write(bsp_priv->grf, RK3368_GRF_SOC_CON15, in rk3368_set_rgmii_speed()
865 static void rk3368_set_rmii_speed(struct rk_priv_data *bsp_priv, int speed) in rk3368_set_rmii_speed() argument
867 struct device *dev = &bsp_priv->pdev->dev; in rk3368_set_rmii_speed()
869 if (IS_ERR(bsp_priv->grf)) { in rk3368_set_rmii_speed()
875 regmap_write(bsp_priv->grf, RK3368_GRF_SOC_CON15, in rk3368_set_rmii_speed()
879 regmap_write(bsp_priv->grf, RK3368_GRF_SOC_CON15, in rk3368_set_rmii_speed()
922 static void rk3399_set_to_rgmii(struct rk_priv_data *bsp_priv, in rk3399_set_to_rgmii() argument
925 struct device *dev = &bsp_priv->pdev->dev; in rk3399_set_to_rgmii()
927 if (IS_ERR(bsp_priv->grf)) { in rk3399_set_to_rgmii()
932 regmap_write(bsp_priv->grf, RK3399_GRF_SOC_CON5, in rk3399_set_to_rgmii()
935 regmap_write(bsp_priv->grf, RK3399_GRF_SOC_CON6, in rk3399_set_to_rgmii()
941 static void rk3399_set_to_rmii(struct rk_priv_data *bsp_priv) in rk3399_set_to_rmii() argument
943 struct device *dev = &bsp_priv->pdev->dev; in rk3399_set_to_rmii()
945 if (IS_ERR(bsp_priv->grf)) { in rk3399_set_to_rmii()
950 regmap_write(bsp_priv->grf, RK3399_GRF_SOC_CON5, in rk3399_set_to_rmii()
954 static void rk3399_set_rgmii_speed(struct rk_priv_data *bsp_priv, int speed) in rk3399_set_rgmii_speed() argument
956 struct device *dev = &bsp_priv->pdev->dev; in rk3399_set_rgmii_speed()
958 if (IS_ERR(bsp_priv->grf)) { in rk3399_set_rgmii_speed()
964 regmap_write(bsp_priv->grf, RK3399_GRF_SOC_CON5, in rk3399_set_rgmii_speed()
967 regmap_write(bsp_priv->grf, RK3399_GRF_SOC_CON5, in rk3399_set_rgmii_speed()
970 regmap_write(bsp_priv->grf, RK3399_GRF_SOC_CON5, in rk3399_set_rgmii_speed()
976 static void rk3399_set_rmii_speed(struct rk_priv_data *bsp_priv, int speed) in rk3399_set_rmii_speed() argument
978 struct device *dev = &bsp_priv->pdev->dev; in rk3399_set_rmii_speed()
980 if (IS_ERR(bsp_priv->grf)) { in rk3399_set_rmii_speed()
986 regmap_write(bsp_priv->grf, RK3399_GRF_SOC_CON5, in rk3399_set_rmii_speed()
990 regmap_write(bsp_priv->grf, RK3399_GRF_SOC_CON5, in rk3399_set_rmii_speed()
1026 static void rk3568_set_to_rgmii(struct rk_priv_data *bsp_priv, in rk3568_set_to_rgmii() argument
1029 struct device *dev = &bsp_priv->pdev->dev; in rk3568_set_to_rgmii()
1032 if (IS_ERR(bsp_priv->grf)) { in rk3568_set_to_rgmii()
1037 con0 = (bsp_priv->id == 1) ? RK3568_GRF_GMAC1_CON0 : in rk3568_set_to_rgmii()
1039 con1 = (bsp_priv->id == 1) ? RK3568_GRF_GMAC1_CON1 : in rk3568_set_to_rgmii()
1042 regmap_write(bsp_priv->grf, con0, in rk3568_set_to_rgmii()
1046 regmap_write(bsp_priv->grf, con1, in rk3568_set_to_rgmii()
1052 static void rk3568_set_to_rmii(struct rk_priv_data *bsp_priv) in rk3568_set_to_rmii() argument
1054 struct device *dev = &bsp_priv->pdev->dev; in rk3568_set_to_rmii()
1057 if (IS_ERR(bsp_priv->grf)) { in rk3568_set_to_rmii()
1062 con1 = (bsp_priv->id == 1) ? RK3568_GRF_GMAC1_CON1 : in rk3568_set_to_rmii()
1064 regmap_write(bsp_priv->grf, con1, RK3568_GMAC_PHY_INTF_SEL_RMII); in rk3568_set_to_rmii()
1067 static void rk3568_set_gmac_speed(struct rk_priv_data *bsp_priv, int speed) in rk3568_set_gmac_speed() argument
1069 struct device *dev = &bsp_priv->pdev->dev; in rk3568_set_gmac_speed()
1088 ret = clk_set_rate(bsp_priv->clk_mac_speed, rate); in rk3568_set_gmac_speed()
1148 static void rk3588_set_to_rgmii(struct rk_priv_data *bsp_priv, in rk3588_set_to_rgmii() argument
1151 struct device *dev = &bsp_priv->pdev->dev; in rk3588_set_to_rgmii()
1152 u32 offset_con, id = bsp_priv->id; in rk3588_set_to_rgmii()
1154 if (IS_ERR(bsp_priv->grf) || IS_ERR(bsp_priv->php_grf)) { in rk3588_set_to_rgmii()
1159 offset_con = bsp_priv->id == 1 ? RK3588_GRF_GMAC_CON9 : in rk3588_set_to_rgmii()
1162 regmap_write(bsp_priv->php_grf, RK3588_GRF_GMAC_CON0, in rk3588_set_to_rgmii()
1165 regmap_write(bsp_priv->php_grf, RK3588_GRF_CLK_CON1, in rk3588_set_to_rgmii()
1168 regmap_write(bsp_priv->grf, RK3588_GRF_GMAC_CON7, in rk3588_set_to_rgmii()
1172 regmap_write(bsp_priv->grf, offset_con, in rk3588_set_to_rgmii()
1177 static void rk3588_set_to_rmii(struct rk_priv_data *bsp_priv) in rk3588_set_to_rmii() argument
1179 struct device *dev = &bsp_priv->pdev->dev; in rk3588_set_to_rmii()
1181 if (IS_ERR(bsp_priv->php_grf)) { in rk3588_set_to_rmii()
1186 regmap_write(bsp_priv->php_grf, RK3588_GRF_GMAC_CON0, in rk3588_set_to_rmii()
1187 RK3588_GMAC_PHY_INTF_SEL_RMII(bsp_priv->id)); in rk3588_set_to_rmii()
1189 regmap_write(bsp_priv->php_grf, RK3588_GRF_CLK_CON1, in rk3588_set_to_rmii()
1190 RK3588_GMAC_CLK_RMII_MODE(bsp_priv->id)); in rk3588_set_to_rmii()
1193 static void rk3588_set_gmac_speed(struct rk_priv_data *bsp_priv, int speed) in rk3588_set_gmac_speed() argument
1195 struct device *dev = &bsp_priv->pdev->dev; in rk3588_set_gmac_speed()
1196 unsigned int val = 0, id = bsp_priv->id; in rk3588_set_gmac_speed()
1200 if (bsp_priv->phy_iface == PHY_INTERFACE_MODE_RMII) in rk3588_set_gmac_speed()
1206 if (bsp_priv->phy_iface == PHY_INTERFACE_MODE_RMII) in rk3588_set_gmac_speed()
1212 if (bsp_priv->phy_iface != PHY_INTERFACE_MODE_RMII) in rk3588_set_gmac_speed()
1221 regmap_write(bsp_priv->php_grf, RK3588_GRF_CLK_CON1, val); in rk3588_set_gmac_speed()
1228 static void rk3588_set_clock_selection(struct rk_priv_data *bsp_priv, bool input, in rk3588_set_clock_selection() argument
1231 unsigned int val = input ? RK3588_GMAC_CLK_SELET_IO(bsp_priv->id) : in rk3588_set_clock_selection()
1232 RK3588_GMAC_CLK_SELET_CRU(bsp_priv->id); in rk3588_set_clock_selection()
1234 val |= enable ? RK3588_GMAC_CLK_RMII_NOGATE(bsp_priv->id) : in rk3588_set_clock_selection()
1235 RK3588_GMAC_CLK_RMII_GATE(bsp_priv->id); in rk3588_set_clock_selection()
1237 regmap_write(bsp_priv->php_grf, RK3588_GRF_CLK_CON1, val); in rk3588_set_clock_selection()
1266 static void rv1108_set_to_rmii(struct rk_priv_data *bsp_priv) in rv1108_set_to_rmii() argument
1268 struct device *dev = &bsp_priv->pdev->dev; in rv1108_set_to_rmii()
1270 if (IS_ERR(bsp_priv->grf)) { in rv1108_set_to_rmii()
1275 regmap_write(bsp_priv->grf, RV1108_GRF_GMAC_CON0, in rv1108_set_to_rmii()
1279 static void rv1108_set_rmii_speed(struct rk_priv_data *bsp_priv, int speed) in rv1108_set_rmii_speed() argument
1281 struct device *dev = &bsp_priv->pdev->dev; in rv1108_set_rmii_speed()
1283 if (IS_ERR(bsp_priv->grf)) { in rv1108_set_rmii_speed()
1289 regmap_write(bsp_priv->grf, RV1108_GRF_GMAC_CON0, in rv1108_set_rmii_speed()
1293 regmap_write(bsp_priv->grf, RV1108_GRF_GMAC_CON0, in rv1108_set_rmii_speed()
1333 static void rv1126_set_to_rgmii(struct rk_priv_data *bsp_priv, in rv1126_set_to_rgmii() argument
1336 struct device *dev = &bsp_priv->pdev->dev; in rv1126_set_to_rgmii()
1338 if (IS_ERR(bsp_priv->grf)) { in rv1126_set_to_rgmii()
1343 regmap_write(bsp_priv->grf, RV1126_GRF_GMAC_CON0, in rv1126_set_to_rgmii()
1350 regmap_write(bsp_priv->grf, RV1126_GRF_GMAC_CON1, in rv1126_set_to_rgmii()
1354 regmap_write(bsp_priv->grf, RV1126_GRF_GMAC_CON2, in rv1126_set_to_rgmii()
1359 static void rv1126_set_to_rmii(struct rk_priv_data *bsp_priv) in rv1126_set_to_rmii() argument
1361 struct device *dev = &bsp_priv->pdev->dev; in rv1126_set_to_rmii()
1363 if (IS_ERR(bsp_priv->grf)) { in rv1126_set_to_rmii()
1368 regmap_write(bsp_priv->grf, RV1126_GRF_GMAC_CON0, in rv1126_set_to_rmii()
1372 static void rv1126_set_rgmii_speed(struct rk_priv_data *bsp_priv, int speed) in rv1126_set_rgmii_speed() argument
1374 struct device *dev = &bsp_priv->pdev->dev; in rv1126_set_rgmii_speed()
1393 ret = clk_set_rate(bsp_priv->clk_mac_speed, rate); in rv1126_set_rgmii_speed()
1399 static void rv1126_set_rmii_speed(struct rk_priv_data *bsp_priv, int speed) in rv1126_set_rmii_speed() argument
1401 struct device *dev = &bsp_priv->pdev->dev; in rv1126_set_rmii_speed()
1417 ret = clk_set_rate(bsp_priv->clk_mac_speed, rate); in rv1126_set_rmii_speed()
1476 struct rk_priv_data *bsp_priv = plat->bsp_priv; in rk_gmac_clk_init() local
1477 struct device *dev = &bsp_priv->pdev->dev; in rk_gmac_clk_init()
1480 bsp_priv->clk_enabled = false; in rk_gmac_clk_init()
1482 bsp_priv->mac_clk_rx = devm_clk_get(dev, "mac_clk_rx"); in rk_gmac_clk_init()
1483 if (IS_ERR(bsp_priv->mac_clk_rx)) in rk_gmac_clk_init()
1487 bsp_priv->mac_clk_tx = devm_clk_get(dev, "mac_clk_tx"); in rk_gmac_clk_init()
1488 if (IS_ERR(bsp_priv->mac_clk_tx)) in rk_gmac_clk_init()
1492 bsp_priv->aclk_mac = devm_clk_get(dev, "aclk_mac"); in rk_gmac_clk_init()
1493 if (IS_ERR(bsp_priv->aclk_mac)) in rk_gmac_clk_init()
1497 bsp_priv->pclk_mac = devm_clk_get(dev, "pclk_mac"); in rk_gmac_clk_init()
1498 if (IS_ERR(bsp_priv->pclk_mac)) in rk_gmac_clk_init()
1502 bsp_priv->clk_mac = devm_clk_get(dev, "stmmaceth"); in rk_gmac_clk_init()
1503 if (IS_ERR(bsp_priv->clk_mac)) in rk_gmac_clk_init()
1507 if (bsp_priv->phy_iface == PHY_INTERFACE_MODE_RMII) { in rk_gmac_clk_init()
1508 bsp_priv->clk_mac_ref = devm_clk_get(dev, "clk_mac_ref"); in rk_gmac_clk_init()
1509 if (IS_ERR(bsp_priv->clk_mac_ref)) in rk_gmac_clk_init()
1513 if (!bsp_priv->clock_input) { in rk_gmac_clk_init()
1514 bsp_priv->clk_mac_refout = in rk_gmac_clk_init()
1516 if (IS_ERR(bsp_priv->clk_mac_refout)) in rk_gmac_clk_init()
1522 bsp_priv->clk_mac_speed = devm_clk_get(dev, "clk_mac_speed"); in rk_gmac_clk_init()
1523 if (IS_ERR(bsp_priv->clk_mac_speed)) in rk_gmac_clk_init()
1526 if (bsp_priv->clock_input) { in rk_gmac_clk_init()
1529 if (bsp_priv->phy_iface == PHY_INTERFACE_MODE_RMII) in rk_gmac_clk_init()
1530 clk_set_rate(bsp_priv->clk_mac, 50000000); in rk_gmac_clk_init()
1533 if (plat->phy_node && bsp_priv->integrated_phy) { in rk_gmac_clk_init()
1534 bsp_priv->clk_phy = of_clk_get(plat->phy_node, 0); in rk_gmac_clk_init()
1535 if (IS_ERR(bsp_priv->clk_phy)) { in rk_gmac_clk_init()
1536 ret = PTR_ERR(bsp_priv->clk_phy); in rk_gmac_clk_init()
1540 clk_set_rate(bsp_priv->clk_phy, 50000000); in rk_gmac_clk_init()
1546 static int gmac_clk_enable(struct rk_priv_data *bsp_priv, bool enable) in gmac_clk_enable() argument
1548 int phy_iface = bsp_priv->phy_iface; in gmac_clk_enable()
1551 if (!bsp_priv->clk_enabled) { in gmac_clk_enable()
1553 if (!IS_ERR(bsp_priv->mac_clk_rx)) in gmac_clk_enable()
1555 bsp_priv->mac_clk_rx); in gmac_clk_enable()
1557 if (!IS_ERR(bsp_priv->clk_mac_ref)) in gmac_clk_enable()
1559 bsp_priv->clk_mac_ref); in gmac_clk_enable()
1561 if (!IS_ERR(bsp_priv->clk_mac_refout)) in gmac_clk_enable()
1563 bsp_priv->clk_mac_refout); in gmac_clk_enable()
1566 if (!IS_ERR(bsp_priv->clk_phy)) in gmac_clk_enable()
1567 clk_prepare_enable(bsp_priv->clk_phy); in gmac_clk_enable()
1569 if (!IS_ERR(bsp_priv->aclk_mac)) in gmac_clk_enable()
1570 clk_prepare_enable(bsp_priv->aclk_mac); in gmac_clk_enable()
1572 if (!IS_ERR(bsp_priv->pclk_mac)) in gmac_clk_enable()
1573 clk_prepare_enable(bsp_priv->pclk_mac); in gmac_clk_enable()
1575 if (!IS_ERR(bsp_priv->mac_clk_tx)) in gmac_clk_enable()
1576 clk_prepare_enable(bsp_priv->mac_clk_tx); in gmac_clk_enable()
1578 if (!IS_ERR(bsp_priv->clk_mac_speed)) in gmac_clk_enable()
1579 clk_prepare_enable(bsp_priv->clk_mac_speed); in gmac_clk_enable()
1581 if (bsp_priv->ops && bsp_priv->ops->set_clock_selection) in gmac_clk_enable()
1582 bsp_priv->ops->set_clock_selection(bsp_priv, in gmac_clk_enable()
1583 bsp_priv->clock_input, true); in gmac_clk_enable()
1590 bsp_priv->clk_enabled = true; in gmac_clk_enable()
1593 if (bsp_priv->clk_enabled) { in gmac_clk_enable()
1595 clk_disable_unprepare(bsp_priv->mac_clk_rx); in gmac_clk_enable()
1597 clk_disable_unprepare(bsp_priv->clk_mac_ref); in gmac_clk_enable()
1599 clk_disable_unprepare(bsp_priv->clk_mac_refout); in gmac_clk_enable()
1602 clk_disable_unprepare(bsp_priv->clk_phy); in gmac_clk_enable()
1604 clk_disable_unprepare(bsp_priv->aclk_mac); in gmac_clk_enable()
1606 clk_disable_unprepare(bsp_priv->pclk_mac); in gmac_clk_enable()
1608 clk_disable_unprepare(bsp_priv->mac_clk_tx); in gmac_clk_enable()
1610 clk_disable_unprepare(bsp_priv->clk_mac_speed); in gmac_clk_enable()
1612 if (bsp_priv->ops && bsp_priv->ops->set_clock_selection) in gmac_clk_enable()
1613 bsp_priv->ops->set_clock_selection(bsp_priv, in gmac_clk_enable()
1614 bsp_priv->clock_input, false); in gmac_clk_enable()
1619 bsp_priv->clk_enabled = false; in gmac_clk_enable()
1626 static int phy_power_on(struct rk_priv_data *bsp_priv, bool enable) in phy_power_on() argument
1628 struct regulator *ldo = bsp_priv->regulator; in phy_power_on()
1630 struct device *dev = &bsp_priv->pdev->dev; in phy_power_on()
1652 struct rk_priv_data *bsp_priv; in rk_gmac_setup() local
1659 bsp_priv = devm_kzalloc(dev, sizeof(*bsp_priv), GFP_KERNEL); in rk_gmac_setup()
1660 if (!bsp_priv) in rk_gmac_setup()
1663 of_get_phy_mode(dev->of_node, &bsp_priv->phy_iface); in rk_gmac_setup()
1664 bsp_priv->ops = ops; in rk_gmac_setup()
1675 bsp_priv->id = i; in rk_gmac_setup()
1682 bsp_priv->regulator = devm_regulator_get_optional(dev, "phy"); in rk_gmac_setup()
1683 if (IS_ERR(bsp_priv->regulator)) { in rk_gmac_setup()
1684 if (PTR_ERR(bsp_priv->regulator) == -EPROBE_DEFER) { in rk_gmac_setup()
1689 bsp_priv->regulator = NULL; in rk_gmac_setup()
1695 bsp_priv->clock_input = true; in rk_gmac_setup()
1700 bsp_priv->clock_input = true; in rk_gmac_setup()
1702 bsp_priv->clock_input = false; in rk_gmac_setup()
1707 bsp_priv->tx_delay = 0x30; in rk_gmac_setup()
1710 bsp_priv->tx_delay); in rk_gmac_setup()
1713 bsp_priv->tx_delay = value; in rk_gmac_setup()
1718 bsp_priv->rx_delay = 0x10; in rk_gmac_setup()
1721 bsp_priv->rx_delay); in rk_gmac_setup()
1724 bsp_priv->rx_delay = value; in rk_gmac_setup()
1727 bsp_priv->grf = syscon_regmap_lookup_by_phandle(dev->of_node, in rk_gmac_setup()
1729 bsp_priv->php_grf = syscon_regmap_lookup_by_phandle(dev->of_node, in rk_gmac_setup()
1733 bsp_priv->integrated_phy = of_property_read_bool(plat->phy_node, in rk_gmac_setup()
1735 if (bsp_priv->integrated_phy) { in rk_gmac_setup()
1736 bsp_priv->phy_reset = of_reset_control_get(plat->phy_node, NULL); in rk_gmac_setup()
1737 if (IS_ERR(bsp_priv->phy_reset)) { in rk_gmac_setup()
1739 bsp_priv->phy_reset = NULL; in rk_gmac_setup()
1744 bsp_priv->integrated_phy ? "yes" : "no"); in rk_gmac_setup()
1746 bsp_priv->pdev = pdev; in rk_gmac_setup()
1748 return bsp_priv; in rk_gmac_setup()
1751 static int rk_gmac_check_ops(struct rk_priv_data *bsp_priv) in rk_gmac_check_ops() argument
1753 switch (bsp_priv->phy_iface) { in rk_gmac_check_ops()
1758 if (!bsp_priv->ops->set_to_rgmii) in rk_gmac_check_ops()
1762 if (!bsp_priv->ops->set_to_rmii) in rk_gmac_check_ops()
1766 dev_err(&bsp_priv->pdev->dev, in rk_gmac_check_ops()
1767 "unsupported interface %d", bsp_priv->phy_iface); in rk_gmac_check_ops()
1772 static int rk_gmac_powerup(struct rk_priv_data *bsp_priv) in rk_gmac_powerup() argument
1775 struct device *dev = &bsp_priv->pdev->dev; in rk_gmac_powerup()
1777 ret = rk_gmac_check_ops(bsp_priv); in rk_gmac_powerup()
1781 ret = gmac_clk_enable(bsp_priv, true); in rk_gmac_powerup()
1786 switch (bsp_priv->phy_iface) { in rk_gmac_powerup()
1789 bsp_priv->ops->set_to_rgmii(bsp_priv, bsp_priv->tx_delay, in rk_gmac_powerup()
1790 bsp_priv->rx_delay); in rk_gmac_powerup()
1794 bsp_priv->ops->set_to_rgmii(bsp_priv, 0, 0); in rk_gmac_powerup()
1798 bsp_priv->ops->set_to_rgmii(bsp_priv, bsp_priv->tx_delay, 0); in rk_gmac_powerup()
1802 bsp_priv->ops->set_to_rgmii(bsp_priv, 0, bsp_priv->rx_delay); in rk_gmac_powerup()
1806 bsp_priv->ops->set_to_rmii(bsp_priv); in rk_gmac_powerup()
1812 ret = phy_power_on(bsp_priv, true); in rk_gmac_powerup()
1814 gmac_clk_enable(bsp_priv, false); in rk_gmac_powerup()
1820 if (bsp_priv->integrated_phy) in rk_gmac_powerup()
1821 rk_gmac_integrated_phy_powerup(bsp_priv); in rk_gmac_powerup()
1839 struct rk_priv_data *bsp_priv = priv; in rk_fix_speed() local
1840 struct device *dev = &bsp_priv->pdev->dev; in rk_fix_speed()
1842 switch (bsp_priv->phy_iface) { in rk_fix_speed()
1847 if (bsp_priv->ops->set_rgmii_speed) in rk_fix_speed()
1848 bsp_priv->ops->set_rgmii_speed(bsp_priv, speed); in rk_fix_speed()
1851 if (bsp_priv->ops->set_rmii_speed) in rk_fix_speed()
1852 bsp_priv->ops->set_rmii_speed(bsp_priv, speed); in rk_fix_speed()
1855 dev_err(dev, "unsupported interface %d", bsp_priv->phy_iface); in rk_fix_speed()
1887 plat_dat->bsp_priv = rk_gmac_setup(pdev, plat_dat, data); in rk_gmac_probe()
1888 if (IS_ERR(plat_dat->bsp_priv)) { in rk_gmac_probe()
1889 ret = PTR_ERR(plat_dat->bsp_priv); in rk_gmac_probe()
1897 ret = rk_gmac_powerup(plat_dat->bsp_priv); in rk_gmac_probe()
1908 rk_gmac_powerdown(plat_dat->bsp_priv); in rk_gmac_probe()
1917 struct rk_priv_data *bsp_priv = get_stmmac_bsp_priv(&pdev->dev); in rk_gmac_remove() local
1921 rk_gmac_powerdown(bsp_priv); in rk_gmac_remove()
1929 struct rk_priv_data *bsp_priv = get_stmmac_bsp_priv(dev); in rk_gmac_suspend() local
1934 rk_gmac_powerdown(bsp_priv); in rk_gmac_suspend()
1935 bsp_priv->suspended = true; in rk_gmac_suspend()
1943 struct rk_priv_data *bsp_priv = get_stmmac_bsp_priv(dev); in rk_gmac_resume() local
1946 if (bsp_priv->suspended) { in rk_gmac_resume()
1947 rk_gmac_powerup(bsp_priv); in rk_gmac_resume()
1948 bsp_priv->suspended = false; in rk_gmac_resume()