Lines Matching refs:plat
285 if (!priv->plat->fpe_cfg) { in tc_init()
286 priv->plat->fpe_cfg = devm_kzalloc(priv->device, in tc_init()
287 sizeof(*priv->plat->fpe_cfg), in tc_init()
289 if (!priv->plat->fpe_cfg) in tc_init()
292 memset(priv->plat->fpe_cfg, 0, sizeof(*priv->plat->fpe_cfg)); in tc_init()
345 u32 tx_queues_count = priv->plat->tx_queues_to_use; in tc_setup_cbs()
384 mode_to_use = priv->plat->tx_queues_cfg[queue].mode_to_use; in tc_setup_cbs()
390 priv->plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_AVB; in tc_setup_cbs()
397 priv->plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB; in tc_setup_cbs()
402 priv->plat->tx_queues_cfg[queue].idle_slope = value & GENMASK(31, 0); in tc_setup_cbs()
405 priv->plat->tx_queues_cfg[queue].send_slope = value & GENMASK(31, 0); in tc_setup_cbs()
408 priv->plat->tx_queues_cfg[queue].high_credit = value & GENMASK(31, 0); in tc_setup_cbs()
411 priv->plat->tx_queues_cfg[queue].low_credit = value & GENMASK(31, 0); in tc_setup_cbs()
414 priv->plat->tx_queues_cfg[queue].send_slope, in tc_setup_cbs()
415 priv->plat->tx_queues_cfg[queue].idle_slope, in tc_setup_cbs()
416 priv->plat->tx_queues_cfg[queue].high_credit, in tc_setup_cbs()
417 priv->plat->tx_queues_cfg[queue].low_credit, in tc_setup_cbs()
922 struct plat_stmmacenet_data *plat = priv->plat; in tc_setup_taprio() local
976 if (!plat->est) { in tc_setup_taprio()
977 plat->est = devm_kzalloc(priv->device, sizeof(*plat->est), in tc_setup_taprio()
979 if (!plat->est) in tc_setup_taprio()
982 mutex_init(&priv->plat->est->lock); in tc_setup_taprio()
984 memset(plat->est, 0, sizeof(*plat->est)); in tc_setup_taprio()
989 mutex_lock(&priv->plat->est->lock); in tc_setup_taprio()
990 priv->plat->est->gcl_size = size; in tc_setup_taprio()
991 priv->plat->est->enable = qopt->enable; in tc_setup_taprio()
992 mutex_unlock(&priv->plat->est->lock); in tc_setup_taprio()
1020 priv->plat->est->gcl[i] = delta_ns | (gates << wid); in tc_setup_taprio()
1023 mutex_lock(&priv->plat->est->lock); in tc_setup_taprio()
1030 priv->plat->est->btr[0] = (u32)time.tv_nsec; in tc_setup_taprio()
1031 priv->plat->est->btr[1] = (u32)time.tv_sec; in tc_setup_taprio()
1034 priv->plat->est->btr_reserve[0] = (u32)qopt_time.tv_nsec; in tc_setup_taprio()
1035 priv->plat->est->btr_reserve[1] = (u32)qopt_time.tv_sec; in tc_setup_taprio()
1038 priv->plat->est->ctr[0] = do_div(ctr, NSEC_PER_SEC); in tc_setup_taprio()
1039 priv->plat->est->ctr[1] = (u32)ctr; in tc_setup_taprio()
1042 mutex_unlock(&priv->plat->est->lock); in tc_setup_taprio()
1049 priv->plat->fpe_cfg->enable = fpe; in tc_setup_taprio()
1051 ret = stmmac_est_configure(priv, priv->ioaddr, priv->plat->est, in tc_setup_taprio()
1052 priv->plat->clk_ptp_rate); in tc_setup_taprio()
1053 mutex_unlock(&priv->plat->est->lock); in tc_setup_taprio()
1069 if (priv->plat->est) { in tc_setup_taprio()
1070 mutex_lock(&priv->plat->est->lock); in tc_setup_taprio()
1071 priv->plat->est->enable = false; in tc_setup_taprio()
1072 stmmac_est_configure(priv, priv->ioaddr, priv->plat->est, in tc_setup_taprio()
1073 priv->plat->clk_ptp_rate); in tc_setup_taprio()
1074 mutex_unlock(&priv->plat->est->lock); in tc_setup_taprio()
1077 priv->plat->fpe_cfg->enable = false; in tc_setup_taprio()
1079 priv->plat->tx_queues_to_use, in tc_setup_taprio()
1080 priv->plat->rx_queues_to_use, in tc_setup_taprio()
1095 if (qopt->queue >= priv->plat->tx_queues_to_use) in tc_setup_etf()