Lines Matching refs:phydev
123 static int dp83822_set_wol(struct phy_device *phydev, in dp83822_set_wol() argument
126 struct net_device *ndev = phydev->attached_dev; in dp83822_set_wol()
139 phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_DA1, in dp83822_set_wol()
141 phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_DA2, in dp83822_set_wol()
143 phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_DA3, in dp83822_set_wol()
146 value = phy_read_mmd(phydev, DP83822_DEVADDR, in dp83822_set_wol()
154 phy_write_mmd(phydev, DP83822_DEVADDR, in dp83822_set_wol()
157 phy_write_mmd(phydev, DP83822_DEVADDR, in dp83822_set_wol()
160 phy_write_mmd(phydev, DP83822_DEVADDR, in dp83822_set_wol()
169 phy_read(phydev, MII_DP83822_MISR2); in dp83822_set_wol()
174 return phy_write_mmd(phydev, DP83822_DEVADDR, in dp83822_set_wol()
177 return phy_clear_bits_mmd(phydev, DP83822_DEVADDR, in dp83822_set_wol()
182 static void dp83822_get_wol(struct phy_device *phydev, in dp83822_get_wol() argument
191 value = phy_read_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG); in dp83822_get_wol()
197 sopass_val = phy_read_mmd(phydev, DP83822_DEVADDR, in dp83822_get_wol()
202 sopass_val = phy_read_mmd(phydev, DP83822_DEVADDR, in dp83822_get_wol()
207 sopass_val = phy_read_mmd(phydev, DP83822_DEVADDR, in dp83822_get_wol()
220 static int dp83822_config_intr(struct phy_device *phydev) in dp83822_config_intr() argument
222 struct dp83822_private *dp83822 = phydev->priv; in dp83822_config_intr()
227 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { in dp83822_config_intr()
228 misr_status = phy_read(phydev, MII_DP83822_MISR1); in dp83822_config_intr()
243 err = phy_write(phydev, MII_DP83822_MISR1, misr_status); in dp83822_config_intr()
247 misr_status = phy_read(phydev, MII_DP83822_MISR2); in dp83822_config_intr()
262 err = phy_write(phydev, MII_DP83822_MISR2, misr_status); in dp83822_config_intr()
266 physcr_status = phy_read(phydev, MII_DP83822_PHYSCR); in dp83822_config_intr()
273 err = phy_write(phydev, MII_DP83822_MISR1, 0); in dp83822_config_intr()
277 err = phy_write(phydev, MII_DP83822_MISR2, 0); in dp83822_config_intr()
281 physcr_status = phy_read(phydev, MII_DP83822_PHYSCR); in dp83822_config_intr()
288 return phy_write(phydev, MII_DP83822_PHYSCR, physcr_status); in dp83822_config_intr()
291 static irqreturn_t dp83822_handle_interrupt(struct phy_device *phydev) in dp83822_handle_interrupt() argument
303 irq_status = phy_read(phydev, MII_DP83822_MISR1); in dp83822_handle_interrupt()
305 phy_error(phydev); in dp83822_handle_interrupt()
311 irq_status = phy_read(phydev, MII_DP83822_MISR2); in dp83822_handle_interrupt()
313 phy_error(phydev); in dp83822_handle_interrupt()
322 phy_trigger_machine(phydev); in dp83822_handle_interrupt()
327 static int dp8382x_disable_wol(struct phy_device *phydev) in dp8382x_disable_wol() argument
329 return phy_clear_bits_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG, in dp8382x_disable_wol()
334 static int dp83822_read_status(struct phy_device *phydev) in dp83822_read_status() argument
336 struct dp83822_private *dp83822 = phydev->priv; in dp83822_read_status()
337 int status = phy_read(phydev, MII_DP83822_PHYSTS); in dp83822_read_status()
343 phydev->speed = SPEED_UNKNOWN; in dp83822_read_status()
344 phydev->duplex = DUPLEX_UNKNOWN; in dp83822_read_status()
346 ctrl2 = phy_read(phydev, MII_DP83822_CTRL_2); in dp83822_read_status()
351 ret = phy_write(phydev, MII_DP83822_CTRL_2, in dp83822_read_status()
359 ret = genphy_read_status(phydev); in dp83822_read_status()
367 phydev->duplex = DUPLEX_FULL; in dp83822_read_status()
369 phydev->duplex = DUPLEX_HALF; in dp83822_read_status()
372 phydev->speed = SPEED_10; in dp83822_read_status()
374 phydev->speed = SPEED_100; in dp83822_read_status()
379 static int dp83822_config_init(struct phy_device *phydev) in dp83822_config_init() argument
381 struct dp83822_private *dp83822 = phydev->priv; in dp83822_config_init()
382 struct device *dev = &phydev->mdio.dev; in dp83822_config_init()
389 if (phy_interface_is_rgmii(phydev)) { in dp83822_config_init()
390 rx_int_delay = phy_get_internal_delay(phydev, dev, NULL, 0, in dp83822_config_init()
398 tx_int_delay = phy_get_internal_delay(phydev, dev, NULL, 0, in dp83822_config_init()
406 err = phy_set_bits_mmd(phydev, DP83822_DEVADDR, in dp83822_config_init()
412 phy_set_bits_mmd(phydev, DP83822_DEVADDR, in dp83822_config_init()
415 phy_clear_bits_mmd(phydev, DP83822_DEVADDR, in dp83822_config_init()
420 err = phy_modify(phydev, MII_DP83822_CTRL_2, in dp83822_config_init()
426 linkmode_and(phydev->advertising, phydev->advertising, in dp83822_config_init()
427 phydev->supported); in dp83822_config_init()
430 phydev->supported); in dp83822_config_init()
432 phydev->advertising); in dp83822_config_init()
434 phydev->supported); in dp83822_config_init()
436 phydev->supported); in dp83822_config_init()
438 phydev->advertising); in dp83822_config_init()
440 phydev->advertising); in dp83822_config_init()
443 bmcr = phy_read(phydev, MII_BMCR); in dp83822_config_init()
448 err = phy_modify(phydev, MII_BMCR, BMCR_ANENABLE, 0); in dp83822_config_init()
452 phydev->autoneg = AUTONEG_DISABLE; in dp83822_config_init()
454 phydev->supported); in dp83822_config_init()
456 phydev->advertising); in dp83822_config_init()
459 err = phy_modify_changed(phydev, MII_ADVERTISE, in dp83822_config_init()
467 err = phy_set_bits_mmd(phydev, DP83822_DEVADDR, in dp83822_config_init()
474 return dp8382x_disable_wol(phydev); in dp83822_config_init()
477 static int dp8382x_config_init(struct phy_device *phydev) in dp8382x_config_init() argument
479 return dp8382x_disable_wol(phydev); in dp8382x_config_init()
482 static int dp83822_phy_reset(struct phy_device *phydev) in dp83822_phy_reset() argument
486 err = phy_write(phydev, MII_DP83822_RESET_CTRL, DP83822_SW_RESET); in dp83822_phy_reset()
490 return phydev->drv->config_init(phydev); in dp83822_phy_reset()
494 static int dp83822_of_init(struct phy_device *phydev) in dp83822_of_init() argument
496 struct dp83822_private *dp83822 = phydev->priv; in dp83822_of_init()
497 struct device *dev = &phydev->mdio.dev; in dp83822_of_init()
513 static int dp83822_of_init(struct phy_device *phydev) in dp83822_of_init() argument
519 static int dp83822_read_straps(struct phy_device *phydev) in dp83822_read_straps() argument
521 struct dp83822_private *dp83822 = phydev->priv; in dp83822_read_straps()
525 val = phy_read_mmd(phydev, DP83822_DEVADDR, MII_DP83822_SOR1); in dp83822_read_straps()
529 phydev_dbg(phydev, "SOR1 strap register: 0x%04x\n", val); in dp83822_read_straps()
546 static int dp83822_probe(struct phy_device *phydev) in dp83822_probe() argument
551 dp83822 = devm_kzalloc(&phydev->mdio.dev, sizeof(*dp83822), in dp83822_probe()
556 phydev->priv = dp83822; in dp83822_probe()
558 ret = dp83822_read_straps(phydev); in dp83822_probe()
562 dp83822_of_init(phydev); in dp83822_probe()
565 phydev->port = PORT_FIBRE; in dp83822_probe()
570 static int dp83822_suspend(struct phy_device *phydev) in dp83822_suspend() argument
574 value = phy_read_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG); in dp83822_suspend()
577 genphy_suspend(phydev); in dp83822_suspend()
582 static int dp83822_resume(struct phy_device *phydev) in dp83822_resume() argument
586 genphy_resume(phydev); in dp83822_resume()
588 value = phy_read_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG); in dp83822_resume()
590 phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG, value | in dp83822_resume()