Lines Matching refs:AQ_ACCESS_MAC

430 	aqc111_read16_cmd(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE,  in aqc111_change_mtu()
437 	aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE,  in aqc111_change_mtu()
443 		aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_RX_BULKIN_QCTRL,  in aqc111_change_mtu()
457 	aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_PAUSE_WATERLVL_LOW,  in aqc111_change_mtu()
473 	return aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_NODE_ID, ETH_ALEN,  in aqc111_set_mac_addr()
485 	aqc111_read_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_CONTROL, 1, 1, &reg8);  in aqc111_vlan_rx_kill_vid()
490 	aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_ADDRESS, 1, 1, &reg8);  in aqc111_vlan_rx_kill_vid()
493 	aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_CONTROL, 1, 1, &reg8);  in aqc111_vlan_rx_kill_vid()
494 	aqc111_read16_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_DATA0, 2, &reg16);  in aqc111_vlan_rx_kill_vid()
496 	aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_DATA0, 2, &reg16);  in aqc111_vlan_rx_kill_vid()
498 	aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_CONTROL, 1, 1, &reg8);  in aqc111_vlan_rx_kill_vid()
510 	aqc111_read_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_CONTROL, 1, 1, &reg8);  in aqc111_vlan_rx_add_vid()
515 	aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_ADDRESS, 1, 1, &reg8);  in aqc111_vlan_rx_add_vid()
518 	aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_CONTROL, 1, 1, &reg8);  in aqc111_vlan_rx_add_vid()
519 	aqc111_read16_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_DATA0, 2, &reg16);  in aqc111_vlan_rx_add_vid()
521 	aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_DATA0, 2, &reg16);  in aqc111_vlan_rx_add_vid()
523 	aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_CONTROL, 1, 1, &reg8);  in aqc111_vlan_rx_add_vid()
553 		aqc111_write_cmd_async(dev, AQ_ACCESS_MAC,  in aqc111_set_rx_mode()
561 	aqc111_write16_cmd_async(dev, AQ_ACCESS_MAC, SFR_RX_CTL,  in aqc111_set_rx_mode()
575 		aqc111_read_cmd(dev, AQ_ACCESS_MAC, SFR_TXCOE_CTL, 1, 1, &reg8);  in aqc111_set_features()
577 		aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_TXCOE_CTL,  in aqc111_set_features()
582 		aqc111_read_cmd(dev, AQ_ACCESS_MAC, SFR_TXCOE_CTL, 1, 1, &reg8);  in aqc111_set_features()
584 		aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_TXCOE_CTL,  in aqc111_set_features()
589 		aqc111_read_cmd(dev, AQ_ACCESS_MAC, SFR_RXCOE_CTL, 1, 1, &reg8);  in aqc111_set_features()
600 		aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_RXCOE_CTL,  in aqc111_set_features()
610 				aqc111_write_cmd(dev, AQ_ACCESS_MAC,  in aqc111_set_features()
614 				aqc111_write16_cmd(dev, AQ_ACCESS_MAC,  in aqc111_set_features()
618 				aqc111_write_cmd(dev, AQ_ACCESS_MAC,  in aqc111_set_features()
622 			aqc111_read_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_CONTROL,  in aqc111_set_features()
625 			aqc111_write_cmd(dev, AQ_ACCESS_MAC,  in aqc111_set_features()
628 			aqc111_read_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_CONTROL,  in aqc111_set_features()
631 			aqc111_write_cmd(dev, AQ_ACCESS_MAC,  in aqc111_set_features()
673 	aqc111_read_cmd(dev, AQ_ACCESS_MAC, AQ_FW_VER_MAJOR,  in aqc111_read_fw_version()
675 	aqc111_read_cmd(dev, AQ_ACCESS_MAC, AQ_FW_VER_MINOR,  in aqc111_read_fw_version()
677 	aqc111_read_cmd(dev, AQ_ACCESS_MAC, AQ_FW_VER_REV,  in aqc111_read_fw_version()
759 	aqc111_write16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_PHYPWR_RSTCTL,  in aqc111_unbind()
762 	aqc111_write16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_PHYPWR_RSTCTL,  in aqc111_unbind()
836 	aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_INTER_PACKET_GAP_0,  in aqc111_configure_rx()
839 	aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_TX_PAUSE_RESEND_T, 3, 3, buf);  in aqc111_configure_rx()
863 	aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_RX_BULKIN_QCTRL, 5, 5, buf);  in aqc111_configure_rx()
875 	aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_PAUSE_WATERLVL_LOW,  in aqc111_configure_rx()
888 	aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_RXCOE_CTL, 1, 1, &reg8);  in aqc111_configure_csum_offload()
897 	aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_TXCOE_CTL, 1, 1, &reg8);  in aqc111_configure_csum_offload()
914 		aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_CONTROL,  in aqc111_link_reset()
918 		aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_BMRX_DMA_CONTROL,  in aqc111_link_reset()
921 		aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_BMTX_DMA_CONTROL,  in aqc111_link_reset()
924 		aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_ARC_CTRL, 1, 1, &reg8);  in aqc111_link_reset()
928 		aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_RX_CTL, 2, &reg16);  in aqc111_link_reset()
931 		aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_ETH_MAC_PATH,  in aqc111_link_reset()
935 		aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_BULK_OUT_CTRL,  in aqc111_link_reset()
939 		aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE,  in aqc111_link_reset()
943 		aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE,  in aqc111_link_reset()
950 		aqc111_read16_cmd(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE,  in aqc111_link_reset()
958 		aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE,  in aqc111_link_reset()
962 		aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_RX_CTL,  in aqc111_link_reset()
967 		aqc111_read16_cmd(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE,  in aqc111_link_reset()
970 		aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE,  in aqc111_link_reset()
974 		aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_RX_CTL,  in aqc111_link_reset()
978 		aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_BULK_OUT_CTRL,  in aqc111_link_reset()
981 		aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_BULK_OUT_CTRL,  in aqc111_link_reset()
1009 	aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_NODE_ID, ETH_ALEN,  in aqc111_reset()
1013 	aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_BM_INT_MASK, 1, 1, &reg8);  in aqc111_reset()
1016 	aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_SWP_CTRL, 1, 1, &reg8);  in aqc111_reset()
1018 	aqc111_read_cmd(dev, AQ_ACCESS_MAC, SFR_MONITOR_MODE, 1, 1, &reg8);  in aqc111_reset()
1022 	aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_MONITOR_MODE, 1, 1, &reg8);  in aqc111_reset()
1038 	aqc111_read16_cmd(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE,  in aqc111_stop()
1041 	aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE,  in aqc111_stop()
1044 	aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_RX_CTL, 2, &reg16);  in aqc111_stop()
1333 	aqc111_read16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_RX_CTL, 2, &reg16);  in aqc111_suspend()
1337 	aqc111_write16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_RX_CTL, 2, &reg16);  in aqc111_suspend()
1339 	aqc111_read16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_PHYPWR_RSTCTL,  in aqc111_suspend()
1342 	aqc111_write16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_PHYPWR_RSTCTL,  in aqc111_suspend()
1346 	aqc111_write_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_BULK_OUT_CTRL,  in aqc111_suspend()
1351 	aqc111_write16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_RX_CTL,  in aqc111_suspend()
1355 	aqc111_write_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_ETH_MAC_PATH,  in aqc111_suspend()
1368 		aqc111_write16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_RX_CTL,  in aqc111_suspend()
1371 		aqc111_write_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_BM_INT_MASK,  in aqc111_suspend()
1374 		aqc111_write_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_BMRX_DMA_CONTROL,  in aqc111_suspend()
1377 		aqc111_write_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_ETH_MAC_PATH,  in aqc111_suspend()
1380 		aqc111_write_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_RX_BULKIN_QCTRL,  in aqc111_suspend()
1383 		aqc111_write_cmd_nopm(dev, AQ_ACCESS_MAC,  in aqc111_suspend()
1385 		aqc111_write_cmd_nopm(dev, AQ_ACCESS_MAC,  in aqc111_suspend()
1388 		aqc111_write_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_RX_BULKIN_QSIZE,  in aqc111_suspend()
1390 		aqc111_write_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_RX_BULKIN_QIFG,  in aqc111_suspend()
1393 		aqc111_read16_cmd_nopm(dev, AQ_ACCESS_MAC,  in aqc111_suspend()
1396 		aqc111_write16_cmd_nopm(dev, AQ_ACCESS_MAC,  in aqc111_suspend()
1409 		aqc111_read16_cmd_nopm(dev, AQ_ACCESS_MAC,  in aqc111_suspend()
1412 		aqc111_write16_cmd_nopm(dev, AQ_ACCESS_MAC,  in aqc111_suspend()
1434 	aqc111_write_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_BM_INT_MASK,  in aqc111_resume()
1439 	aqc111_write16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_RX_CTL, 2, &reg16);  in aqc111_resume()
1442 	aqc111_write16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_RX_CTL, 2, &reg16);  in aqc111_resume()
1447 	aqc111_read16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE,  in aqc111_resume()
1450 	aqc111_write16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE,  in aqc111_resume()
1453 	aqc111_write_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_ETH_MAC_PATH,  in aqc111_resume()
1456 	aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_BMRX_DMA_CONTROL, 1, 1, &reg8);  in aqc111_resume()