Lines Matching refs:ee
681 struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; in ath5k_hw_gainf_calibrate() local
706 ee->ee_cck_ofdm_gain_delta; in ath5k_hw_gainf_calibrate()
818 struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; in ath5k_hw_rfregs_init() local
936 ath5k_hw_rfb_op(ah, rf_regs, ee->ee_ob[ee_mode][obdb], in ath5k_hw_rfregs_init()
939 ath5k_hw_rfb_op(ah, rf_regs, ee->ee_db[ee_mode][obdb], in ath5k_hw_rfregs_init()
957 ath5k_hw_rfb_op(ah, rf_regs, ee->ee_ob[ee_mode][obdb], in ath5k_hw_rfregs_init()
960 ath5k_hw_rfb_op(ah, rf_regs, ee->ee_db[ee_mode][obdb], in ath5k_hw_rfregs_init()
998 ath5k_hw_rfb_op(ah, rf_regs, !ee->ee_xpd[ee_mode], in ath5k_hw_rfregs_init()
1001 ath5k_hw_rfb_op(ah, rf_regs, ee->ee_x_gain[ee_mode], in ath5k_hw_rfregs_init()
1004 ath5k_hw_rfb_op(ah, rf_regs, ee->ee_i_gain[ee_mode], in ath5k_hw_rfregs_init()
1007 ath5k_hw_rfb_op(ah, rf_regs, ee->ee_xpd[ee_mode], in ath5k_hw_rfregs_init()
1062 ath5k_hw_rfb_op(ah, rf_regs, ee->ee_xpd[ee_mode], in ath5k_hw_rfregs_init()
1068 ee->ee_x_gain[ee_mode], in ath5k_hw_rfregs_init()
1072 u8 *pdg_curve_to_idx = ee->ee_pdc_to_idx[ee_mode]; in ath5k_hw_rfregs_init()
1073 if (ee->ee_pd_gains[ee_mode] > 1) { in ath5k_hw_rfregs_init()
1124 ath5k_hw_rfb_op(ah, rf_regs, ee->ee_i_gain[ee_mode], in ath5k_hw_rfregs_init()
1596 struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; in ath5k_hw_update_noise_floor() local
1615 threshold = ee->ee_noise_floor_thr[ee_mode]; in ath5k_hw_update_noise_floor()
1906 struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; in ath5k_hw_set_spur_mitigation_filter() local
1935 spur_chan_fbin = ee->ee_spur_chans[i][freq_band]; in ath5k_hw_set_spur_mitigation_filter()
2585 struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; in ath5k_get_chan_pcal_surrounding_piers() local
2596 pcinfo = ee->ee_pwr_cal_a; in ath5k_get_chan_pcal_surrounding_piers()
2600 pcinfo = ee->ee_pwr_cal_b; in ath5k_get_chan_pcal_surrounding_piers()
2605 pcinfo = ee->ee_pwr_cal_g; in ath5k_get_chan_pcal_surrounding_piers()
2609 max = ee->ee_n_piers[mode] - 1; in ath5k_get_chan_pcal_surrounding_piers()
2673 struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; in ath5k_get_rate_pcal_data() local
2684 rpinfo = ee->ee_rate_tpwr_a; in ath5k_get_rate_pcal_data()
2688 rpinfo = ee->ee_rate_tpwr_b; in ath5k_get_rate_pcal_data()
2693 rpinfo = ee->ee_rate_tpwr_g; in ath5k_get_rate_pcal_data()
2697 max = ee->ee_rate_target_pwr_num[mode] - 1; in ath5k_get_rate_pcal_data()
2768 struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; in ath5k_get_max_ctl_power() local
2769 struct ath5k_edge_power *rep = ee->ee_ctl_pwr; in ath5k_get_max_ctl_power()
2770 u8 *ctl_val = ee->ee_ctl; in ath5k_get_max_ctl_power()
2800 for (i = 0; i < ee->ee_ctls; i++) { in ath5k_get_max_ctl_power()
3203 struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; in ath5k_write_pwr_to_pdadc_table() local
3205 u8 *pdg_to_idx = ee->ee_pdc_to_idx[ee_mode]; in ath5k_write_pwr_to_pdadc_table()
3206 u8 pdcurves = ee->ee_pd_gains[ee_mode]; in ath5k_write_pwr_to_pdadc_table()
3277 struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; in ath5k_setup_channel_powertable() local
3278 u8 *pdg_curve_to_idx = ee->ee_pdc_to_idx[ee_mode]; in ath5k_setup_channel_powertable()
3293 for (pdg = 0; pdg < ee->ee_pd_gains[ee_mode]; pdg++) { in ath5k_setup_channel_powertable()
3340 if (!(ee->ee_pd_gains[ee_mode] > 1 && pdg == 0)) { in ath5k_setup_channel_powertable()
3425 ee->ee_pd_gains[ee_mode]); in ath5k_setup_channel_powertable()
3445 ee->ee_pd_gains[ee_mode]); in ath5k_setup_channel_powertable()