Lines Matching refs:_ah
79 #define REG_WRITE(_ah, _reg, _val) \ argument
80 (_ah)->reg_ops.write((_ah), (_val), (_reg))
82 #define REG_READ(_ah, _reg) \ argument
83 (_ah)->reg_ops.read((_ah), (_reg))
85 #define REG_READ_MULTI(_ah, _addr, _val, _cnt) \ argument
86 (_ah)->reg_ops.multi_read((_ah), (_addr), (_val), (_cnt))
88 #define REG_RMW(_ah, _reg, _set, _clr) \ argument
89 (_ah)->reg_ops.rmw((_ah), (_reg), (_set), (_clr))
91 #define ENABLE_REGWRITE_BUFFER(_ah) \ argument
93 if ((_ah)->reg_ops.enable_write_buffer) \
94 (_ah)->reg_ops.enable_write_buffer((_ah)); \
97 #define REGWRITE_BUFFER_FLUSH(_ah) \ argument
99 if ((_ah)->reg_ops.write_flush) \
100 (_ah)->reg_ops.write_flush((_ah)); \
103 #define ENABLE_REG_RMW_BUFFER(_ah) \ argument
105 if ((_ah)->reg_ops.enable_rmw_buffer) \
106 (_ah)->reg_ops.enable_rmw_buffer((_ah)); \
109 #define REG_RMW_BUFFER_FLUSH(_ah) \ argument
111 if ((_ah)->reg_ops.rmw_flush) \
112 (_ah)->reg_ops.rmw_flush((_ah)); \
469 #define IS_CHAN_A_FAST_CLOCK(_ah, _c) \ argument
470 (IS_CHAN_5GHZ(_c) && ((_ah)->caps.hw_caps & ATH9K_HW_CAP_FASTCLOCK))