Lines Matching refs:REG_READ
48 return REG_READ(ah, AR_QTXDP(q)); in ath9k_hw_gettxbuf()
69 npend = REG_READ(ah, AR_QSTS(q)) & AR_Q_STS_PEND_FR_CNT; in ath9k_hw_numtxpending()
72 if (REG_READ(ah, AR_Q_TXE) & (1 << q)) in ath9k_hw_numtxpending()
114 txcfg = REG_READ(ah, AR_TXCFG); in ath9k_hw_updatetxtriglevel()
653 reg = REG_READ(ah, AR_OBS_BUS_1); in ath9k_hw_setrxabort()
710 if ((REG_READ(ah, AR_CR) & AR_CR_RXE(ah)) == 0) in ath9k_hw_stopdmarecv()
714 mac_status = REG_READ(ah, AR_DMADBG_7) & 0x7f0; in ath9k_hw_stopdmarecv()
730 REG_READ(ah, AR_CR), in ath9k_hw_stopdmarecv()
731 REG_READ(ah, AR_DIAG_SW), in ath9k_hw_stopdmarecv()
732 REG_READ(ah, AR_DMADBG_7)); in ath9k_hw_stopdmarecv()
765 host_isr = REG_READ(ah, AR_INTR_ASYNC_CAUSE(ah)); in ath9k_hw_intrpend()
772 host_isr = REG_READ(ah, AR_INTR_SYNC_CAUSE(ah)); in ath9k_hw_intrpend()
787 (void) REG_READ(ah, AR_IER); in ath9k_hw_kill_interrupts()
790 (void) REG_READ(ah, AR_INTR_ASYNC_ENABLE(ah)); in ath9k_hw_kill_interrupts()
793 (void) REG_READ(ah, AR_INTR_SYNC_ENABLE(ah)); in ath9k_hw_kill_interrupts()
834 REG_READ(ah, AR_IMR), REG_READ(ah, AR_IER)); in __ath9k_hw_enable_interrupts()
848 REG_READ(ah, AR_INTR_PRIO_ASYNC_ENABLE(ah)), in __ath9k_hw_enable_interrupts()
849 REG_READ(ah, AR_INTR_PRIO_ASYNC_MASK(ah))); in __ath9k_hw_enable_interrupts()
852 ah->msi_reg = REG_READ(ah, AR_PCIE_MSI(ah)); in __ath9k_hw_enable_interrupts()
863 _msi_reg = REG_READ(ah, AR_PCIE_MSI(ah)); in __ath9k_hw_enable_interrupts()
922 REG_READ(ah, AR_INTR_PRIO_ASYNC_ENABLE(ah)); in ath9k_hw_set_interrupts()