Lines Matching refs:control_flags
14 u32 *control_flags) in iwl_pcie_ctxt_info_dbg_enable() argument
75 *control_flags |= IWL_PRPH_SCRATCH_EARLY_DEBUG_EN | dbg_flags; in iwl_pcie_ctxt_info_dbg_enable()
86 u32 control_flags = 0; in iwl_pcie_ctxt_info_gen3_init() local
97 control_flags |= IWL_PRPH_SCRATCH_RB_SIZE_4K; in iwl_pcie_ctxt_info_gen3_init()
100 control_flags |= IWL_PRPH_SCRATCH_RB_SIZE_4K; in iwl_pcie_ctxt_info_gen3_init()
102 control_flags |= IWL_PRPH_SCRATCH_RB_SIZE_EXT_8K; in iwl_pcie_ctxt_info_gen3_init()
105 control_flags |= IWL_PRPH_SCRATCH_RB_SIZE_4K; in iwl_pcie_ctxt_info_gen3_init()
107 control_flags |= IWL_PRPH_SCRATCH_RB_SIZE_EXT_16K; in iwl_pcie_ctxt_info_gen3_init()
125 control_flags |= IWL_PRPH_SCRATCH_MTR_MODE; in iwl_pcie_ctxt_info_gen3_init()
126 control_flags |= IWL_PRPH_MTR_FORMAT_256B & IWL_PRPH_SCRATCH_MTR_FORMAT; in iwl_pcie_ctxt_info_gen3_init()
129 control_flags |= IWL_PRPH_SCRATCH_IMR_DEBUG_EN; in iwl_pcie_ctxt_info_gen3_init()
136 &control_flags); in iwl_pcie_ctxt_info_gen3_init()
137 prph_sc_ctrl->control.control_flags = cpu_to_le32(control_flags); in iwl_pcie_ctxt_info_gen3_init()