Lines Matching refs:trans_pcie
81 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_pcie_ctxt_info_gen3_init() local
91 switch (trans_pcie->rx_buf_size) { in iwl_pcie_ctxt_info_gen3_init()
113 &trans_pcie->prph_scratch_dma_addr, in iwl_pcie_ctxt_info_gen3_init()
133 cpu_to_le64(trans_pcie->rxq->bd_dma); in iwl_pcie_ctxt_info_gen3_init()
160 &trans_pcie->prph_info_dma_addr, in iwl_pcie_ctxt_info_gen3_init()
170 &trans_pcie->ctxt_info_dma_addr, in iwl_pcie_ctxt_info_gen3_init()
178 cpu_to_le64(trans_pcie->prph_info_dma_addr); in iwl_pcie_ctxt_info_gen3_init()
180 cpu_to_le64(trans_pcie->prph_scratch_dma_addr); in iwl_pcie_ctxt_info_gen3_init()
184 cpu_to_le64(trans_pcie->rxq->rb_stts_dma); in iwl_pcie_ctxt_info_gen3_init()
186 cpu_to_le64(trans_pcie->prph_info_dma_addr + PAGE_SIZE / 2); in iwl_pcie_ctxt_info_gen3_init()
188 cpu_to_le64(trans_pcie->prph_info_dma_addr + 3 * PAGE_SIZE / 4); in iwl_pcie_ctxt_info_gen3_init()
192 cpu_to_le64(trans_pcie->rxq->used_bd_dma); in iwl_pcie_ctxt_info_gen3_init()
198 trans_pcie->ctxt_info_gen3 = ctxt_info_gen3; in iwl_pcie_ctxt_info_gen3_init()
199 trans_pcie->prph_info = prph_info; in iwl_pcie_ctxt_info_gen3_init()
200 trans_pcie->prph_scratch = prph_scratch; in iwl_pcie_ctxt_info_gen3_init()
203 trans_pcie->iml = dma_alloc_coherent(trans->dev, trans->iml_len, in iwl_pcie_ctxt_info_gen3_init()
204 &trans_pcie->iml_dma_addr, in iwl_pcie_ctxt_info_gen3_init()
206 if (!trans_pcie->iml) { in iwl_pcie_ctxt_info_gen3_init()
211 memcpy(trans_pcie->iml, trans->iml, trans->iml_len); in iwl_pcie_ctxt_info_gen3_init()
217 trans_pcie->ctxt_info_dma_addr); in iwl_pcie_ctxt_info_gen3_init()
219 trans_pcie->iml_dma_addr); in iwl_pcie_ctxt_info_gen3_init()
228 dma_free_coherent(trans->dev, sizeof(*trans_pcie->ctxt_info_gen3), in iwl_pcie_ctxt_info_gen3_init()
229 trans_pcie->ctxt_info_gen3, in iwl_pcie_ctxt_info_gen3_init()
230 trans_pcie->ctxt_info_dma_addr); in iwl_pcie_ctxt_info_gen3_init()
231 trans_pcie->ctxt_info_gen3 = NULL; in iwl_pcie_ctxt_info_gen3_init()
234 trans_pcie->prph_info_dma_addr); in iwl_pcie_ctxt_info_gen3_init()
240 trans_pcie->prph_scratch_dma_addr); in iwl_pcie_ctxt_info_gen3_init()
247 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_pcie_ctxt_info_gen3_free() local
249 if (trans_pcie->iml) { in iwl_pcie_ctxt_info_gen3_free()
250 dma_free_coherent(trans->dev, trans->iml_len, trans_pcie->iml, in iwl_pcie_ctxt_info_gen3_free()
251 trans_pcie->iml_dma_addr); in iwl_pcie_ctxt_info_gen3_free()
252 trans_pcie->iml_dma_addr = 0; in iwl_pcie_ctxt_info_gen3_free()
253 trans_pcie->iml = NULL; in iwl_pcie_ctxt_info_gen3_free()
261 if (!trans_pcie->ctxt_info_gen3) in iwl_pcie_ctxt_info_gen3_free()
265 dma_free_coherent(trans->dev, sizeof(*trans_pcie->ctxt_info_gen3), in iwl_pcie_ctxt_info_gen3_free()
266 trans_pcie->ctxt_info_gen3, in iwl_pcie_ctxt_info_gen3_free()
267 trans_pcie->ctxt_info_dma_addr); in iwl_pcie_ctxt_info_gen3_free()
268 trans_pcie->ctxt_info_dma_addr = 0; in iwl_pcie_ctxt_info_gen3_free()
269 trans_pcie->ctxt_info_gen3 = NULL; in iwl_pcie_ctxt_info_gen3_free()
271 dma_free_coherent(trans->dev, sizeof(*trans_pcie->prph_scratch), in iwl_pcie_ctxt_info_gen3_free()
272 trans_pcie->prph_scratch, in iwl_pcie_ctxt_info_gen3_free()
273 trans_pcie->prph_scratch_dma_addr); in iwl_pcie_ctxt_info_gen3_free()
274 trans_pcie->prph_scratch_dma_addr = 0; in iwl_pcie_ctxt_info_gen3_free()
275 trans_pcie->prph_scratch = NULL; in iwl_pcie_ctxt_info_gen3_free()
278 dma_free_coherent(trans->dev, PAGE_SIZE, trans_pcie->prph_info, in iwl_pcie_ctxt_info_gen3_free()
279 trans_pcie->prph_info_dma_addr); in iwl_pcie_ctxt_info_gen3_free()
280 trans_pcie->prph_info_dma_addr = 0; in iwl_pcie_ctxt_info_gen3_free()
281 trans_pcie->prph_info = NULL; in iwl_pcie_ctxt_info_gen3_free()
287 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_trans_pcie_ctx_info_gen3_set_pnvm() local
289 &trans_pcie->prph_scratch->ctrl_cfg; in iwl_trans_pcie_ctx_info_gen3_set_pnvm()
301 &trans_pcie->pnvm_dram); in iwl_trans_pcie_ctx_info_gen3_set_pnvm()
310 cpu_to_le64(trans_pcie->pnvm_dram.physical); in iwl_trans_pcie_ctx_info_gen3_set_pnvm()
312 cpu_to_le32(trans_pcie->pnvm_dram.size); in iwl_trans_pcie_ctx_info_gen3_set_pnvm()
320 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_trans_pcie_ctx_info_gen3_set_reduce_power() local
322 &trans_pcie->prph_scratch->ctrl_cfg; in iwl_trans_pcie_ctx_info_gen3_set_reduce_power()
334 &trans_pcie->reduce_power_dram); in iwl_trans_pcie_ctx_info_gen3_set_reduce_power()
344 cpu_to_le64(trans_pcie->reduce_power_dram.physical); in iwl_trans_pcie_ctx_info_gen3_set_reduce_power()
346 cpu_to_le32(trans_pcie->reduce_power_dram.size); in iwl_trans_pcie_ctx_info_gen3_set_reduce_power()