Lines Matching refs:__REG
125 #define __REG(id) (dev->reg.reg_rev[(id)]) macro
138 #define MT_MCU_INT_EVENT __REG(INT_MCU_CMD_EVENT)
570 #define MT_WFDMA0_BASE __REG(WFDMA0_ADDR)
625 #define MT_WFDMA_EXT_CSR_BASE __REG(WFDMA_EXT_CSR_ADDR)
653 #define MT_WFDMA0_PCIE1_BASE __REG(WFDMA0_PCIE1_ADDR)
693 #define MT_TXQ_WED_RING_BASE __REG(TXQ_WED_RING_BASE)
694 #define MT_RXQ_WED_RING_BASE __REG(RXQ_WED_RING_BASE)
695 #define MT_RXQ_WED_DATA_RING_BASE __REG(RXQ_WED_DATA_RING_BASE)
697 #define MT_INT_SOURCE_CSR __REG(INT_SOURCE_CSR)
698 #define MT_INT_MASK_CSR __REG(INT_MASK_CSR)
700 #define MT_INT1_SOURCE_CSR __REG(INT1_SOURCE_CSR)
701 #define MT_INT1_MASK_CSR __REG(INT1_MASK_CSR)
750 #define MT_MCU_CMD __REG(INT_MCU_CMD_SOURCE)
804 #define MT_CBTOP1_PHY_END __REG(CBTOP1_PHY_END)
807 #define MT_INFRA_MCU_END __REG(INFRA_MCU_ADDR_END)
1003 #define MT_FW_ASSERT_STAT __REG(FW_ASSERT_STAT_ADDR)
1004 #define MT_FW_EXCEPT_TYPE __REG(FW_EXCEPT_TYPE_ADDR)
1005 #define MT_FW_EXCEPT_COUNT __REG(FW_EXCEPT_COUNT_ADDR)
1006 #define MT_FW_CIRQ_COUNT __REG(FW_CIRQ_COUNT_ADDR)
1007 #define MT_FW_CIRQ_IDX __REG(FW_CIRQ_IDX_ADDR)
1008 #define MT_FW_CIRQ_LISR __REG(FW_CIRQ_LISR_ADDR)
1009 #define MT_FW_TASK_ID __REG(FW_TASK_ID_ADDR)
1010 #define MT_FW_TASK_IDX __REG(FW_TASK_IDX_ADDR)
1011 #define MT_FW_TASK_QID1 __REG(FW_TASK_QID1_ADDR)
1012 #define MT_FW_TASK_QID2 __REG(FW_TASK_QID2_ADDR)
1013 #define MT_FW_TASK_START __REG(FW_TASK_START_ADDR)
1014 #define MT_FW_TASK_END __REG(FW_TASK_END_ADDR)
1015 #define MT_FW_TASK_SIZE __REG(FW_TASK_SIZE_ADDR)
1016 #define MT_FW_LAST_MSG_ID __REG(FW_LAST_MSG_ID_ADDR)
1017 #define MT_FW_EINT_INFO __REG(FW_EINT_INFO_ADDR)
1018 #define MT_FW_SCHED_INFO __REG(FW_SCHED_INFO_ADDR)
1020 #define MT_SWDEF_BASE __REG(SWDEF_BASE_ADDR)