Lines Matching refs:MASKDWORD
75 if (bitmask != MASKDWORD) { in rtl88e_phy_set_bb_reg()
163 tmplong = rtl_get_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2, MASKDWORD); in _rtl88e_phy_rf_serial_read()
167 tmplong2 = rtl_get_bbreg(hw, pphyreg->rfhssi_para2, MASKDWORD); in _rtl88e_phy_rf_serial_read()
170 rtl_set_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2, MASKDWORD, in _rtl88e_phy_rf_serial_read()
173 rtl_set_bbreg(hw, pphyreg->rfhssi_para2, MASKDWORD, tmplong2); in _rtl88e_phy_rf_serial_read()
210 rtl_set_bbreg(hw, pphyreg->rf3wire_offset, MASKDWORD, data_and_addr); in _rtl88e_phy_rf_serial_write()
332 rtl_set_bbreg(hw, addr, MASKDWORD, data); in _rtl8188e_config_bb_reg()
449 rtl_set_bbreg(hw, array_table[i], MASKDWORD, in handle_branch2()
474 MASKDWORD, in handle_branch2()
805 MASKDWORD); in rtl88e_phy_get_hw_reg_originalvalue()
1354 rtl_set_bbreg(hw, 0xe30, MASKDWORD, 0x10008c1c); in _rtl88e_phy_path_a_iqk()
1355 rtl_set_bbreg(hw, 0xe34, MASKDWORD, 0x30008c1c); in _rtl88e_phy_path_a_iqk()
1356 rtl_set_bbreg(hw, 0xe38, MASKDWORD, 0x8214032a); in _rtl88e_phy_path_a_iqk()
1357 rtl_set_bbreg(hw, 0xe3c, MASKDWORD, 0x28160000); in _rtl88e_phy_path_a_iqk()
1359 rtl_set_bbreg(hw, 0xe4c, MASKDWORD, 0x00462911); in _rtl88e_phy_path_a_iqk()
1360 rtl_set_bbreg(hw, 0xe48, MASKDWORD, 0xf9000000); in _rtl88e_phy_path_a_iqk()
1361 rtl_set_bbreg(hw, 0xe48, MASKDWORD, 0xf8000000); in _rtl88e_phy_path_a_iqk()
1365 reg_eac = rtl_get_bbreg(hw, 0xeac, MASKDWORD); in _rtl88e_phy_path_a_iqk()
1366 reg_e94 = rtl_get_bbreg(hw, 0xe94, MASKDWORD); in _rtl88e_phy_path_a_iqk()
1367 reg_e9c = rtl_get_bbreg(hw, 0xe9c, MASKDWORD); in _rtl88e_phy_path_a_iqk()
1368 rtl_get_bbreg(hw, 0xea4, MASKDWORD); in _rtl88e_phy_path_a_iqk()
1382 rtl_set_bbreg(hw, 0xe60, MASKDWORD, 0x00000002); in _rtl88e_phy_path_b_iqk()
1383 rtl_set_bbreg(hw, 0xe60, MASKDWORD, 0x00000000); in _rtl88e_phy_path_b_iqk()
1385 reg_eac = rtl_get_bbreg(hw, 0xeac, MASKDWORD); in _rtl88e_phy_path_b_iqk()
1386 reg_eb4 = rtl_get_bbreg(hw, 0xeb4, MASKDWORD); in _rtl88e_phy_path_b_iqk()
1387 reg_ebc = rtl_get_bbreg(hw, 0xebc, MASKDWORD); in _rtl88e_phy_path_b_iqk()
1388 reg_ec4 = rtl_get_bbreg(hw, 0xec4, MASKDWORD); in _rtl88e_phy_path_b_iqk()
1389 reg_ecc = rtl_get_bbreg(hw, 0xecc, MASKDWORD); in _rtl88e_phy_path_b_iqk()
1411 rtl_set_bbreg(hw, RFPGA0_IQK, MASKDWORD, 0x00000000); in _rtl88e_phy_path_a_rx_iqk()
1416 rtl_set_bbreg(hw, RFPGA0_IQK, MASKDWORD, 0x80800000); in _rtl88e_phy_path_a_rx_iqk()
1419 rtl_set_bbreg(hw, RTX_IQK, MASKDWORD, 0x01007c00); in _rtl88e_phy_path_a_rx_iqk()
1420 rtl_set_bbreg(hw, RRX_IQK, MASKDWORD, 0x81004800); in _rtl88e_phy_path_a_rx_iqk()
1423 rtl_set_bbreg(hw, RTX_IQK_TONE_A, MASKDWORD, 0x10008c1c); in _rtl88e_phy_path_a_rx_iqk()
1424 rtl_set_bbreg(hw, RRX_IQK_TONE_A, MASKDWORD, 0x30008c1c); in _rtl88e_phy_path_a_rx_iqk()
1425 rtl_set_bbreg(hw, RTX_IQK_PI_A, MASKDWORD, 0x82160804); in _rtl88e_phy_path_a_rx_iqk()
1426 rtl_set_bbreg(hw, RRX_IQK_PI_A, MASKDWORD, 0x28160000); in _rtl88e_phy_path_a_rx_iqk()
1429 rtl_set_bbreg(hw, RIQK_AGC_RSP, MASKDWORD, 0x0046a911); in _rtl88e_phy_path_a_rx_iqk()
1431 rtl_set_bbreg(hw, RIQK_AGC_PTS, MASKDWORD, 0xf9000000); in _rtl88e_phy_path_a_rx_iqk()
1432 rtl_set_bbreg(hw, RIQK_AGC_PTS, MASKDWORD, 0xf8000000); in _rtl88e_phy_path_a_rx_iqk()
1436 reg_eac = rtl_get_bbreg(hw, RRX_POWER_AFTER_IQK_A_2, MASKDWORD); in _rtl88e_phy_path_a_rx_iqk()
1437 reg_e94 = rtl_get_bbreg(hw, RTX_POWER_BEFORE_IQK_A, MASKDWORD); in _rtl88e_phy_path_a_rx_iqk()
1438 reg_e9c = rtl_get_bbreg(hw, RTX_POWER_AFTER_IQK_A, MASKDWORD); in _rtl88e_phy_path_a_rx_iqk()
1450 rtl_set_bbreg(hw, RTX_IQK, MASKDWORD, u32temp); in _rtl88e_phy_path_a_rx_iqk()
1453 rtl_set_bbreg(hw, RFPGA0_IQK, MASKDWORD, 0x00000000); in _rtl88e_phy_path_a_rx_iqk()
1458 rtl_set_bbreg(hw, RFPGA0_IQK, MASKDWORD, 0x80800000); in _rtl88e_phy_path_a_rx_iqk()
1461 rtl_set_bbreg(hw, RRX_IQK, MASKDWORD, 0x01004800); in _rtl88e_phy_path_a_rx_iqk()
1464 rtl_set_bbreg(hw, RTX_IQK_TONE_A, MASKDWORD, 0x30008c1c); in _rtl88e_phy_path_a_rx_iqk()
1465 rtl_set_bbreg(hw, RRX_IQK_TONE_A, MASKDWORD, 0x10008c1c); in _rtl88e_phy_path_a_rx_iqk()
1466 rtl_set_bbreg(hw, RTX_IQK_PI_A, MASKDWORD, 0x82160c05); in _rtl88e_phy_path_a_rx_iqk()
1467 rtl_set_bbreg(hw, RRX_IQK_PI_A, MASKDWORD, 0x28160c05); in _rtl88e_phy_path_a_rx_iqk()
1470 rtl_set_bbreg(hw, RIQK_AGC_RSP, MASKDWORD, 0x0046a911); in _rtl88e_phy_path_a_rx_iqk()
1472 rtl_set_bbreg(hw, RIQK_AGC_PTS, MASKDWORD, 0xf9000000); in _rtl88e_phy_path_a_rx_iqk()
1473 rtl_set_bbreg(hw, RIQK_AGC_PTS, MASKDWORD, 0xf8000000); in _rtl88e_phy_path_a_rx_iqk()
1477 reg_eac = rtl_get_bbreg(hw, RRX_POWER_AFTER_IQK_A_2, MASKDWORD); in _rtl88e_phy_path_a_rx_iqk()
1478 reg_e94 = rtl_get_bbreg(hw, RTX_POWER_BEFORE_IQK_A, MASKDWORD); in _rtl88e_phy_path_a_rx_iqk()
1479 reg_e9c = rtl_get_bbreg(hw, RTX_POWER_AFTER_IQK_A, MASKDWORD); in _rtl88e_phy_path_a_rx_iqk()
1480 reg_ea4 = rtl_get_bbreg(hw, RRX_POWER_BEFORE_IQK_A_2, MASKDWORD); in _rtl88e_phy_path_a_rx_iqk()
1500 MASKDWORD) >> 22) & 0x3FF; in _rtl88e_phy_path_a_fill_iqk_matrix()
1536 addabackup[i] = rtl_get_bbreg(hw, addareg[i], MASKDWORD); in _rtl88e_phy_save_adda_registers()
1557 rtl_set_bbreg(hw, addareg[i], MASKDWORD, addabackup[i]); in _rtl88e_phy_reload_adda_registers()
1580 rtl_set_bbreg(hw, addareg[0], MASKDWORD, 0x0b1b25a0); in _rtl88e_phy_path_adda_on()
1582 rtl_set_bbreg(hw, addareg[0], MASKDWORD, pathon); in _rtl88e_phy_path_adda_on()
1586 rtl_set_bbreg(hw, addareg[i], MASKDWORD, pathon); in _rtl88e_phy_path_adda_on()
1605 rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0x0); in _rtl88e_phy_path_a_standby()
1606 rtl_set_bbreg(hw, 0x840, MASKDWORD, 0x00010000); in _rtl88e_phy_path_a_standby()
1607 rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0x80800000); in _rtl88e_phy_path_a_standby()
1615 rtl_set_bbreg(hw, 0x820, MASKDWORD, mode); in _rtl88e_phy_pi_mode_switch()
1616 rtl_set_bbreg(hw, 0x828, MASKDWORD, mode); in _rtl88e_phy_pi_mode_switch()
1721 rtl_set_bbreg(hw, 0xc04, MASKDWORD, 0x03a05600); in _rtl88e_phy_iq_calibrate()
1722 rtl_set_bbreg(hw, 0xc08, MASKDWORD, 0x000800e4); in _rtl88e_phy_iq_calibrate()
1723 rtl_set_bbreg(hw, 0x874, MASKDWORD, 0x22204000); in _rtl88e_phy_iq_calibrate()
1731 rtl_set_bbreg(hw, 0x840, MASKDWORD, 0x00010000); in _rtl88e_phy_iq_calibrate()
1732 rtl_set_bbreg(hw, 0x844, MASKDWORD, 0x00010000); in _rtl88e_phy_iq_calibrate()
1736 rtl_set_bbreg(hw, 0xb68, MASKDWORD, 0x0f600000); in _rtl88e_phy_iq_calibrate()
1738 rtl_set_bbreg(hw, 0xb6c, MASKDWORD, 0x0f600000); in _rtl88e_phy_iq_calibrate()
1740 rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0x80800000); in _rtl88e_phy_iq_calibrate()
1741 rtl_set_bbreg(hw, 0xe40, MASKDWORD, 0x01007c00); in _rtl88e_phy_iq_calibrate()
1742 rtl_set_bbreg(hw, 0xe44, MASKDWORD, 0x81004800); in _rtl88e_phy_iq_calibrate()
1748 result[t][0] = (rtl_get_bbreg(hw, 0xe94, MASKDWORD) & in _rtl88e_phy_iq_calibrate()
1750 result[t][1] = (rtl_get_bbreg(hw, 0xe9c, MASKDWORD) & in _rtl88e_phy_iq_calibrate()
1761 result[t][2] = (rtl_get_bbreg(hw, 0xea4, MASKDWORD) & in _rtl88e_phy_iq_calibrate()
1763 result[t][3] = (rtl_get_bbreg(hw, 0xeac, MASKDWORD) & in _rtl88e_phy_iq_calibrate()
1783 MASKDWORD) & in _rtl88e_phy_iq_calibrate()
1786 (rtl_get_bbreg(hw, 0xebc, MASKDWORD) & in _rtl88e_phy_iq_calibrate()
1789 (rtl_get_bbreg(hw, 0xec4, MASKDWORD) & in _rtl88e_phy_iq_calibrate()
1792 (rtl_get_bbreg(hw, 0xecc, MASKDWORD) & in _rtl88e_phy_iq_calibrate()
1798 MASKDWORD) & in _rtl88e_phy_iq_calibrate()
1801 result[t][5] = (rtl_get_bbreg(hw, 0xebc, MASKDWORD) & in _rtl88e_phy_iq_calibrate()
1806 rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0); in _rtl88e_phy_iq_calibrate()
1819 rtl_set_bbreg(hw, 0x840, MASKDWORD, 0x00032ed3); in _rtl88e_phy_iq_calibrate()
1821 rtl_set_bbreg(hw, 0x844, MASKDWORD, 0x00032ed3); in _rtl88e_phy_iq_calibrate()
1822 rtl_set_bbreg(hw, 0xe30, MASKDWORD, 0x01008c00); in _rtl88e_phy_iq_calibrate()
1823 rtl_set_bbreg(hw, 0xe34, MASKDWORD, 0x01008c00); in _rtl88e_phy_iq_calibrate()