Lines Matching refs:rtlpriv
27 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92ce_set_bcn_ctrl_reg() local
32 rtl_write_byte(rtlpriv, REG_BCN_CTRL, (u8)rtlpci->reg_bcn_ctrl_val); in _rtl92ce_set_bcn_ctrl_reg()
37 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92ce_stop_tx_beacon() local
40 tmp1byte = rtl_read_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2); in _rtl92ce_stop_tx_beacon()
41 rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2, tmp1byte & (~BIT(6))); in _rtl92ce_stop_tx_beacon()
42 rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 1, 0x64); in _rtl92ce_stop_tx_beacon()
43 tmp1byte = rtl_read_byte(rtlpriv, REG_TBTT_PROHIBIT + 2); in _rtl92ce_stop_tx_beacon()
45 rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 2, tmp1byte); in _rtl92ce_stop_tx_beacon()
50 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92ce_resume_tx_beacon() local
53 tmp1byte = rtl_read_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2); in _rtl92ce_resume_tx_beacon()
54 rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2, tmp1byte | BIT(6)); in _rtl92ce_resume_tx_beacon()
55 rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 1, 0xff); in _rtl92ce_resume_tx_beacon()
56 tmp1byte = rtl_read_byte(rtlpriv, REG_TBTT_PROHIBIT + 2); in _rtl92ce_resume_tx_beacon()
58 rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 2, tmp1byte); in _rtl92ce_resume_tx_beacon()
73 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ce_get_hw_reg() local
88 rtlpriv->cfg->ops->get_hw_reg(hw, in rtl92ce_get_hw_reg()
94 val_rcr = rtl_read_dword(rtlpriv, REG_RCR); in rtl92ce_get_hw_reg()
111 *ptsf_high = rtl_read_dword(rtlpriv, (REG_TSFTR + 4)); in rtl92ce_get_hw_reg()
112 *ptsf_low = rtl_read_dword(rtlpriv, REG_TSFTR); in rtl92ce_get_hw_reg()
128 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ce_set_hw_reg() local
139 rtl_write_byte(rtlpriv, (REG_MACID + idx), in rtl92ce_set_hw_reg()
150 rtl_write_byte(rtlpriv, REG_RRSR, rate_cfg & 0xff); in rtl92ce_set_hw_reg()
151 rtl_write_byte(rtlpriv, REG_RRSR + 1, in rtl92ce_set_hw_reg()
157 rtl_write_byte(rtlpriv, REG_INIRTS_RATE_SEL, in rtl92ce_set_hw_reg()
163 rtl_write_byte(rtlpriv, (REG_BSSID + idx), in rtl92ce_set_hw_reg()
169 rtl_write_byte(rtlpriv, REG_SIFS_CTX + 1, val[0]); in rtl92ce_set_hw_reg()
170 rtl_write_byte(rtlpriv, REG_SIFS_TRX + 1, val[1]); in rtl92ce_set_hw_reg()
172 rtl_write_byte(rtlpriv, REG_SPEC_SIFS + 1, val[0]); in rtl92ce_set_hw_reg()
173 rtl_write_byte(rtlpriv, REG_MAC_SPEC_SIFS + 1, val[0]); in rtl92ce_set_hw_reg()
176 rtl_write_word(rtlpriv, REG_RESP_SIFS_OFDM, in rtl92ce_set_hw_reg()
179 rtl_write_word(rtlpriv, REG_RESP_SIFS_OFDM, in rtl92ce_set_hw_reg()
186 rtl_dbg(rtlpriv, COMP_MLME, DBG_LOUD, in rtl92ce_set_hw_reg()
189 rtl_write_byte(rtlpriv, REG_SLOT, val[0]); in rtl92ce_set_hw_reg()
192 rtlpriv->cfg->ops->set_hw_reg(hw, in rtl92ce_set_hw_reg()
206 rtl_write_byte(rtlpriv, REG_RRSR + 2, reg_tmp); in rtl92ce_set_hw_reg()
226 rtl_dbg(rtlpriv, COMP_MLME, DBG_LOUD, in rtl92ce_set_hw_reg()
230 rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE, in rtl92ce_set_hw_reg()
241 rtl_dbg(rtlpriv, COMP_MLME, DBG_LOUD, in rtl92ce_set_hw_reg()
245 rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE, in rtl92ce_set_hw_reg()
258 if ((rtlpriv->btcoexist.bt_coexistence) && in rtl92ce_set_hw_reg()
259 (rtlpriv->btcoexist.bt_coexist_type == in rtl92ce_set_hw_reg()
284 rtl_write_byte(rtlpriv, in rtl92ce_set_hw_reg()
290 rtl_dbg(rtlpriv, COMP_MLME, DBG_LOUD, in rtl92ce_set_hw_reg()
302 rtlpriv->cfg->ops->set_hw_reg(hw, in rtl92ce_set_hw_reg()
312 u8 acm_ctrl = rtl_read_byte(rtlpriv, REG_ACMHWCTRL); in rtl92ce_set_hw_reg()
329 rtl_dbg(rtlpriv, COMP_ERR, DBG_WARNING, in rtl92ce_set_hw_reg()
352 rtl_dbg(rtlpriv, COMP_QOS, DBG_TRACE, in rtl92ce_set_hw_reg()
355 rtl_write_byte(rtlpriv, REG_ACMHWCTRL, acm_ctrl); in rtl92ce_set_hw_reg()
359 rtl_write_dword(rtlpriv, REG_RCR, ((u32 *) (val))[0]); in rtl92ce_set_hw_reg()
366 rtl_write_word(rtlpriv, REG_RL, in rtl92ce_set_hw_reg()
372 rtl_write_byte(rtlpriv, REG_DUAL_TSF_RST, (BIT(0) | BIT(1))); in rtl92ce_set_hw_reg()
384 rtl_write_byte(rtlpriv, REG_SECCFG, *val); in rtl92ce_set_hw_reg()
389 rpwm_val = rtl_read_byte(rtlpriv, REG_PCIE_HRPWM); in rtl92ce_set_hw_reg()
393 rtl_write_byte(rtlpriv, REG_PCIE_HRPWM, *val); in rtl92ce_set_hw_reg()
395 rtl_write_byte(rtlpriv, REG_PCIE_HRPWM, in rtl92ce_set_hw_reg()
421 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_AID, in rtl92ce_set_hw_reg()
424 tmp_regcr = rtl_read_byte(rtlpriv, REG_CR + 1); in rtl92ce_set_hw_reg()
425 rtl_write_byte(rtlpriv, REG_CR + 1, in rtl92ce_set_hw_reg()
432 rtl_read_byte(rtlpriv, in rtl92ce_set_hw_reg()
436 rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2, in rtl92ce_set_hw_reg()
445 rtl_write_byte(rtlpriv, in rtl92ce_set_hw_reg()
450 rtl_write_byte(rtlpriv, REG_CR + 1, in rtl92ce_set_hw_reg()
463 u2btmp = rtl_read_word(rtlpriv, REG_BCN_PSR_RPT); in rtl92ce_set_hw_reg()
465 rtl_write_word(rtlpriv, REG_BCN_PSR_RPT, (u2btmp | in rtl92ce_set_hw_reg()
478 rtl_write_dword(rtlpriv, REG_TSFTR, in rtl92ce_set_hw_reg()
480 rtl_write_dword(rtlpriv, REG_TSFTR + 4, in rtl92ce_set_hw_reg()
499 rtlpriv->cfg->ops->set_hw_reg(hw, in rtl92ce_set_hw_reg()
502 rtlpriv->cfg->ops->set_hw_reg(hw, in rtl92ce_set_hw_reg()
506 rtlpriv->cfg->ops->set_hw_reg(hw, in rtl92ce_set_hw_reg()
513 rtlpriv->cfg->ops->set_hw_reg(hw, in rtl92ce_set_hw_reg()
516 rtlpriv->cfg->ops->set_hw_reg(hw, in rtl92ce_set_hw_reg()
520 rtlpriv->cfg->ops->set_hw_reg(hw, in rtl92ce_set_hw_reg()
540 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92ce_llt_write() local
546 rtl_write_dword(rtlpriv, REG_LLT_INIT, value); in _rtl92ce_llt_write()
549 value = rtl_read_dword(rtlpriv, REG_LLT_INIT); in _rtl92ce_llt_write()
566 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92ce_llt_table_init() local
590 rtl_write_byte(rtlpriv, REG_RQPN_NPQ, 0x1c); in _rtl92ce_llt_table_init()
591 rtl_write_dword(rtlpriv, REG_RQPN, 0x80a71c1c); in _rtl92ce_llt_table_init()
593 rtl_write_dword(rtlpriv, REG_RQPN, 0x845B1010); in _rtl92ce_llt_table_init()
595 rtl_write_dword(rtlpriv, REG_RQPN, 0x84838484); in _rtl92ce_llt_table_init()
597 rtl_write_dword(rtlpriv, REG_RQPN, 0x80bd1c1c); in _rtl92ce_llt_table_init()
599 rtl_write_word(rtlpriv, REG_RQPN_NPQ, 0x0000); in _rtl92ce_llt_table_init()
601 rtl_write_dword(rtlpriv, REG_RQPN, 0x80b01c29); in _rtl92ce_llt_table_init()
604 rtl_write_dword(rtlpriv, REG_TRXFF_BNDY, (0x27FF0000 | txpktbuf_bndy)); in _rtl92ce_llt_table_init()
605 rtl_write_byte(rtlpriv, REG_TDECTRL + 1, txpktbuf_bndy); in _rtl92ce_llt_table_init()
607 rtl_write_byte(rtlpriv, REG_TXPKTBUF_BCNQ_BDNY, txpktbuf_bndy); in _rtl92ce_llt_table_init()
608 rtl_write_byte(rtlpriv, REG_TXPKTBUF_MGQ_BDNY, txpktbuf_bndy); in _rtl92ce_llt_table_init()
610 rtl_write_byte(rtlpriv, 0x45D, txpktbuf_bndy); in _rtl92ce_llt_table_init()
611 rtl_write_byte(rtlpriv, REG_PBP, 0x11); in _rtl92ce_llt_table_init()
612 rtl_write_byte(rtlpriv, REG_RX_DRVINFO_SZ, 0x4); in _rtl92ce_llt_table_init()
639 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92ce_gen_refresh_led_state() local
642 struct rtl_led *pled0 = &rtlpriv->ledctl.sw_led0; in _rtl92ce_gen_refresh_led_state()
657 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92ce_init_mac() local
665 rtl_write_byte(rtlpriv, REG_RSV_CTRL, 0x00); in _rtl92ce_init_mac()
666 if (rtlpriv->btcoexist.bt_coexistence) { in _rtl92ce_init_mac()
669 value32 = rtl_read_dword(rtlpriv, REG_APS_FSMCO); in _rtl92ce_init_mac()
671 rtl_write_dword(rtlpriv, REG_APS_FSMCO, value32); in _rtl92ce_init_mac()
673 rtl_write_byte(rtlpriv, REG_SPS0_CTRL, 0x2b); in _rtl92ce_init_mac()
674 rtl_write_byte(rtlpriv, REG_AFE_XTAL_CTRL, 0x0F); in _rtl92ce_init_mac()
676 if (rtlpriv->btcoexist.bt_coexistence) { in _rtl92ce_init_mac()
677 u32 u4b_tmp = rtl_read_dword(rtlpriv, REG_AFE_XTAL_CTRL); in _rtl92ce_init_mac()
680 rtl_write_dword(rtlpriv, REG_AFE_XTAL_CTRL, u4b_tmp); in _rtl92ce_init_mac()
683 bytetmp = rtl_read_byte(rtlpriv, REG_APS_FSMCO + 1) | BIT(0); in _rtl92ce_init_mac()
686 rtl_write_byte(rtlpriv, REG_APS_FSMCO + 1, bytetmp); in _rtl92ce_init_mac()
689 bytetmp = rtl_read_byte(rtlpriv, REG_APS_FSMCO + 1); in _rtl92ce_init_mac()
693 rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD, "reg0xec:%x:%x\n", in _rtl92ce_init_mac()
694 rtl_read_dword(rtlpriv, 0xEC), bytetmp); in _rtl92ce_init_mac()
699 bytetmp = rtl_read_byte(rtlpriv, REG_APS_FSMCO + 1); in _rtl92ce_init_mac()
700 rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD, "reg0xec:%x:%x\n", in _rtl92ce_init_mac()
701 rtl_read_dword(rtlpriv, 0xEC), bytetmp); in _rtl92ce_init_mac()
705 rtl_write_word(rtlpriv, REG_APS_FSMCO, 0x1012); in _rtl92ce_init_mac()
707 rtl_write_byte(rtlpriv, REG_SYS_ISO_CTRL + 1, 0x82); in _rtl92ce_init_mac()
710 if (rtlpriv->btcoexist.bt_coexistence) { in _rtl92ce_init_mac()
711 bytetmp = rtl_read_byte(rtlpriv, REG_AFE_XTAL_CTRL+2) & 0xfd; in _rtl92ce_init_mac()
712 rtl_write_byte(rtlpriv, REG_AFE_XTAL_CTRL+2, bytetmp); in _rtl92ce_init_mac()
715 rtl_write_word(rtlpriv, REG_CR, 0x2ff); in _rtl92ce_init_mac()
720 rtl_write_dword(rtlpriv, REG_HISR, 0xffffffff); in _rtl92ce_init_mac()
721 rtl_write_byte(rtlpriv, REG_HISRE, 0xff); in _rtl92ce_init_mac()
723 rtl_write_word(rtlpriv, REG_TRXFF_BNDY + 2, 0x27ff); in _rtl92ce_init_mac()
725 wordtmp = rtl_read_word(rtlpriv, REG_TRXDMA_CTRL); in _rtl92ce_init_mac()
728 rtl_write_word(rtlpriv, REG_TRXDMA_CTRL, wordtmp); in _rtl92ce_init_mac()
730 rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 1, 0x1F); in _rtl92ce_init_mac()
731 rtl_write_dword(rtlpriv, REG_RCR, rtlpci->receive_config); in _rtl92ce_init_mac()
732 rtl_write_dword(rtlpriv, REG_TCR, rtlpci->transmit_config); in _rtl92ce_init_mac()
734 rtl_write_byte(rtlpriv, 0x4d0, 0x0); in _rtl92ce_init_mac()
736 rtl_write_dword(rtlpriv, REG_BCNQ_DESA, in _rtl92ce_init_mac()
739 rtl_write_dword(rtlpriv, REG_MGQ_DESA, in _rtl92ce_init_mac()
742 rtl_write_dword(rtlpriv, REG_VOQ_DESA, in _rtl92ce_init_mac()
744 rtl_write_dword(rtlpriv, REG_VIQ_DESA, in _rtl92ce_init_mac()
746 rtl_write_dword(rtlpriv, REG_BEQ_DESA, in _rtl92ce_init_mac()
748 rtl_write_dword(rtlpriv, REG_BKQ_DESA, in _rtl92ce_init_mac()
750 rtl_write_dword(rtlpriv, REG_HQ_DESA, in _rtl92ce_init_mac()
753 rtl_write_dword(rtlpriv, REG_RX_DESA, in _rtl92ce_init_mac()
758 rtl_write_byte(rtlpriv, REG_PCIE_CTRL_REG + 3, 0x77); in _rtl92ce_init_mac()
760 rtl_write_byte(rtlpriv, REG_PCIE_CTRL_REG + 3, 0x22); in _rtl92ce_init_mac()
762 rtl_write_dword(rtlpriv, REG_INT_MIG, 0); in _rtl92ce_init_mac()
764 bytetmp = rtl_read_byte(rtlpriv, REG_APSD_CTRL); in _rtl92ce_init_mac()
765 rtl_write_byte(rtlpriv, REG_APSD_CTRL, bytetmp & ~BIT(6)); in _rtl92ce_init_mac()
768 bytetmp = rtl_read_byte(rtlpriv, REG_APSD_CTRL); in _rtl92ce_init_mac()
773 rtl_write_dword(rtlpriv, REG_MCUTST_1, 0x0); in _rtl92ce_init_mac()
781 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92ce_hw_configure() local
788 rtl_write_byte(rtlpriv, REG_INIRTS_RATE_SEL, 0x8); in _rtl92ce_hw_configure()
790 rtl_write_byte(rtlpriv, REG_BWOPMODE, reg_bw_opmode); in _rtl92ce_hw_configure()
792 rtl_write_dword(rtlpriv, REG_RRSR, reg_prsr); in _rtl92ce_hw_configure()
794 rtl_write_byte(rtlpriv, REG_SLOT, 0x09); in _rtl92ce_hw_configure()
796 rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE, 0x0); in _rtl92ce_hw_configure()
798 rtl_write_word(rtlpriv, REG_FWHW_TXQ_CTRL, 0x1F80); in _rtl92ce_hw_configure()
800 rtl_write_word(rtlpriv, REG_RL, 0x0707); in _rtl92ce_hw_configure()
802 rtl_write_dword(rtlpriv, REG_BAR_MODE_CTRL, 0x02012802); in _rtl92ce_hw_configure()
804 rtl_write_byte(rtlpriv, REG_HWSEQ_CTRL, 0xFF); in _rtl92ce_hw_configure()
806 rtl_write_dword(rtlpriv, REG_DARFRC, 0x01000000); in _rtl92ce_hw_configure()
807 rtl_write_dword(rtlpriv, REG_DARFRC + 4, 0x07060504); in _rtl92ce_hw_configure()
808 rtl_write_dword(rtlpriv, REG_RARFRC, 0x01000000); in _rtl92ce_hw_configure()
809 rtl_write_dword(rtlpriv, REG_RARFRC + 4, 0x07060504); in _rtl92ce_hw_configure()
811 if ((rtlpriv->btcoexist.bt_coexistence) && in _rtl92ce_hw_configure()
812 (rtlpriv->btcoexist.bt_coexist_type == BT_CSR_BC4)) in _rtl92ce_hw_configure()
813 rtl_write_dword(rtlpriv, REG_AGGLEN_LMT, 0x97427431); in _rtl92ce_hw_configure()
815 rtl_write_dword(rtlpriv, REG_AGGLEN_LMT, 0xb972a841); in _rtl92ce_hw_configure()
817 rtl_write_byte(rtlpriv, REG_ATIMWND, 0x2); in _rtl92ce_hw_configure()
819 rtl_write_byte(rtlpriv, REG_BCN_MAX_ERR, 0xff); in _rtl92ce_hw_configure()
822 rtl_write_byte(rtlpriv, REG_BCN_CTRL, rtlpci->reg_bcn_ctrl_val); in _rtl92ce_hw_configure()
824 rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 1, 0xff); in _rtl92ce_hw_configure()
826 rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 1, 0xff); in _rtl92ce_hw_configure()
828 rtl_write_byte(rtlpriv, REG_PIFS, 0x1C); in _rtl92ce_hw_configure()
829 rtl_write_byte(rtlpriv, REG_AGGR_BREAK_TIME, 0x16); in _rtl92ce_hw_configure()
831 if ((rtlpriv->btcoexist.bt_coexistence) && in _rtl92ce_hw_configure()
832 (rtlpriv->btcoexist.bt_coexist_type == BT_CSR_BC4)) { in _rtl92ce_hw_configure()
833 rtl_write_word(rtlpriv, REG_NAV_PROT_LEN, 0x0020); in _rtl92ce_hw_configure()
834 rtl_write_word(rtlpriv, REG_PROT_MODE_CTRL, 0x0402); in _rtl92ce_hw_configure()
836 rtl_write_word(rtlpriv, REG_NAV_PROT_LEN, 0x0020); in _rtl92ce_hw_configure()
837 rtl_write_word(rtlpriv, REG_NAV_PROT_LEN, 0x0020); in _rtl92ce_hw_configure()
840 if ((rtlpriv->btcoexist.bt_coexistence) && in _rtl92ce_hw_configure()
841 (rtlpriv->btcoexist.bt_coexist_type == BT_CSR_BC4)) in _rtl92ce_hw_configure()
842 rtl_write_dword(rtlpriv, REG_FAST_EDCA_CTRL, 0x03086666); in _rtl92ce_hw_configure()
844 rtl_write_dword(rtlpriv, REG_FAST_EDCA_CTRL, 0x086666); in _rtl92ce_hw_configure()
846 rtl_write_byte(rtlpriv, REG_ACKTO, 0x40); in _rtl92ce_hw_configure()
848 rtl_write_word(rtlpriv, REG_SPEC_SIFS, 0x1010); in _rtl92ce_hw_configure()
849 rtl_write_word(rtlpriv, REG_MAC_SPEC_SIFS, 0x1010); in _rtl92ce_hw_configure()
851 rtl_write_word(rtlpriv, REG_SIFS_CTX, 0x1010); in _rtl92ce_hw_configure()
853 rtl_write_word(rtlpriv, REG_SIFS_TRX, 0x1010); in _rtl92ce_hw_configure()
855 rtl_write_dword(rtlpriv, REG_MAR, 0xffffffff); in _rtl92ce_hw_configure()
856 rtl_write_dword(rtlpriv, REG_MAR + 4, 0xffffffff); in _rtl92ce_hw_configure()
862 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92ce_enable_aspm_back_door() local
865 rtl_write_byte(rtlpriv, 0x34b, 0x93); in _rtl92ce_enable_aspm_back_door()
866 rtl_write_word(rtlpriv, 0x350, 0x870c); in _rtl92ce_enable_aspm_back_door()
867 rtl_write_byte(rtlpriv, 0x352, 0x1); in _rtl92ce_enable_aspm_back_door()
870 rtl_write_byte(rtlpriv, 0x349, 0x1b); in _rtl92ce_enable_aspm_back_door()
872 rtl_write_byte(rtlpriv, 0x349, 0x03); in _rtl92ce_enable_aspm_back_door()
874 rtl_write_word(rtlpriv, 0x350, 0x2718); in _rtl92ce_enable_aspm_back_door()
875 rtl_write_byte(rtlpriv, 0x352, 0x1); in _rtl92ce_enable_aspm_back_door()
880 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ce_enable_hw_security_config() local
883 rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD, in rtl92ce_enable_hw_security_config()
885 rtlpriv->sec.pairwise_enc_algorithm, in rtl92ce_enable_hw_security_config()
886 rtlpriv->sec.group_enc_algorithm); in rtl92ce_enable_hw_security_config()
888 if (rtlpriv->cfg->mod_params->sw_crypto || rtlpriv->sec.use_sw_sec) { in rtl92ce_enable_hw_security_config()
889 rtl_dbg(rtlpriv, COMP_SEC, DBG_DMESG, in rtl92ce_enable_hw_security_config()
896 if (rtlpriv->sec.use_defaultkey) { in rtl92ce_enable_hw_security_config()
903 rtl_write_byte(rtlpriv, REG_CR + 1, 0x02); in rtl92ce_enable_hw_security_config()
905 rtl_dbg(rtlpriv, COMP_SEC, DBG_LOUD, in rtl92ce_enable_hw_security_config()
908 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_WPA_CONFIG, &sec_reg_value); in rtl92ce_enable_hw_security_config()
914 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ce_hw_init() local
917 struct rtl_phy *rtlphy = &(rtlpriv->phy); in rtl92ce_hw_init()
939 rtlpriv->intf_ops->disable_aspm(hw); in rtl92ce_hw_init()
949 rtl_dbg(rtlpriv, COMP_ERR, DBG_WARNING, in rtl92ce_hw_init()
962 rtlpci->receive_config = rtl_read_dword(rtlpriv, REG_RCR); in rtl92ce_hw_init()
964 rtl_write_dword(rtlpriv, REG_RCR, rtlpci->receive_config); in rtl92ce_hw_init()
993 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_ETHER_ADDR, mac->mac_addr); in rtl92ce_hw_init()
995 rtlpriv->intf_ops->enable_aspm(hw); in rtl92ce_hw_init()
1016 rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, "PA BIAS path A\n"); in rtl92ce_hw_init()
1021 rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, "PA BIAS path B\n"); in rtl92ce_hw_init()
1025 tmp_u1b = rtl_read_byte(rtlpriv, 0x16); in rtl92ce_hw_init()
1027 rtl_write_byte(rtlpriv, 0x16, tmp_u1b | 0x80); in rtl92ce_hw_init()
1029 rtl_write_byte(rtlpriv, 0x16, tmp_u1b | 0x90); in rtl92ce_hw_init()
1030 rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, "under 1.5V\n"); in rtl92ce_hw_init()
1041 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92ce_read_chip_version() local
1042 struct rtl_phy *rtlphy = &(rtlpriv->phy); in _rtl92ce_read_chip_version()
1047 value32 = rtl_read_dword(rtlpriv, REG_SYS_CFG); in _rtl92ce_read_chip_version()
1063 value32 = rtl_read_dword(rtlpriv, REG_HPON_FSM); in _rtl92ce_read_chip_version()
1125 rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD, "Chip RF Type: %s\n", in _rtl92ce_read_chip_version()
1134 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92ce_set_media_status() local
1135 u8 bt_msr = rtl_read_byte(rtlpriv, MSR); in _rtl92ce_set_media_status()
1144 rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, in _rtl92ce_set_media_status()
1149 rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, in _rtl92ce_set_media_status()
1155 rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, in _rtl92ce_set_media_status()
1161 rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, in _rtl92ce_set_media_status()
1166 rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, in _rtl92ce_set_media_status()
1182 rtlpriv->mac80211.link_state < MAC80211_LINKED) { in _rtl92ce_set_media_status()
1193 rtl_dbg(rtlpriv, COMP_ERR, DBG_WARNING, in _rtl92ce_set_media_status()
1197 rtl_write_byte(rtlpriv, MSR, bt_msr | mode); in _rtl92ce_set_media_status()
1199 rtlpriv->cfg->ops->led_control(hw, ledaction); in _rtl92ce_set_media_status()
1201 rtl_write_byte(rtlpriv, REG_BCNTCFG + 1, 0x00); in _rtl92ce_set_media_status()
1203 rtl_write_byte(rtlpriv, REG_BCNTCFG + 1, 0x66); in _rtl92ce_set_media_status()
1209 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ce_set_check_bssid() local
1212 if (rtlpriv->psc.rfpwr_state != ERFON) in rtl92ce_set_check_bssid()
1215 rtlpriv->cfg->ops->get_hw_reg(hw, HW_VAR_RCR, (u8 *)(®_rcr)); in rtl92ce_set_check_bssid()
1219 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RCR, in rtl92ce_set_check_bssid()
1225 rtlpriv->cfg->ops->set_hw_reg(hw, in rtl92ce_set_check_bssid()
1233 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ce_set_network_type() local
1238 if (rtlpriv->mac80211.link_state == MAC80211_LINKED) { in rtl92ce_set_network_type()
1252 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ce_set_qos() local
1257 rtl_write_dword(rtlpriv, REG_EDCA_BK_PARAM, 0xa44f); in rtl92ce_set_qos()
1263 rtl_write_dword(rtlpriv, REG_EDCA_VI_PARAM, 0x5e4322); in rtl92ce_set_qos()
1266 rtl_write_dword(rtlpriv, REG_EDCA_VO_PARAM, 0x2f3222); in rtl92ce_set_qos()
1276 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ce_enable_interrupt() local
1279 rtl_write_dword(rtlpriv, REG_HIMR, rtlpci->irq_mask[0] & 0xFFFFFFFF); in rtl92ce_enable_interrupt()
1280 rtl_write_dword(rtlpriv, REG_HIMRE, rtlpci->irq_mask[1] & 0xFFFFFFFF); in rtl92ce_enable_interrupt()
1286 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ce_disable_interrupt() local
1289 rtl_write_dword(rtlpriv, REG_HIMR, IMR8190_DISABLED); in rtl92ce_disable_interrupt()
1290 rtl_write_dword(rtlpriv, REG_HIMRE, IMR8190_DISABLED); in rtl92ce_disable_interrupt()
1296 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92ce_poweroff_adapter() local
1297 struct rtl_hal *rtlhal = rtl_hal(rtlpriv); in _rtl92ce_poweroff_adapter()
1301 rtlpriv->intf_ops->enable_aspm(hw); in _rtl92ce_poweroff_adapter()
1302 rtl_write_byte(rtlpriv, REG_TXPAUSE, 0xFF); in _rtl92ce_poweroff_adapter()
1304 rtl_write_byte(rtlpriv, REG_RF_CTRL, 0x00); in _rtl92ce_poweroff_adapter()
1305 rtl_write_byte(rtlpriv, REG_APSD_CTRL, 0x40); in _rtl92ce_poweroff_adapter()
1306 rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE2); in _rtl92ce_poweroff_adapter()
1307 rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE0); in _rtl92ce_poweroff_adapter()
1308 if (rtl_read_byte(rtlpriv, REG_MCUFWDL) & BIT(7)) in _rtl92ce_poweroff_adapter()
1310 rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN + 1, 0x51); in _rtl92ce_poweroff_adapter()
1311 rtl_write_byte(rtlpriv, REG_MCUFWDL, 0x00); in _rtl92ce_poweroff_adapter()
1312 rtl_write_dword(rtlpriv, REG_GPIO_PIN_CTRL, 0x00000000); in _rtl92ce_poweroff_adapter()
1313 u1b_tmp = rtl_read_byte(rtlpriv, REG_GPIO_PIN_CTRL); in _rtl92ce_poweroff_adapter()
1314 if ((rtlpriv->btcoexist.bt_coexistence) && in _rtl92ce_poweroff_adapter()
1315 ((rtlpriv->btcoexist.bt_coexist_type == BT_CSR_BC4) || in _rtl92ce_poweroff_adapter()
1316 (rtlpriv->btcoexist.bt_coexist_type == BT_CSR_BC8))) { in _rtl92ce_poweroff_adapter()
1317 rtl_write_dword(rtlpriv, REG_GPIO_PIN_CTRL, 0x00F30000 | in _rtl92ce_poweroff_adapter()
1320 rtl_write_dword(rtlpriv, REG_GPIO_PIN_CTRL, 0x00FF0000 | in _rtl92ce_poweroff_adapter()
1323 rtl_write_word(rtlpriv, REG_GPIO_IO_SEL, 0x0790); in _rtl92ce_poweroff_adapter()
1324 rtl_write_word(rtlpriv, REG_LEDCFG0, 0x8080); in _rtl92ce_poweroff_adapter()
1325 rtl_write_byte(rtlpriv, REG_AFE_PLL_CTRL, 0x80); in _rtl92ce_poweroff_adapter()
1327 rtl_write_byte(rtlpriv, REG_SPS0_CTRL, 0x23); in _rtl92ce_poweroff_adapter()
1328 if (rtlpriv->btcoexist.bt_coexistence) { in _rtl92ce_poweroff_adapter()
1329 u4b_tmp = rtl_read_dword(rtlpriv, REG_AFE_XTAL_CTRL); in _rtl92ce_poweroff_adapter()
1331 rtl_write_dword(rtlpriv, REG_AFE_XTAL_CTRL, u4b_tmp); in _rtl92ce_poweroff_adapter()
1333 rtl_write_dword(rtlpriv, REG_AFE_XTAL_CTRL, 0x0e); in _rtl92ce_poweroff_adapter()
1336 rtl_write_byte(rtlpriv, REG_RSV_CTRL, 0x0e); in _rtl92ce_poweroff_adapter()
1337 rtl_write_byte(rtlpriv, REG_APS_FSMCO + 1, 0x10); in _rtl92ce_poweroff_adapter()
1342 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ce_card_disable() local
1353 rtlpriv->cfg->ops->led_control(hw, LED_CTL_POWER_OFF); in rtl92ce_card_disable()
1358 rtlpriv->phy.iqk_initialized = false; in rtl92ce_card_disable()
1364 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ce_interrupt_recognized() local
1367 intvec->inta = rtl_read_dword(rtlpriv, ISR) & rtlpci->irq_mask[0]; in rtl92ce_interrupt_recognized()
1368 rtl_write_dword(rtlpriv, ISR, intvec->inta); in rtl92ce_interrupt_recognized()
1374 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ce_set_beacon_related_registers() local
1381 rtl_write_word(rtlpriv, REG_ATIMWND, atim_window); in rtl92ce_set_beacon_related_registers()
1382 rtl_write_word(rtlpriv, REG_BCN_INTERVAL, bcn_interval); in rtl92ce_set_beacon_related_registers()
1383 rtl_write_word(rtlpriv, REG_BCNTCFG, 0x660f); in rtl92ce_set_beacon_related_registers()
1384 rtl_write_byte(rtlpriv, REG_RXTSF_OFFSET_CCK, 0x18); in rtl92ce_set_beacon_related_registers()
1385 rtl_write_byte(rtlpriv, REG_RXTSF_OFFSET_OFDM, 0x18); in rtl92ce_set_beacon_related_registers()
1386 rtl_write_byte(rtlpriv, 0x606, 0x30); in rtl92ce_set_beacon_related_registers()
1392 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ce_set_beacon_interval() local
1396 rtl_dbg(rtlpriv, COMP_BEACON, DBG_DMESG, in rtl92ce_set_beacon_interval()
1399 rtl_write_word(rtlpriv, REG_BCN_INTERVAL, bcn_interval); in rtl92ce_set_beacon_interval()
1406 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ce_update_interrupt_mask() local
1409 rtl_dbg(rtlpriv, COMP_INTR, DBG_LOUD, "add_msr:%x, rm_msr:%x\n", in rtl92ce_update_interrupt_mask()
1424 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92ce_read_txpower_info_from_hwpg() local
1463 RTPRINT(rtlpriv, FINIT, INIT_EEPROM, in _rtl92ce_read_txpower_info_from_hwpg()
1470 RTPRINT(rtlpriv, FINIT, INIT_EEPROM, in _rtl92ce_read_txpower_info_from_hwpg()
1477 RTPRINT(rtlpriv, FINIT, INIT_EEPROM, in _rtl92ce_read_txpower_info_from_hwpg()
1511 RTPRINT(rtlpriv, FINIT, INIT_TXPOWER, in _rtl92ce_read_txpower_info_from_hwpg()
1552 RTPRINT(rtlpriv, FINIT, INIT_TXPOWER, in _rtl92ce_read_txpower_info_from_hwpg()
1556 RTPRINT(rtlpriv, FINIT, INIT_TXPOWER, in _rtl92ce_read_txpower_info_from_hwpg()
1597 RTPRINT(rtlpriv, FINIT, INIT_TXPOWER, in _rtl92ce_read_txpower_info_from_hwpg()
1601 RTPRINT(rtlpriv, FINIT, INIT_TXPOWER, in _rtl92ce_read_txpower_info_from_hwpg()
1605 RTPRINT(rtlpriv, FINIT, INIT_TXPOWER, in _rtl92ce_read_txpower_info_from_hwpg()
1609 RTPRINT(rtlpriv, FINIT, INIT_TXPOWER, in _rtl92ce_read_txpower_info_from_hwpg()
1617 RTPRINT(rtlpriv, FINIT, INIT_TXPOWER, in _rtl92ce_read_txpower_info_from_hwpg()
1627 RTPRINT(rtlpriv, FINIT, INIT_TXPOWER, "TSSI_A = 0x%x, TSSI_B = 0x%x\n", in _rtl92ce_read_txpower_info_from_hwpg()
1641 RTPRINT(rtlpriv, FINIT, INIT_TXPOWER, in _rtl92ce_read_txpower_info_from_hwpg()
1647 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92ce_read_adapter_info() local
1660 if (rtl_get_hwinfo(hw, rtlpriv, HWSET_MAX_SIZE, hwinfo, params)) in _rtl92ce_read_adapter_info()
1701 struct rtl_priv *rtlpriv = rtl_priv(hw); in _rtl92ce_hal_customized_behavior() local
1706 rtlpriv->ledctl.led_opendrain = true; in _rtl92ce_hal_customized_behavior()
1717 rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG, in _rtl92ce_hal_customized_behavior()
1723 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ce_read_eeprom_info() local
1725 struct rtl_phy *rtlphy = &(rtlpriv->phy); in rtl92ce_read_eeprom_info()
1731 rtlpriv->dm.rfpath_rxenable[0] = true; in rtl92ce_read_eeprom_info()
1733 rtlpriv->dm.rfpath_rxenable[0] = in rtl92ce_read_eeprom_info()
1734 rtlpriv->dm.rfpath_rxenable[1] = true; in rtl92ce_read_eeprom_info()
1735 rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD, "VersionID = 0x%4x\n", in rtl92ce_read_eeprom_info()
1737 tmp_u1b = rtl_read_byte(rtlpriv, REG_9346CR); in rtl92ce_read_eeprom_info()
1739 rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG, "Boot from EEPROM\n"); in rtl92ce_read_eeprom_info()
1742 rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG, "Boot from EFUSE\n"); in rtl92ce_read_eeprom_info()
1746 rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD, "Autoload OK\n"); in rtl92ce_read_eeprom_info()
1758 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ce_update_hal_rate_table() local
1759 struct rtl_phy *rtlphy = &(rtlpriv->phy); in rtl92ce_update_hal_rate_table()
1814 if ((rtlpriv->btcoexist.bt_coexistence) && in rtl92ce_update_hal_rate_table()
1815 (rtlpriv->btcoexist.bt_coexist_type == BT_CSR_BC4) && in rtl92ce_update_hal_rate_table()
1816 (rtlpriv->btcoexist.bt_cur_state) && in rtl92ce_update_hal_rate_table()
1817 (rtlpriv->btcoexist.bt_ant_isolation) && in rtl92ce_update_hal_rate_table()
1818 ((rtlpriv->btcoexist.bt_service == BT_SCO) || in rtl92ce_update_hal_rate_table()
1819 (rtlpriv->btcoexist.bt_service == BT_BUSY))) in rtl92ce_update_hal_rate_table()
1840 rtl_write_dword(rtlpriv, REG_ARFR0 + ratr_index * 4, ratr_value); in rtl92ce_update_hal_rate_table()
1842 rtl_dbg(rtlpriv, COMP_RATR, DBG_DMESG, "%x\n", in rtl92ce_update_hal_rate_table()
1843 rtl_read_dword(rtlpriv, REG_ARFR0)); in rtl92ce_update_hal_rate_table()
1849 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ce_update_hal_rate_mask() local
1850 struct rtl_phy *rtlphy = &(rtlpriv->phy); in rtl92ce_update_hal_rate_mask()
1965 rtl_dbg(rtlpriv, COMP_RATR, DBG_DMESG, in rtl92ce_update_hal_rate_mask()
1970 rtl_dbg(rtlpriv, COMP_RATR, DBG_DMESG, in rtl92ce_update_hal_rate_mask()
1979 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ce_update_hal_rate_tbl() local
1981 if (rtlpriv->dm.useramask) in rtl92ce_update_hal_rate_tbl()
1989 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ce_update_channel_access_setting() local
1993 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_SLOT_TIME, in rtl92ce_update_channel_access_setting()
1999 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_SIFS, (u8 *)&sifs_timer); in rtl92ce_update_channel_access_setting()
2004 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ce_gpio_radio_on_off_checking() local
2018 spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flag); in rtl92ce_gpio_radio_on_off_checking()
2020 spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flag); in rtl92ce_gpio_radio_on_off_checking()
2024 spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flag); in rtl92ce_gpio_radio_on_off_checking()
2027 rtl_write_byte(rtlpriv, REG_MAC_PINMUX_CFG, rtl_read_byte(rtlpriv, in rtl92ce_gpio_radio_on_off_checking()
2030 u1tmp = rtl_read_byte(rtlpriv, REG_GPIO_IO_SEL); in rtl92ce_gpio_radio_on_off_checking()
2034 rtl_dbg(rtlpriv, COMP_RF, DBG_DMESG, in rtl92ce_gpio_radio_on_off_checking()
2041 rtl_dbg(rtlpriv, COMP_RF, DBG_DMESG, in rtl92ce_gpio_radio_on_off_checking()
2050 spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flag); in rtl92ce_gpio_radio_on_off_checking()
2052 spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flag); in rtl92ce_gpio_radio_on_off_checking()
2057 spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flag); in rtl92ce_gpio_radio_on_off_checking()
2059 spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flag); in rtl92ce_gpio_radio_on_off_checking()
2071 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl92ce_set_key() local
2093 rtl_dbg(rtlpriv, COMP_SEC, DBG_DMESG, "clear_all\n"); in rtl92ce_set_key()
2100 memset(rtlpriv->sec.key_buf[idx], 0, in rtl92ce_set_key()
2102 rtlpriv->sec.key_len[idx] = 0; in rtl92ce_set_key()
2127 if (is_wepkey || rtlpriv->sec.use_defaultkey) { in rtl92ce_set_key()
2152 if (rtlpriv->sec.key_len[key_index] == 0) { in rtl92ce_set_key()
2153 rtl_dbg(rtlpriv, COMP_SEC, DBG_DMESG, in rtl92ce_set_key()
2161 rtl_dbg(rtlpriv, COMP_SEC, DBG_LOUD, in rtl92ce_set_key()
2163 rtlpriv->sec.key_len[PAIRWISE_KEYIDX]); in rtl92ce_set_key()
2164 rtl_dbg(rtlpriv, COMP_SEC, DBG_LOUD, in rtl92ce_set_key()
2166 rtlpriv->sec.key_buf[0][0], in rtl92ce_set_key()
2167 rtlpriv->sec.key_buf[0][1]); in rtl92ce_set_key()
2169 rtl_dbg(rtlpriv, COMP_SEC, DBG_DMESG, in rtl92ce_set_key()
2172 RT_PRINT_DATA(rtlpriv, COMP_SEC, DBG_LOUD, in rtl92ce_set_key()
2174 rtlpriv->sec.pairwise_key, in rtl92ce_set_key()
2175 rtlpriv->sec. in rtl92ce_set_key()
2178 rtl_dbg(rtlpriv, COMP_SEC, DBG_DMESG, in rtl92ce_set_key()
2184 rtlpriv->sec. in rtl92ce_set_key()
2187 rtl_dbg(rtlpriv, COMP_SEC, DBG_DMESG, in rtl92ce_set_key()
2197 rtlpriv->sec.key_buf in rtl92ce_set_key()
2204 rtlpriv->sec.key_buf[entry_id]); in rtl92ce_set_key()
2213 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl8192ce_bt_var_init() local
2215 rtlpriv->btcoexist.bt_coexistence = in rtl8192ce_bt_var_init()
2216 rtlpriv->btcoexist.eeprom_bt_coexist; in rtl8192ce_bt_var_init()
2217 rtlpriv->btcoexist.bt_ant_num = in rtl8192ce_bt_var_init()
2218 rtlpriv->btcoexist.eeprom_bt_ant_num; in rtl8192ce_bt_var_init()
2219 rtlpriv->btcoexist.bt_coexist_type = in rtl8192ce_bt_var_init()
2220 rtlpriv->btcoexist.eeprom_bt_type; in rtl8192ce_bt_var_init()
2222 if (rtlpriv->btcoexist.reg_bt_iso == 2) in rtl8192ce_bt_var_init()
2223 rtlpriv->btcoexist.bt_ant_isolation = in rtl8192ce_bt_var_init()
2224 rtlpriv->btcoexist.eeprom_bt_ant_isol; in rtl8192ce_bt_var_init()
2226 rtlpriv->btcoexist.bt_ant_isolation = in rtl8192ce_bt_var_init()
2227 rtlpriv->btcoexist.reg_bt_iso; in rtl8192ce_bt_var_init()
2229 rtlpriv->btcoexist.bt_radio_shared_type = in rtl8192ce_bt_var_init()
2230 rtlpriv->btcoexist.eeprom_bt_radio_shared; in rtl8192ce_bt_var_init()
2232 if (rtlpriv->btcoexist.bt_coexistence) { in rtl8192ce_bt_var_init()
2233 if (rtlpriv->btcoexist.reg_bt_sco == 1) in rtl8192ce_bt_var_init()
2234 rtlpriv->btcoexist.bt_service = BT_OTHER_ACTION; in rtl8192ce_bt_var_init()
2235 else if (rtlpriv->btcoexist.reg_bt_sco == 2) in rtl8192ce_bt_var_init()
2236 rtlpriv->btcoexist.bt_service = BT_SCO; in rtl8192ce_bt_var_init()
2237 else if (rtlpriv->btcoexist.reg_bt_sco == 4) in rtl8192ce_bt_var_init()
2238 rtlpriv->btcoexist.bt_service = BT_BUSY; in rtl8192ce_bt_var_init()
2239 else if (rtlpriv->btcoexist.reg_bt_sco == 5) in rtl8192ce_bt_var_init()
2240 rtlpriv->btcoexist.bt_service = BT_OTHERBUSY; in rtl8192ce_bt_var_init()
2242 rtlpriv->btcoexist.bt_service = BT_IDLE; in rtl8192ce_bt_var_init()
2244 rtlpriv->btcoexist.bt_edca_ul = 0; in rtl8192ce_bt_var_init()
2245 rtlpriv->btcoexist.bt_edca_dl = 0; in rtl8192ce_bt_var_init()
2246 rtlpriv->btcoexist.bt_rssi_state = 0xff; in rtl8192ce_bt_var_init()
2253 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl8192ce_read_bt_coexist_info_from_hwpg() local
2257 rtlpriv->btcoexist.eeprom_bt_coexist = in rtl8192ce_read_bt_coexist_info_from_hwpg()
2260 rtlpriv->btcoexist.eeprom_bt_type = ((val & 0xe) >> 1); in rtl8192ce_read_bt_coexist_info_from_hwpg()
2261 rtlpriv->btcoexist.eeprom_bt_ant_num = (val & 0x1); in rtl8192ce_read_bt_coexist_info_from_hwpg()
2262 rtlpriv->btcoexist.eeprom_bt_ant_isol = ((val & 0x10) >> 4); in rtl8192ce_read_bt_coexist_info_from_hwpg()
2263 rtlpriv->btcoexist.eeprom_bt_radio_shared = in rtl8192ce_read_bt_coexist_info_from_hwpg()
2266 rtlpriv->btcoexist.eeprom_bt_coexist = 0; in rtl8192ce_read_bt_coexist_info_from_hwpg()
2267 rtlpriv->btcoexist.eeprom_bt_type = BT_2WIRE; in rtl8192ce_read_bt_coexist_info_from_hwpg()
2268 rtlpriv->btcoexist.eeprom_bt_ant_num = ANT_X2; in rtl8192ce_read_bt_coexist_info_from_hwpg()
2269 rtlpriv->btcoexist.eeprom_bt_ant_isol = 0; in rtl8192ce_read_bt_coexist_info_from_hwpg()
2270 rtlpriv->btcoexist.eeprom_bt_radio_shared = BT_RADIO_SHARED; in rtl8192ce_read_bt_coexist_info_from_hwpg()
2278 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl8192ce_bt_reg_init() local
2281 rtlpriv->btcoexist.reg_bt_iso = 2; in rtl8192ce_bt_reg_init()
2283 rtlpriv->btcoexist.reg_bt_sco = 3; in rtl8192ce_bt_reg_init()
2285 rtlpriv->btcoexist.reg_bt_sco = 0; in rtl8192ce_bt_reg_init()
2290 struct rtl_priv *rtlpriv = rtl_priv(hw); in rtl8192ce_bt_hw_init() local
2291 struct rtl_phy *rtlphy = &(rtlpriv->phy); in rtl8192ce_bt_hw_init()
2295 if (rtlpriv->btcoexist.bt_coexistence && in rtl8192ce_bt_hw_init()
2296 ((rtlpriv->btcoexist.bt_coexist_type == BT_CSR_BC4) || in rtl8192ce_bt_hw_init()
2297 rtlpriv->btcoexist.bt_coexist_type == BT_CSR_BC8)) { in rtl8192ce_bt_hw_init()
2299 if (rtlpriv->btcoexist.bt_ant_isolation) in rtl8192ce_bt_hw_init()
2300 rtl_write_byte(rtlpriv, REG_GPIO_MUXCFG, 0xa0); in rtl8192ce_bt_hw_init()
2302 u1_tmp = rtl_read_byte(rtlpriv, 0x4fd) & BIT(0); in rtl8192ce_bt_hw_init()
2304 ((rtlpriv->btcoexist.bt_ant_isolation == 1) ? in rtl8192ce_bt_hw_init()
2306 ((rtlpriv->btcoexist.bt_service == BT_SCO) ? in rtl8192ce_bt_hw_init()
2308 rtl_write_byte(rtlpriv, 0x4fd, u1_tmp); in rtl8192ce_bt_hw_init()
2310 rtl_write_dword(rtlpriv, REG_BT_COEX_TABLE+4, 0xaaaa9aaa); in rtl8192ce_bt_hw_init()
2311 rtl_write_dword(rtlpriv, REG_BT_COEX_TABLE+8, 0xffbd0040); in rtl8192ce_bt_hw_init()
2312 rtl_write_dword(rtlpriv, REG_BT_COEX_TABLE+0xc, 0x40000010); in rtl8192ce_bt_hw_init()
2316 u1_tmp = rtl_read_byte(rtlpriv, ROFDM0_TRXPATHENABLE); in rtl8192ce_bt_hw_init()
2318 rtl_write_byte(rtlpriv, ROFDM0_TRXPATHENABLE, u1_tmp); in rtl8192ce_bt_hw_init()
2320 u1_tmp = rtl_read_byte(rtlpriv, ROFDM1_TRXPATHENABLE); in rtl8192ce_bt_hw_init()
2322 rtl_write_byte(rtlpriv, ROFDM1_TRXPATHENABLE, u1_tmp); in rtl8192ce_bt_hw_init()