Lines Matching refs:wl
597 static int wl127x_prepare_read(struct wl1271 *wl, u32 rx_desc, u32 len) in wl127x_prepare_read() argument
601 if (wl->chip.id != CHIP_ID_128X_PG20) { in wl127x_prepare_read()
602 struct wl1271_acx_mem_map *wl_mem_map = wl->target_mem_map; in wl127x_prepare_read()
603 struct wl12xx_priv *priv = wl->priv; in wl127x_prepare_read()
617 ret = wlcore_write(wl, WL1271_SLV_REG_DATA, priv->rx_mem_addr, in wl127x_prepare_read()
626 static int wl12xx_identify_chip(struct wl1271 *wl) in wl12xx_identify_chip() argument
630 switch (wl->chip.id) { in wl12xx_identify_chip()
633 wl->chip.id); in wl12xx_identify_chip()
635 wl->quirks |= WLCORE_QUIRK_LEGACY_NVS | in wl12xx_identify_chip()
639 wl->sr_fw_name = WL127X_FW_NAME_SINGLE; in wl12xx_identify_chip()
640 wl->mr_fw_name = WL127X_FW_NAME_MULTI; in wl12xx_identify_chip()
641 memcpy(&wl->conf.mem, &wl12xx_default_priv_conf.mem_wl127x, in wl12xx_identify_chip()
642 sizeof(wl->conf.mem)); in wl12xx_identify_chip()
645 wl->ops->prepare_read = wl127x_prepare_read; in wl12xx_identify_chip()
647 wlcore_set_min_fw_ver(wl, WL127X_CHIP_VER, in wl12xx_identify_chip()
656 wl->chip.id); in wl12xx_identify_chip()
658 wl->quirks |= WLCORE_QUIRK_LEGACY_NVS | in wl12xx_identify_chip()
662 wl->plt_fw_name = WL127X_PLT_FW_NAME; in wl12xx_identify_chip()
663 wl->sr_fw_name = WL127X_FW_NAME_SINGLE; in wl12xx_identify_chip()
664 wl->mr_fw_name = WL127X_FW_NAME_MULTI; in wl12xx_identify_chip()
665 memcpy(&wl->conf.mem, &wl12xx_default_priv_conf.mem_wl127x, in wl12xx_identify_chip()
666 sizeof(wl->conf.mem)); in wl12xx_identify_chip()
669 wl->ops->prepare_read = wl127x_prepare_read; in wl12xx_identify_chip()
671 wlcore_set_min_fw_ver(wl, WL127X_CHIP_VER, in wl12xx_identify_chip()
680 wl->chip.id); in wl12xx_identify_chip()
681 wl->plt_fw_name = WL128X_PLT_FW_NAME; in wl12xx_identify_chip()
682 wl->sr_fw_name = WL128X_FW_NAME_SINGLE; in wl12xx_identify_chip()
683 wl->mr_fw_name = WL128X_FW_NAME_MULTI; in wl12xx_identify_chip()
686 wl->quirks |= WLCORE_QUIRK_TX_BLOCKSIZE_ALIGN | in wl12xx_identify_chip()
691 wlcore_set_min_fw_ver(wl, WL128X_CHIP_VER, in wl12xx_identify_chip()
699 wl1271_warning("unsupported chip id: 0x%x", wl->chip.id); in wl12xx_identify_chip()
704 wl->fw_mem_block_size = 256; in wl12xx_identify_chip()
705 wl->fwlog_end = 0x2000000; in wl12xx_identify_chip()
708 wl->scan_templ_id_2_4 = CMD_TEMPL_APP_PROBE_REQ_2_4_LEGACY; in wl12xx_identify_chip()
709 wl->scan_templ_id_5 = CMD_TEMPL_APP_PROBE_REQ_5_LEGACY; in wl12xx_identify_chip()
710 wl->sched_scan_templ_id_2_4 = CMD_TEMPL_CFG_PROBE_REQ_2_4; in wl12xx_identify_chip()
711 wl->sched_scan_templ_id_5 = CMD_TEMPL_CFG_PROBE_REQ_5; in wl12xx_identify_chip()
712 wl->max_channels_5 = WL12XX_MAX_CHANNELS_5GHZ; in wl12xx_identify_chip()
713 wl->ba_rx_session_count_max = WL12XX_RX_BA_MAX_SESSIONS; in wl12xx_identify_chip()
718 static int __must_check wl12xx_top_reg_write(struct wl1271 *wl, int addr, in wl12xx_top_reg_write() argument
725 ret = wlcore_write32(wl, WL12XX_OCP_POR_CTR, addr); in wl12xx_top_reg_write()
730 ret = wlcore_write32(wl, WL12XX_OCP_DATA_WRITE, val); in wl12xx_top_reg_write()
735 ret = wlcore_write32(wl, WL12XX_OCP_CMD, OCP_CMD_WRITE); in wl12xx_top_reg_write()
743 static int __must_check wl12xx_top_reg_read(struct wl1271 *wl, int addr, in wl12xx_top_reg_read() argument
752 ret = wlcore_write32(wl, WL12XX_OCP_POR_CTR, addr); in wl12xx_top_reg_read()
757 ret = wlcore_write32(wl, WL12XX_OCP_CMD, OCP_CMD_READ); in wl12xx_top_reg_read()
763 ret = wlcore_read32(wl, WL12XX_OCP_DATA_READ, &val); in wl12xx_top_reg_read()
785 static int wl128x_switch_tcxo_to_fref(struct wl1271 *wl) in wl128x_switch_tcxo_to_fref() argument
791 ret = wl12xx_top_reg_read(wl, WL_SPARE_REG, &spare_reg); in wl128x_switch_tcxo_to_fref()
798 ret = wl12xx_top_reg_write(wl, WL_SPARE_REG, spare_reg); in wl128x_switch_tcxo_to_fref()
803 ret = wl12xx_top_reg_write(wl, SYS_CLK_CFG_REG, in wl128x_switch_tcxo_to_fref()
814 static bool wl128x_is_tcxo_valid(struct wl1271 *wl) in wl128x_is_tcxo_valid() argument
819 ret = wl12xx_top_reg_read(wl, TCXO_CLK_DETECT_REG, &tcxo_detection); in wl128x_is_tcxo_valid()
829 static bool wl128x_is_fref_valid(struct wl1271 *wl) in wl128x_is_fref_valid() argument
834 ret = wl12xx_top_reg_read(wl, FREF_CLK_DETECT_REG, &fref_detection); in wl128x_is_fref_valid()
844 static int wl128x_manually_configure_mcs_pll(struct wl1271 *wl) in wl128x_manually_configure_mcs_pll() argument
848 ret = wl12xx_top_reg_write(wl, MCS_PLL_M_REG, MCS_PLL_M_REG_VAL); in wl128x_manually_configure_mcs_pll()
852 ret = wl12xx_top_reg_write(wl, MCS_PLL_N_REG, MCS_PLL_N_REG_VAL); in wl128x_manually_configure_mcs_pll()
856 ret = wl12xx_top_reg_write(wl, MCS_PLL_CONFIG_REG, in wl128x_manually_configure_mcs_pll()
863 static int wl128x_configure_mcs_pll(struct wl1271 *wl, int clk) in wl128x_configure_mcs_pll() argument
868 struct wl12xx_priv *priv = wl->priv; in wl128x_configure_mcs_pll()
872 ret = wl12xx_top_reg_read(wl, WL_SPARE_REG, &spare_reg); in wl128x_configure_mcs_pll()
879 ret = wl12xx_top_reg_write(wl, WL_SPARE_REG, spare_reg); in wl128x_configure_mcs_pll()
886 return wl128x_manually_configure_mcs_pll(wl); in wl128x_configure_mcs_pll()
891 ret = wl12xx_top_reg_read(wl, MCS_PLL_CONFIG_REG, &pll_config); in wl128x_configure_mcs_pll()
899 ret = wl12xx_top_reg_write(wl, MCS_PLL_CONFIG_REG, pll_config); in wl128x_configure_mcs_pll()
911 static int wl128x_boot_clk(struct wl1271 *wl, int *selected_clock) in wl128x_boot_clk() argument
913 struct wl12xx_priv *priv = wl->priv; in wl128x_boot_clk()
920 if (!wl128x_switch_tcxo_to_fref(wl)) in wl128x_boot_clk()
926 ret = wl12xx_top_reg_read(wl, SYS_CLK_CFG_REG, &sys_clk_cfg); in wl128x_boot_clk()
938 if (!wl128x_switch_tcxo_to_fref(wl)) in wl128x_boot_clk()
944 if (!wl128x_is_tcxo_valid(wl)) in wl128x_boot_clk()
951 if (!wl128x_is_fref_valid(wl)) in wl128x_boot_clk()
956 return wl128x_configure_mcs_pll(wl, *selected_clock); in wl128x_boot_clk()
959 static int wl127x_boot_clk(struct wl1271 *wl) in wl127x_boot_clk() argument
961 struct wl12xx_priv *priv = wl->priv; in wl127x_boot_clk()
966 if (WL127X_PG_GET_MAJOR(wl->hw_pg_ver) < 3) in wl127x_boot_clk()
967 wl->quirks |= WLCORE_QUIRK_END_OF_TRANSACTION; in wl127x_boot_clk()
985 ret = wl12xx_top_reg_read(wl, OCP_REG_CLK_TYPE, &val); in wl127x_boot_clk()
990 ret = wl12xx_top_reg_write(wl, OCP_REG_CLK_TYPE, val); in wl127x_boot_clk()
995 ret = wl12xx_top_reg_read(wl, OCP_REG_CLK_PULL, &val); in wl127x_boot_clk()
1000 ret = wl12xx_top_reg_write(wl, OCP_REG_CLK_PULL, val); in wl127x_boot_clk()
1006 ret = wl12xx_top_reg_read(wl, OCP_REG_CLK_POLARITY, &val); in wl127x_boot_clk()
1012 ret = wl12xx_top_reg_write(wl, OCP_REG_CLK_POLARITY, val); in wl127x_boot_clk()
1017 ret = wlcore_write32(wl, WL12XX_PLL_PARAMETERS, clk); in wl127x_boot_clk()
1021 ret = wlcore_read32(wl, WL12XX_PLL_PARAMETERS, &pause); in wl127x_boot_clk()
1029 ret = wlcore_write32(wl, WL12XX_WU_COUNTER_PAUSE, pause); in wl127x_boot_clk()
1035 static int wl1271_boot_soft_reset(struct wl1271 *wl) in wl1271_boot_soft_reset() argument
1042 ret = wlcore_write32(wl, WL12XX_SLV_SOFT_RESET, ACX_SLV_SOFT_RESET_BIT); in wl1271_boot_soft_reset()
1049 ret = wlcore_read32(wl, WL12XX_SLV_SOFT_RESET, &boot_data); in wl1271_boot_soft_reset()
1068 ret = wlcore_write32(wl, WL12XX_ENABLE, 0x0); in wl1271_boot_soft_reset()
1073 ret = wlcore_write32(wl, WL12XX_SPARE_A2, 0xffff); in wl1271_boot_soft_reset()
1079 static int wl12xx_pre_boot(struct wl1271 *wl) in wl12xx_pre_boot() argument
1081 struct wl12xx_priv *priv = wl->priv; in wl12xx_pre_boot()
1086 if (wl->chip.id == CHIP_ID_128X_PG20) { in wl12xx_pre_boot()
1087 ret = wl128x_boot_clk(wl, &selected_clock); in wl12xx_pre_boot()
1091 ret = wl127x_boot_clk(wl); in wl12xx_pre_boot()
1097 ret = wlcore_write32(wl, WL12XX_WELP_ARM_COMMAND, WELP_ARM_COMMAND_VAL); in wl12xx_pre_boot()
1103 ret = wlcore_set_partition(wl, &wl->ptable[PART_DRPW]); in wl12xx_pre_boot()
1111 ret = wlcore_read32(wl, WL12XX_DRPW_SCRATCH_START, &clk); in wl12xx_pre_boot()
1117 if (wl->chip.id == CHIP_ID_128X_PG20) in wl12xx_pre_boot()
1122 ret = wlcore_write32(wl, WL12XX_DRPW_SCRATCH_START, clk); in wl12xx_pre_boot()
1126 ret = wlcore_set_partition(wl, &wl->ptable[PART_WORK]); in wl12xx_pre_boot()
1131 ret = wlcore_write_reg(wl, REG_INTERRUPT_MASK, WL1271_ACX_INTR_ALL); in wl12xx_pre_boot()
1135 ret = wl1271_boot_soft_reset(wl); in wl12xx_pre_boot()
1143 static int wl12xx_pre_upload(struct wl1271 *wl) in wl12xx_pre_upload() argument
1153 ret = wlcore_write32(wl, WL12XX_EEPROMLESS_IND, WL12XX_EEPROMLESS_IND); in wl12xx_pre_upload()
1157 ret = wlcore_read_reg(wl, REG_CHIP_ID_B, &tmp); in wl12xx_pre_upload()
1164 ret = wlcore_read32(wl, WL12XX_SCR_PAD2, &tmp); in wl12xx_pre_upload()
1171 if (wl->chip.id == CHIP_ID_128X_PG20) { in wl12xx_pre_upload()
1172 ret = wl12xx_top_reg_write(wl, SDIO_IO_DS, HCI_IO_DS_6MA); in wl12xx_pre_upload()
1178 ret = wl12xx_top_reg_read(wl, OCP_REG_POLARITY, &polarity); in wl12xx_pre_upload()
1184 ret = wl12xx_top_reg_write(wl, OCP_REG_POLARITY, polarity); in wl12xx_pre_upload()
1190 static int wl12xx_enable_interrupts(struct wl1271 *wl) in wl12xx_enable_interrupts() argument
1194 ret = wlcore_write_reg(wl, REG_INTERRUPT_MASK, in wl12xx_enable_interrupts()
1199 wlcore_enable_interrupts(wl); in wl12xx_enable_interrupts()
1200 ret = wlcore_write_reg(wl, REG_INTERRUPT_MASK, in wl12xx_enable_interrupts()
1205 ret = wlcore_write32(wl, WL12XX_HI_CFG, HI_CFG_DEF_VAL); in wl12xx_enable_interrupts()
1212 wlcore_disable_interrupts(wl); in wl12xx_enable_interrupts()
1218 static int wl12xx_boot(struct wl1271 *wl) in wl12xx_boot() argument
1222 ret = wl12xx_pre_boot(wl); in wl12xx_boot()
1226 ret = wlcore_boot_upload_nvs(wl); in wl12xx_boot()
1230 ret = wl12xx_pre_upload(wl); in wl12xx_boot()
1234 ret = wlcore_boot_upload_firmware(wl); in wl12xx_boot()
1238 wl->event_mask = BSS_LOSE_EVENT_ID | in wl12xx_boot()
1254 wl->ap_event_mask = MAX_TX_RETRY_EVENT_ID; in wl12xx_boot()
1256 ret = wlcore_boot_run_firmware(wl); in wl12xx_boot()
1260 ret = wl12xx_enable_interrupts(wl); in wl12xx_boot()
1266 static int wl12xx_trigger_cmd(struct wl1271 *wl, int cmd_box_addr, in wl12xx_trigger_cmd() argument
1271 ret = wlcore_write(wl, cmd_box_addr, buf, len, false); in wl12xx_trigger_cmd()
1275 ret = wlcore_write_reg(wl, REG_INTERRUPT_TRIG, WL12XX_INTR_TRIG_CMD); in wl12xx_trigger_cmd()
1280 static int wl12xx_ack_event(struct wl1271 *wl) in wl12xx_ack_event() argument
1282 return wlcore_write_reg(wl, REG_INTERRUPT_TRIG, in wl12xx_ack_event()
1286 static u32 wl12xx_calc_tx_blocks(struct wl1271 *wl, u32 len, u32 spare_blks) in wl12xx_calc_tx_blocks() argument
1289 u32 align_len = wlcore_calc_packet_alignment(wl, len); in wl12xx_calc_tx_blocks()
1295 wl12xx_set_tx_desc_blocks(struct wl1271 *wl, struct wl1271_tx_hw_descr *desc, in wl12xx_set_tx_desc_blocks() argument
1298 if (wl->chip.id == CHIP_ID_128X_PG20) { in wl12xx_set_tx_desc_blocks()
1307 wl12xx_set_tx_desc_data_len(struct wl1271 *wl, struct wl1271_tx_hw_descr *desc, in wl12xx_set_tx_desc_data_len() argument
1310 u32 aligned_len = wlcore_calc_packet_alignment(wl, skb->len); in wl12xx_set_tx_desc_data_len()
1312 if (wl->chip.id == CHIP_ID_128X_PG20) { in wl12xx_set_tx_desc_data_len()
1342 wl12xx_get_rx_buf_align(struct wl1271 *wl, u32 rx_desc) in wl12xx_get_rx_buf_align() argument
1350 static u32 wl12xx_get_rx_packet_len(struct wl1271 *wl, void *rx_data, in wl12xx_get_rx_packet_len() argument
1363 static int wl12xx_tx_delayed_compl(struct wl1271 *wl) in wl12xx_tx_delayed_compl() argument
1365 if (wl->fw_status->tx_results_counter == in wl12xx_tx_delayed_compl()
1366 (wl->tx_results_count & 0xff)) in wl12xx_tx_delayed_compl()
1369 return wlcore_tx_complete(wl); in wl12xx_tx_delayed_compl()
1372 static int wl12xx_hw_init(struct wl1271 *wl) in wl12xx_hw_init() argument
1376 if (wl->chip.id == CHIP_ID_128X_PG20) { in wl12xx_hw_init()
1379 ret = wl128x_cmd_general_parms(wl); in wl12xx_hw_init()
1387 if (wl->plt_mode == PLT_FEM_DETECT) in wl12xx_hw_init()
1390 ret = wl128x_cmd_radio_parms(wl); in wl12xx_hw_init()
1394 if (wl->quirks & WLCORE_QUIRK_TX_BLOCKSIZE_ALIGN) in wl12xx_hw_init()
1399 ret = wl1271_acx_host_if_cfg_bitmap(wl, host_cfg_bitmap); in wl12xx_hw_init()
1403 ret = wl1271_cmd_general_parms(wl); in wl12xx_hw_init()
1411 if (wl->plt_mode == PLT_FEM_DETECT) in wl12xx_hw_init()
1414 ret = wl1271_cmd_radio_parms(wl); in wl12xx_hw_init()
1417 ret = wl1271_cmd_ext_radio_parms(wl); in wl12xx_hw_init()
1425 static void wl12xx_convert_fw_status(struct wl1271 *wl, void *raw_fw_status, in wl12xx_convert_fw_status() argument
1456 static u32 wl12xx_sta_get_ap_rate_mask(struct wl1271 *wl, in wl12xx_sta_get_ap_rate_mask() argument
1462 static void wl12xx_conf_init(struct wl1271 *wl) in wl12xx_conf_init() argument
1464 struct wl12xx_priv *priv = wl->priv; in wl12xx_conf_init()
1467 memcpy(&wl->conf, &wl12xx_conf, sizeof(wl12xx_conf)); in wl12xx_conf_init()
1473 static bool wl12xx_mac_in_fuse(struct wl1271 *wl) in wl12xx_mac_in_fuse() argument
1478 if (wl->chip.id == CHIP_ID_128X_PG20) { in wl12xx_mac_in_fuse()
1479 major = WL128X_PG_GET_MAJOR(wl->hw_pg_ver); in wl12xx_mac_in_fuse()
1480 minor = WL128X_PG_GET_MINOR(wl->hw_pg_ver); in wl12xx_mac_in_fuse()
1486 major = WL127X_PG_GET_MAJOR(wl->hw_pg_ver); in wl12xx_mac_in_fuse()
1487 minor = WL127X_PG_GET_MINOR(wl->hw_pg_ver); in wl12xx_mac_in_fuse()
1501 static int wl12xx_get_fuse_mac(struct wl1271 *wl) in wl12xx_get_fuse_mac() argument
1507 ret = wlcore_write32(wl, WL12XX_WELP_ARM_COMMAND, WELP_ARM_COMMAND_VAL); in wl12xx_get_fuse_mac()
1513 ret = wlcore_set_partition(wl, &wl->ptable[PART_DRPW]); in wl12xx_get_fuse_mac()
1517 ret = wlcore_read32(wl, WL12XX_REG_FUSE_BD_ADDR_1, &mac1); in wl12xx_get_fuse_mac()
1521 ret = wlcore_read32(wl, WL12XX_REG_FUSE_BD_ADDR_2, &mac2); in wl12xx_get_fuse_mac()
1526 wl->fuse_oui_addr = ((mac2 & 0xffff) << 8) + in wl12xx_get_fuse_mac()
1528 wl->fuse_nic_addr = mac1 & 0xffffff; in wl12xx_get_fuse_mac()
1530 ret = wlcore_set_partition(wl, &wl->ptable[PART_DOWN]); in wl12xx_get_fuse_mac()
1536 static int wl12xx_get_pg_ver(struct wl1271 *wl, s8 *ver) in wl12xx_get_pg_ver() argument
1541 if (wl->chip.id == CHIP_ID_128X_PG20) in wl12xx_get_pg_ver()
1542 ret = wl12xx_top_reg_read(wl, WL128X_REG_FUSE_DATA_2_1, in wl12xx_get_pg_ver()
1545 ret = wl12xx_top_reg_read(wl, WL127X_REG_FUSE_DATA_2_1, in wl12xx_get_pg_ver()
1554 static int wl12xx_get_mac(struct wl1271 *wl) in wl12xx_get_mac() argument
1556 if (wl12xx_mac_in_fuse(wl)) in wl12xx_get_mac()
1557 return wl12xx_get_fuse_mac(wl); in wl12xx_get_mac()
1562 static void wl12xx_set_tx_desc_csum(struct wl1271 *wl, in wl12xx_set_tx_desc_csum() argument
1569 static int wl12xx_plt_init(struct wl1271 *wl) in wl12xx_plt_init() argument
1573 ret = wl->ops->boot(wl); in wl12xx_plt_init()
1577 ret = wl->ops->hw_init(wl); in wl12xx_plt_init()
1585 if (wl->plt_mode == PLT_FEM_DETECT) in wl12xx_plt_init()
1588 ret = wl1271_acx_init_mem_config(wl); in wl12xx_plt_init()
1592 ret = wl12xx_acx_mem_cfg(wl); in wl12xx_plt_init()
1597 ret = wl1271_cmd_data_path(wl, 1); in wl12xx_plt_init()
1602 ret = wl1271_acx_sleep_auth(wl, WL1271_PSM_CAM); in wl12xx_plt_init()
1607 ret = wl1271_acx_pm_config(wl); in wl12xx_plt_init()
1614 kfree(wl->target_mem_map); in wl12xx_plt_init()
1615 wl->target_mem_map = NULL; in wl12xx_plt_init()
1618 mutex_unlock(&wl->mutex); in wl12xx_plt_init()
1626 wlcore_disable_interrupts(wl); in wl12xx_plt_init()
1627 mutex_lock(&wl->mutex); in wl12xx_plt_init()
1632 static int wl12xx_get_spare_blocks(struct wl1271 *wl, bool is_gem) in wl12xx_get_spare_blocks() argument
1640 static int wl12xx_set_key(struct wl1271 *wl, enum set_key_cmd cmd, in wl12xx_set_key() argument
1645 return wlcore_set_key(wl, cmd, vif, sta, key_conf); in wl12xx_set_key()
1648 static int wl12xx_set_peer_cap(struct wl1271 *wl, in wl12xx_set_peer_cap() argument
1653 return wl1271_acx_set_ht_capabilities(wl, ht_cap, allow_ht_operation, in wl12xx_set_peer_cap()
1657 static bool wl12xx_lnk_high_prio(struct wl1271 *wl, u8 hlid, in wl12xx_lnk_high_prio() argument
1662 if (test_bit(hlid, &wl->fw_fast_lnk_map)) in wl12xx_lnk_high_prio()
1663 thold = wl->conf.tx.fast_link_thold; in wl12xx_lnk_high_prio()
1665 thold = wl->conf.tx.slow_link_thold; in wl12xx_lnk_high_prio()
1670 static bool wl12xx_lnk_low_prio(struct wl1271 *wl, u8 hlid, in wl12xx_lnk_low_prio() argument
1677 static u32 wl12xx_convert_hwaddr(struct wl1271 *wl, u32 hwaddr) in wl12xx_convert_hwaddr() argument
1682 static int wl12xx_setup(struct wl1271 *wl);
1797 static int wl12xx_setup(struct wl1271 *wl) in wl12xx_setup() argument
1799 struct wl12xx_priv *priv = wl->priv; in wl12xx_setup()
1800 struct wlcore_platdev_data *pdev_data = dev_get_platdata(&wl->pdev->dev); in wl12xx_setup()
1806 wl->rtable = wl12xx_rtable; in wl12xx_setup()
1807 wl->num_tx_desc = WL12XX_NUM_TX_DESCRIPTORS; in wl12xx_setup()
1808 wl->num_rx_desc = WL12XX_NUM_RX_DESCRIPTORS; in wl12xx_setup()
1809 wl->num_links = WL12XX_MAX_LINKS; in wl12xx_setup()
1810 wl->max_ap_stations = WL12XX_MAX_AP_STATIONS; in wl12xx_setup()
1811 wl->iface_combinations = wl12xx_iface_combinations; in wl12xx_setup()
1812 wl->n_iface_combinations = ARRAY_SIZE(wl12xx_iface_combinations); in wl12xx_setup()
1813 wl->num_mac_addr = WL12XX_NUM_MAC_ADDRESSES; in wl12xx_setup()
1814 wl->band_rate_to_idx = wl12xx_band_rate_to_idx; in wl12xx_setup()
1815 wl->hw_tx_rate_tbl_size = WL12XX_CONF_HW_RXTX_RATE_MAX; in wl12xx_setup()
1816 wl->hw_min_ht_rate = WL12XX_CONF_HW_RXTX_RATE_MCS0; in wl12xx_setup()
1817 wl->fw_status_len = sizeof(struct wl12xx_fw_status); in wl12xx_setup()
1818 wl->fw_status_priv_len = 0; in wl12xx_setup()
1819 wl->stats.fw_stats_len = sizeof(struct wl12xx_acx_statistics); in wl12xx_setup()
1820 wl->ofdm_only_ap = true; in wl12xx_setup()
1821 wlcore_set_ht_cap(wl, NL80211_BAND_2GHZ, &wl12xx_ht_cap); in wl12xx_setup()
1822 wlcore_set_ht_cap(wl, NL80211_BAND_5GHZ, &wl12xx_ht_cap); in wl12xx_setup()
1823 wl12xx_conf_init(wl); in wl12xx_setup()
1894 struct wl1271 *wl; in wl12xx_probe() local
1907 wl = hw->priv; in wl12xx_probe()
1908 wl->ops = &wl12xx_ops; in wl12xx_probe()
1909 wl->ptable = wl12xx_ptable; in wl12xx_probe()
1910 ret = wlcore_probe(wl, pdev); in wl12xx_probe()
1917 wlcore_free_hw(wl); in wl12xx_probe()
1924 struct wl1271 *wl = platform_get_drvdata(pdev); in wl12xx_remove() local
1927 priv = wl->priv; in wl12xx_remove()