Lines Matching refs:value
37 u32 value, ul_intr_enable, dl_intr_enable; in t7xx_dpmaif_init_intr() local
50 value, (value & ul_intr_enable) != ul_intr_enable, 0, in t7xx_dpmaif_init_intr()
65 value, (value & ul_intr_enable) != ul_intr_enable, 0, in t7xx_dpmaif_init_intr()
74 value = ioread32(hw_info->pcie_base + DPMAIF_AO_UL_AP_L1TIMR0); in t7xx_dpmaif_init_intr()
75 value |= DPMAIF_DL_INT_Q2APTOP | DPMAIF_DL_INT_Q2TOQ1; in t7xx_dpmaif_init_intr()
76 iowrite32(value, hw_info->pcie_base + DPMAIF_AO_UL_AP_L1TIMR0); in t7xx_dpmaif_init_intr()
85 u32 value, ul_int_que_done; in t7xx_dpmaif_mask_ulq_intr() local
94 value, (value & ul_int_que_done) == ul_int_que_done, 0, in t7xx_dpmaif_mask_ulq_intr()
99 value); in t7xx_dpmaif_mask_ulq_intr()
105 u32 value, ul_int_que_done; in t7xx_dpmaif_unmask_ulq_intr() local
114 value, (value & ul_int_que_done) != ul_int_que_done, 0, in t7xx_dpmaif_unmask_ulq_intr()
119 value); in t7xx_dpmaif_unmask_ulq_intr()
136 u32 value; in t7xx_update_dlq_intr() local
138 value = ioread32(hw_info->pcie_base + DPMAIF_AO_UL_AP_L2TIMR0); in t7xx_update_dlq_intr()
140 return value; in t7xx_update_dlq_intr()
145 u32 value, q_done; in t7xx_mask_dlq_intr() local
151 ret = read_poll_timeout_atomic(t7xx_update_dlq_intr, value, value & q_done, in t7xx_mask_dlq_intr()
156 value); in t7xx_mask_dlq_intr()
228 unsigned long value; in t7xx_dpmaif_hw_check_tx_intr() local
230 value = FIELD_GET(DP_UL_INT_QDONE_MSK, intr_status); in t7xx_dpmaif_hw_check_tx_intr()
231 if (value) { in t7xx_dpmaif_hw_check_tx_intr()
234 t7xx_dpmaif_set_intr_para(para, DPF_INTR_UL_DONE, value); in t7xx_dpmaif_hw_check_tx_intr()
236 for_each_set_bit(index, &value, DPMAIF_TXQ_NUM) in t7xx_dpmaif_hw_check_tx_intr()
240 value = FIELD_GET(DP_UL_INT_EMPTY_MSK, intr_status); in t7xx_dpmaif_hw_check_tx_intr()
241 if (value) in t7xx_dpmaif_hw_check_tx_intr()
242 t7xx_dpmaif_set_intr_para(para, DPF_INTR_UL_DRB_EMPTY, value); in t7xx_dpmaif_hw_check_tx_intr()
244 value = FIELD_GET(DP_UL_INT_MD_NOTREADY_MSK, intr_status); in t7xx_dpmaif_hw_check_tx_intr()
245 if (value) in t7xx_dpmaif_hw_check_tx_intr()
246 t7xx_dpmaif_set_intr_para(para, DPF_INTR_UL_MD_NOTREADY, value); in t7xx_dpmaif_hw_check_tx_intr()
248 value = FIELD_GET(DP_UL_INT_MD_PWR_NOTREADY_MSK, intr_status); in t7xx_dpmaif_hw_check_tx_intr()
249 if (value) in t7xx_dpmaif_hw_check_tx_intr()
250 t7xx_dpmaif_set_intr_para(para, DPF_INTR_UL_MD_PWR_NOTREADY, value); in t7xx_dpmaif_hw_check_tx_intr()
252 value = FIELD_GET(DP_UL_INT_ERR_MSK, intr_status); in t7xx_dpmaif_hw_check_tx_intr()
253 if (value) in t7xx_dpmaif_hw_check_tx_intr()
254 t7xx_dpmaif_set_intr_para(para, DPF_INTR_UL_LEN_ERR, value); in t7xx_dpmaif_hw_check_tx_intr()
396 u32 value; in t7xx_dpmaif_sram_init() local
398 value = ioread32(hw_info->pcie_base + DPMAIF_AP_MEM_CLR); in t7xx_dpmaif_sram_init()
399 value |= DPMAIF_MEM_CLR; in t7xx_dpmaif_sram_init()
400 iowrite32(value, hw_info->pcie_base + DPMAIF_AP_MEM_CLR); in t7xx_dpmaif_sram_init()
403 value, !(value & DPMAIF_MEM_CLR), 0, in t7xx_dpmaif_sram_init()
459 unsigned int value; in t7xx_dpmaif_hw_hpc_cntl_set() local
461 value = DPMAIF_HPC_DLQ_PATH_MODE | DPMAIF_HPC_ADD_MODE_DF << 2; in t7xx_dpmaif_hw_hpc_cntl_set()
462 value |= DPMAIF_HASH_PRIME_DF << 4; in t7xx_dpmaif_hw_hpc_cntl_set()
463 value |= DPMAIF_HPC_TOTAL_NUM << 8; in t7xx_dpmaif_hw_hpc_cntl_set()
464 iowrite32(value, hw_info->pcie_base + DPMAIF_AO_DL_HPC_CNTL); in t7xx_dpmaif_hw_hpc_cntl_set()
469 unsigned int value; in t7xx_dpmaif_hw_agg_cfg_set() local
471 value = DPMAIF_AGG_MAX_LEN_DF | DPMAIF_AGG_TBL_ENT_NUM_DF << 16; in t7xx_dpmaif_hw_agg_cfg_set()
472 iowrite32(value, hw_info->pcie_base + DPMAIF_AO_DL_DLQ_AGG_CFG); in t7xx_dpmaif_hw_agg_cfg_set()
488 unsigned int value, i; in t7xx_dpmaif_hw_dlq_timeout_thres_set() local
492 value = FIELD_PREP(DPMAIF_DLQ_LOW_TIMEOUT_THRES_MKS, DPMAIF_DLQ_TIMEOUT_THRES_DF); in t7xx_dpmaif_hw_dlq_timeout_thres_set()
493 value |= FIELD_PREP(DPMAIF_DLQ_HIGH_TIMEOUT_THRES_MSK, in t7xx_dpmaif_hw_dlq_timeout_thres_set()
495 iowrite32(value, in t7xx_dpmaif_hw_dlq_timeout_thres_set()
517 u32 value, dl_bat_init = 0; in t7xx_dpmaif_dl_bat_init_done() local
527 value, !(value & DPMAIF_DL_BAT_INIT_NOT_READY), 0, in t7xx_dpmaif_dl_bat_init_done()
537 value, !(value & DPMAIF_DL_BAT_INIT_NOT_READY), 0, in t7xx_dpmaif_dl_bat_init_done()
554 unsigned int value; in t7xx_dpmaif_dl_set_bat_size() local
556 value = ioread32(hw_info->pcie_base + DPMAIF_DL_BAT_INIT_CON1); in t7xx_dpmaif_dl_set_bat_size()
557 value &= ~DPMAIF_BAT_SIZE_MSK; in t7xx_dpmaif_dl_set_bat_size()
558 value |= size & DPMAIF_BAT_SIZE_MSK; in t7xx_dpmaif_dl_set_bat_size()
559 iowrite32(value, hw_info->pcie_base + DPMAIF_DL_BAT_INIT_CON1); in t7xx_dpmaif_dl_set_bat_size()
564 unsigned int value; in t7xx_dpmaif_dl_bat_en() local
566 value = ioread32(hw_info->pcie_base + DPMAIF_DL_BAT_INIT_CON1); in t7xx_dpmaif_dl_bat_en()
569 value |= DPMAIF_BAT_EN_MSK; in t7xx_dpmaif_dl_bat_en()
571 value &= ~DPMAIF_BAT_EN_MSK; in t7xx_dpmaif_dl_bat_en()
573 iowrite32(value, hw_info->pcie_base + DPMAIF_DL_BAT_INIT_CON1); in t7xx_dpmaif_dl_bat_en()
578 unsigned int value; in t7xx_dpmaif_dl_set_ao_bid_maxcnt() local
580 value = ioread32(hw_info->pcie_base + DPMAIF_AO_DL_PKTINFO_CON0); in t7xx_dpmaif_dl_set_ao_bid_maxcnt()
581 value &= ~DPMAIF_BAT_BID_MAXCNT_MSK; in t7xx_dpmaif_dl_set_ao_bid_maxcnt()
582 value |= FIELD_PREP(DPMAIF_BAT_BID_MAXCNT_MSK, DPMAIF_HW_PKT_BIDCNT); in t7xx_dpmaif_dl_set_ao_bid_maxcnt()
583 iowrite32(value, hw_info->pcie_base + DPMAIF_AO_DL_PKTINFO_CON0); in t7xx_dpmaif_dl_set_ao_bid_maxcnt()
593 unsigned int value; in t7xx_dpmaif_dl_set_ao_pit_chknum() local
595 value = ioread32(hw_info->pcie_base + DPMAIF_AO_DL_PKTINFO_CON2); in t7xx_dpmaif_dl_set_ao_pit_chknum()
596 value &= ~DPMAIF_PIT_CHK_NUM_MSK; in t7xx_dpmaif_dl_set_ao_pit_chknum()
597 value |= FIELD_PREP(DPMAIF_PIT_CHK_NUM_MSK, DPMAIF_HW_CHK_PIT_NUM); in t7xx_dpmaif_dl_set_ao_pit_chknum()
598 iowrite32(value, hw_info->pcie_base + DPMAIF_AO_DL_PKTINFO_CON2); in t7xx_dpmaif_dl_set_ao_pit_chknum()
603 unsigned int value; in t7xx_dpmaif_dl_set_ao_remain_minsz() local
605 value = ioread32(hw_info->pcie_base + DPMAIF_AO_DL_PKTINFO_CON0); in t7xx_dpmaif_dl_set_ao_remain_minsz()
606 value &= ~DPMAIF_BAT_REMAIN_MINSZ_MSK; in t7xx_dpmaif_dl_set_ao_remain_minsz()
607 value |= FIELD_PREP(DPMAIF_BAT_REMAIN_MINSZ_MSK, in t7xx_dpmaif_dl_set_ao_remain_minsz()
609 iowrite32(value, hw_info->pcie_base + DPMAIF_AO_DL_PKTINFO_CON0); in t7xx_dpmaif_dl_set_ao_remain_minsz()
614 unsigned int value; in t7xx_dpmaif_dl_set_ao_bat_bufsz() local
616 value = ioread32(hw_info->pcie_base + DPMAIF_AO_DL_PKTINFO_CON2); in t7xx_dpmaif_dl_set_ao_bat_bufsz()
617 value &= ~DPMAIF_BAT_BUF_SZ_MSK; in t7xx_dpmaif_dl_set_ao_bat_bufsz()
618 value |= FIELD_PREP(DPMAIF_BAT_BUF_SZ_MSK, in t7xx_dpmaif_dl_set_ao_bat_bufsz()
620 iowrite32(value, hw_info->pcie_base + DPMAIF_AO_DL_PKTINFO_CON2); in t7xx_dpmaif_dl_set_ao_bat_bufsz()
625 unsigned int value; in t7xx_dpmaif_dl_set_ao_bat_rsv_length() local
627 value = ioread32(hw_info->pcie_base + DPMAIF_AO_DL_PKTINFO_CON2); in t7xx_dpmaif_dl_set_ao_bat_rsv_length()
628 value &= ~DPMAIF_BAT_RSV_LEN_MSK; in t7xx_dpmaif_dl_set_ao_bat_rsv_length()
629 value |= DPMAIF_HW_BAT_RSVLEN; in t7xx_dpmaif_dl_set_ao_bat_rsv_length()
630 iowrite32(value, hw_info->pcie_base + DPMAIF_AO_DL_PKTINFO_CON2); in t7xx_dpmaif_dl_set_ao_bat_rsv_length()
635 unsigned int value; in t7xx_dpmaif_dl_set_pkt_alignment() local
637 value = ioread32(hw_info->pcie_base + DPMAIF_AO_DL_RDY_CHK_THRES); in t7xx_dpmaif_dl_set_pkt_alignment()
638 value &= ~DPMAIF_PKT_ALIGN_MSK; in t7xx_dpmaif_dl_set_pkt_alignment()
639 value |= DPMAIF_PKT_ALIGN_EN; in t7xx_dpmaif_dl_set_pkt_alignment()
640 iowrite32(value, hw_info->pcie_base + DPMAIF_AO_DL_RDY_CHK_THRES); in t7xx_dpmaif_dl_set_pkt_alignment()
645 unsigned int value; in t7xx_dpmaif_dl_set_pkt_checksum() local
647 value = ioread32(hw_info->pcie_base + DPMAIF_AO_DL_RDY_CHK_THRES); in t7xx_dpmaif_dl_set_pkt_checksum()
648 value |= DPMAIF_DL_PKT_CHECKSUM_EN; in t7xx_dpmaif_dl_set_pkt_checksum()
649 iowrite32(value, hw_info->pcie_base + DPMAIF_AO_DL_RDY_CHK_THRES); in t7xx_dpmaif_dl_set_pkt_checksum()
654 unsigned int value; in t7xx_dpmaif_dl_set_ao_frg_check_thres() local
656 value = ioread32(hw_info->pcie_base + DPMAIF_AO_DL_RDY_CHK_FRG_THRES); in t7xx_dpmaif_dl_set_ao_frg_check_thres()
657 value &= ~DPMAIF_FRG_CHECK_THRES_MSK; in t7xx_dpmaif_dl_set_ao_frg_check_thres()
658 value |= DPMAIF_HW_CHK_FRG_NUM; in t7xx_dpmaif_dl_set_ao_frg_check_thres()
659 iowrite32(value, hw_info->pcie_base + DPMAIF_AO_DL_RDY_CHK_FRG_THRES); in t7xx_dpmaif_dl_set_ao_frg_check_thres()
664 unsigned int value; in t7xx_dpmaif_dl_set_ao_frg_bufsz() local
666 value = ioread32(hw_info->pcie_base + DPMAIF_AO_DL_RDY_CHK_FRG_THRES); in t7xx_dpmaif_dl_set_ao_frg_bufsz()
667 value &= ~DPMAIF_FRG_BUF_SZ_MSK; in t7xx_dpmaif_dl_set_ao_frg_bufsz()
668 value |= FIELD_PREP(DPMAIF_FRG_BUF_SZ_MSK, in t7xx_dpmaif_dl_set_ao_frg_bufsz()
670 iowrite32(value, hw_info->pcie_base + DPMAIF_AO_DL_RDY_CHK_FRG_THRES); in t7xx_dpmaif_dl_set_ao_frg_bufsz()
675 unsigned int value; in t7xx_dpmaif_dl_frg_ao_en() local
677 value = ioread32(hw_info->pcie_base + DPMAIF_AO_DL_RDY_CHK_FRG_THRES); in t7xx_dpmaif_dl_frg_ao_en()
680 value |= DPMAIF_FRG_EN_MSK; in t7xx_dpmaif_dl_frg_ao_en()
682 value &= ~DPMAIF_FRG_EN_MSK; in t7xx_dpmaif_dl_frg_ao_en()
684 iowrite32(value, hw_info->pcie_base + DPMAIF_AO_DL_RDY_CHK_FRG_THRES); in t7xx_dpmaif_dl_frg_ao_en()
689 unsigned int value; in t7xx_dpmaif_dl_set_ao_bat_check_thres() local
691 value = ioread32(hw_info->pcie_base + DPMAIF_AO_DL_RDY_CHK_THRES); in t7xx_dpmaif_dl_set_ao_bat_check_thres()
692 value &= ~DPMAIF_BAT_CHECK_THRES_MSK; in t7xx_dpmaif_dl_set_ao_bat_check_thres()
693 value |= FIELD_PREP(DPMAIF_BAT_CHECK_THRES_MSK, DPMAIF_HW_CHK_BAT_NUM); in t7xx_dpmaif_dl_set_ao_bat_check_thres()
694 iowrite32(value, hw_info->pcie_base + DPMAIF_AO_DL_RDY_CHK_THRES); in t7xx_dpmaif_dl_set_ao_bat_check_thres()
699 unsigned int value; in t7xx_dpmaif_dl_set_pit_seqnum() local
701 value = ioread32(hw_info->pcie_base + DPMAIF_AO_DL_PIT_SEQ_END); in t7xx_dpmaif_dl_set_pit_seqnum()
702 value &= ~DPMAIF_DL_PIT_SEQ_MSK; in t7xx_dpmaif_dl_set_pit_seqnum()
703 value |= DPMAIF_DL_PIT_SEQ_VALUE; in t7xx_dpmaif_dl_set_pit_seqnum()
704 iowrite32(value, hw_info->pcie_base + DPMAIF_AO_DL_PIT_SEQ_END); in t7xx_dpmaif_dl_set_pit_seqnum()
716 unsigned int value; in t7xx_dpmaif_dl_set_dlq_pit_size() local
718 value = ioread32(hw_info->pcie_base + DPMAIF_DL_DLQPIT_INIT_CON1); in t7xx_dpmaif_dl_set_dlq_pit_size()
719 value &= ~DPMAIF_PIT_SIZE_MSK; in t7xx_dpmaif_dl_set_dlq_pit_size()
720 value |= size & DPMAIF_PIT_SIZE_MSK; in t7xx_dpmaif_dl_set_dlq_pit_size()
721 iowrite32(value, hw_info->pcie_base + DPMAIF_DL_DLQPIT_INIT_CON1); in t7xx_dpmaif_dl_set_dlq_pit_size()
730 unsigned int value; in t7xx_dpmaif_dl_dlq_pit_en() local
732 value = ioread32(hw_info->pcie_base + DPMAIF_DL_DLQPIT_INIT_CON3); in t7xx_dpmaif_dl_dlq_pit_en()
733 value |= DPMAIF_DLQPIT_EN_MSK; in t7xx_dpmaif_dl_dlq_pit_en()
734 iowrite32(value, hw_info->pcie_base + DPMAIF_DL_DLQPIT_INIT_CON3); in t7xx_dpmaif_dl_dlq_pit_en()
742 u32 value; in t7xx_dpmaif_dl_dlq_pit_init_done() local
749 value, !(value & DPMAIF_DL_PIT_INIT_NOT_READY), in t7xx_dpmaif_dl_dlq_pit_init_done()
759 value, !(value & DPMAIF_DL_PIT_INIT_NOT_READY), in t7xx_dpmaif_dl_dlq_pit_init_done()
785 u32 dl_bat_init, value; in t7xx_dpmaif_dl_all_q_en() local
788 value = ioread32(hw_info->pcie_base + DPMAIF_DL_BAT_INIT_CON1); in t7xx_dpmaif_dl_all_q_en()
791 value |= DPMAIF_BAT_EN_MSK; in t7xx_dpmaif_dl_all_q_en()
793 value &= ~DPMAIF_BAT_EN_MSK; in t7xx_dpmaif_dl_all_q_en()
795 iowrite32(value, hw_info->pcie_base + DPMAIF_DL_BAT_INIT_CON1); in t7xx_dpmaif_dl_all_q_en()
800 value, !(value & DPMAIF_DL_BAT_INIT_NOT_READY), 0, in t7xx_dpmaif_dl_all_q_en()
807 value, !(value & DPMAIF_DL_BAT_INIT_NOT_READY), 0, in t7xx_dpmaif_dl_all_q_en()
863 unsigned int value; in t7xx_dpmaif_ul_update_drb_size() local
865 value = ioread32(hw_info->pcie_base + DPMAIF_UL_DRBSIZE_ADDRH_n(q_num)); in t7xx_dpmaif_ul_update_drb_size()
866 value &= ~DPMAIF_DRB_SIZE_MSK; in t7xx_dpmaif_ul_update_drb_size()
867 value |= size & DPMAIF_DRB_SIZE_MSK; in t7xx_dpmaif_ul_update_drb_size()
868 iowrite32(value, hw_info->pcie_base + DPMAIF_UL_DRBSIZE_ADDRH_n(q_num)); in t7xx_dpmaif_ul_update_drb_size()
881 u32 value; in t7xx_dpmaif_ul_rdy_en() local
883 value = ioread32(hw_info->pcie_base + DPMAIF_AO_UL_CHNL_ARB0); in t7xx_dpmaif_ul_rdy_en()
886 value |= BIT(q_num); in t7xx_dpmaif_ul_rdy_en()
888 value &= ~BIT(q_num); in t7xx_dpmaif_ul_rdy_en()
890 iowrite32(value, hw_info->pcie_base + DPMAIF_AO_UL_CHNL_ARB0); in t7xx_dpmaif_ul_rdy_en()
896 u32 value; in t7xx_dpmaif_ul_arb_en() local
898 value = ioread32(hw_info->pcie_base + DPMAIF_AO_UL_CHNL_ARB0); in t7xx_dpmaif_ul_arb_en()
901 value |= BIT(q_num + 8); in t7xx_dpmaif_ul_arb_en()
903 value &= ~BIT(q_num + 8); in t7xx_dpmaif_ul_arb_en()
905 iowrite32(value, hw_info->pcie_base + DPMAIF_AO_UL_CHNL_ARB0); in t7xx_dpmaif_ul_arb_en()
976 u32 ul_update, value; in t7xx_dpmaif_ul_update_hw_drb_cnt() local
983 value, !(value & DPMAIF_UL_ADD_NOT_READY), 0, in t7xx_dpmaif_ul_update_hw_drb_cnt()
993 value, !(value & DPMAIF_UL_ADD_NOT_READY), 0, in t7xx_dpmaif_ul_update_hw_drb_cnt()
1001 unsigned int value = ioread32(hw_info->pcie_base + DPMAIF_ULQ_STA0_n(q_num)); in t7xx_dpmaif_ul_get_rd_idx() local
1003 return FIELD_GET(DPMAIF_UL_DRB_RIDX_MSK, value) / DPMAIF_UL_DRB_SIZE_WORD; in t7xx_dpmaif_ul_get_rd_idx()
1009 u32 dl_update, value; in t7xx_dpmaif_dlq_add_pit_remain_cnt() local
1016 value, !(value & DPMAIF_DL_ADD_NOT_READY), 0, in t7xx_dpmaif_dlq_add_pit_remain_cnt()
1026 value, !(value & DPMAIF_DL_ADD_NOT_READY), 0, in t7xx_dpmaif_dlq_add_pit_remain_cnt()
1039 u32 value; in t7xx_dpmaif_dl_dlq_pit_get_wr_idx() local
1041 value = ioread32(hw_info->pcie_base + DPMAIF_AO_DL_DLQ_WR_IDX + in t7xx_dpmaif_dl_dlq_pit_get_wr_idx()
1043 return value & DPMAIF_DL_RD_WR_IDX_MSK; in t7xx_dpmaif_dl_dlq_pit_get_wr_idx()
1048 u32 value; in t7xx_dl_add_timedout() local
1051 value, !(value & DPMAIF_DL_ADD_NOT_READY), 0, in t7xx_dl_add_timedout()
1057 unsigned int value; in t7xx_dpmaif_dl_snd_hw_bat_cnt() local
1064 value = bat_entry_cnt & DPMAIF_DL_ADD_COUNT_MASK; in t7xx_dpmaif_dl_snd_hw_bat_cnt()
1065 value |= DPMAIF_DL_ADD_UPDATE; in t7xx_dpmaif_dl_snd_hw_bat_cnt()
1066 iowrite32(value, hw_info->pcie_base + DPMAIF_DL_BAT_ADD); in t7xx_dpmaif_dl_snd_hw_bat_cnt()
1078 u32 value; in t7xx_dpmaif_dl_get_bat_rd_idx() local
1080 value = ioread32(hw_info->pcie_base + DPMAIF_AO_DL_BAT_RD_IDX); in t7xx_dpmaif_dl_get_bat_rd_idx()
1081 return value & DPMAIF_DL_RD_WR_IDX_MSK; in t7xx_dpmaif_dl_get_bat_rd_idx()
1086 u32 value; in t7xx_dpmaif_dl_get_bat_wr_idx() local
1088 value = ioread32(hw_info->pcie_base + DPMAIF_AO_DL_BAT_WR_IDX); in t7xx_dpmaif_dl_get_bat_wr_idx()
1089 return value & DPMAIF_DL_RD_WR_IDX_MSK; in t7xx_dpmaif_dl_get_bat_wr_idx()
1094 unsigned int value; in t7xx_dpmaif_dl_snd_hw_frg_cnt() local
1101 value = frg_entry_cnt & DPMAIF_DL_ADD_COUNT_MASK; in t7xx_dpmaif_dl_snd_hw_frg_cnt()
1102 value |= DPMAIF_DL_FRG_ADD_UPDATE | DPMAIF_DL_ADD_UPDATE; in t7xx_dpmaif_dl_snd_hw_frg_cnt()
1103 iowrite32(value, hw_info->pcie_base + DPMAIF_DL_BAT_ADD); in t7xx_dpmaif_dl_snd_hw_frg_cnt()
1115 u32 value; in t7xx_dpmaif_dl_get_frg_rd_idx() local
1117 value = ioread32(hw_info->pcie_base + DPMAIF_AO_DL_FRGBAT_RD_IDX); in t7xx_dpmaif_dl_get_frg_rd_idx()
1118 return value & DPMAIF_DL_RD_WR_IDX_MSK; in t7xx_dpmaif_dl_get_frg_rd_idx()