Lines Matching refs:dw_pcie_writel_dbi
371 dw_pcie_writel_dbi(pci, PCIE_LINK_WIDTH_SPEED_CONTROL, val); in tegra_pcie_rp_irq_handler()
416 dw_pcie_writel_dbi(pci, PCIE_PL_CHK_REG_CONTROL_STATUS, val); in tegra_pcie_rp_irq_handler()
603 dw_pcie_writel_dbi(&pcie->pci, pcie->cfg_link_cap_l1sub, val); in disable_aspm_l11()
612 dw_pcie_writel_dbi(&pcie->pci, pcie->cfg_link_cap_l1sub, val); in disable_aspm_l12()
625 dw_pcie_writel_dbi(&pcie->pci, pcie->ras_des_cap + in event_counter_prog()
655 dw_pcie_writel_dbi(&pcie->pci, pcie->ras_des_cap + in aspm_state_cnt()
662 dw_pcie_writel_dbi(&pcie->pci, pcie->ras_des_cap + in aspm_state_cnt()
682 dw_pcie_writel_dbi(pci, pcie->ras_des_cap + in init_host_aspm()
690 dw_pcie_writel_dbi(pci, pcie->cfg_link_cap_l1sub, val); in init_host_aspm()
697 dw_pcie_writel_dbi(pci, PCIE_PORT_AFR, val); in init_host_aspm()
843 dw_pcie_writel_dbi(pci, GEN3_RELATED_OFF, val); in config_gen3_gen4_eq_presets()
849 dw_pcie_writel_dbi(pci, GEN3_EQ_CONTROL_OFF, val); in config_gen3_gen4_eq_presets()
854 dw_pcie_writel_dbi(pci, GEN3_RELATED_OFF, val); in config_gen3_gen4_eq_presets()
861 dw_pcie_writel_dbi(pci, GEN3_EQ_CONTROL_OFF, val); in config_gen3_gen4_eq_presets()
865 dw_pcie_writel_dbi(pci, GEN3_RELATED_OFF, val); in config_gen3_gen4_eq_presets()
888 dw_pcie_writel_dbi(pci, PCI_IO_BASE, val); in tegra_pcie_dw_host_init()
893 dw_pcie_writel_dbi(pci, PCI_PREF_MEMORY_BASE, val); in tegra_pcie_dw_host_init()
895 dw_pcie_writel_dbi(pci, PCI_BASE_ADDRESS_0, 0); in tegra_pcie_dw_host_init()
902 dw_pcie_writel_dbi(pci, PORT_LOGIC_AMBA_ERROR_RESPONSE_DEFAULT, val); in tegra_pcie_dw_host_init()
908 dw_pcie_writel_dbi(pci, pcie->pcie_cap_base + PCI_EXP_LNKCAP, val); in tegra_pcie_dw_host_init()
932 dw_pcie_writel_dbi(pci, GEN3_RELATED_OFF, val); in tegra_pcie_dw_host_init()
938 dw_pcie_writel_dbi(pci, CFG_TIMER_CTRL_MAX_FUNC_NUM_OFF, val); in tegra_pcie_dw_host_init()
1012 dw_pcie_writel_dbi(pci, offset + PCI_DLF_CAP, val); in tegra_pcie_dw_start_link()
1848 dw_pcie_writel_dbi(pci, CFG_TIMER_CTRL_MAX_FUNC_NUM_OFF, val); in pex_ep_event_pex_rst_deassert()
1864 dw_pcie_writel_dbi(pci, GEN3_RELATED_OFF, val); in pex_ep_event_pex_rst_deassert()
1888 dw_pcie_writel_dbi(pci, MSIX_ADDR_MATCH_LOW_OFF, val); in pex_ep_event_pex_rst_deassert()
1890 dw_pcie_writel_dbi(pci, MSIX_ADDR_MATCH_HIGH_OFF, val); in pex_ep_event_pex_rst_deassert()