Lines Matching refs:hdmi_phy
89 struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw); in mtk_hdmi_pll_prepare() local
90 void __iomem *base = hdmi_phy->regs; in mtk_hdmi_pll_prepare()
107 struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw); in mtk_hdmi_pll_unprepare() local
108 void __iomem *base = hdmi_phy->regs; in mtk_hdmi_pll_unprepare()
124 struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw); in mtk_hdmi_pll_round_rate() local
126 hdmi_phy->pll_rate = rate; in mtk_hdmi_pll_round_rate()
138 struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw); in mtk_hdmi_pll_set_rate() local
139 void __iomem *base = hdmi_phy->regs; in mtk_hdmi_pll_set_rate()
146 dev_dbg(hdmi_phy->dev, "%s: %lu Hz, parent: %lu Hz\n", __func__, in mtk_hdmi_pll_set_rate()
182 hdmi_ibias = hdmi_phy->ibias; in mtk_hdmi_pll_set_rate()
187 hdmi_ibias = hdmi_phy->ibias_up; in mtk_hdmi_pll_set_rate()
200 FIELD_PREP(RG_HDMITX_DRV_IMP_CLK, hdmi_phy->drv_imp_clk) | in mtk_hdmi_pll_set_rate()
201 FIELD_PREP(RG_HDMITX_DRV_IMP_D2, hdmi_phy->drv_imp_d2) | in mtk_hdmi_pll_set_rate()
202 FIELD_PREP(RG_HDMITX_DRV_IMP_D1, hdmi_phy->drv_imp_d1) | in mtk_hdmi_pll_set_rate()
203 FIELD_PREP(RG_HDMITX_DRV_IMP_D0, hdmi_phy->drv_imp_d0)); in mtk_hdmi_pll_set_rate()
217 struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw); in mtk_hdmi_pll_recalc_rate() local
219 return hdmi_phy->pll_rate; in mtk_hdmi_pll_recalc_rate()
230 static void mtk_hdmi_phy_enable_tmds(struct mtk_hdmi_phy *hdmi_phy) in mtk_hdmi_phy_enable_tmds() argument
232 mtk_phy_set_bits(hdmi_phy->regs + HDMI_CON3, in mtk_hdmi_phy_enable_tmds()
238 static void mtk_hdmi_phy_disable_tmds(struct mtk_hdmi_phy *hdmi_phy) in mtk_hdmi_phy_disable_tmds() argument
240 mtk_phy_clear_bits(hdmi_phy->regs + HDMI_CON3, in mtk_hdmi_phy_disable_tmds()