Lines Matching refs:cmu_wr
593 static void cmu_wr(struct xgene_phy_ctx *ctx, enum cmu_type_t cmu_type, in cmu_wr() function
631 cmu_wr(ctx, cmu_type, reg, val); in cmu_toggle1to0()
634 cmu_wr(ctx, cmu_type, reg, val); in cmu_toggle1to0()
644 cmu_wr(ctx, cmu_type, reg, val); in cmu_clrbits()
654 cmu_wr(ctx, cmu_type, reg, val); in cmu_setbits()
712 cmu_wr(ctx, cmu_type, CMU_REG12, val); in xgene_phy_cfg_cmu_clk_type()
714 cmu_wr(ctx, cmu_type, CMU_REG13, 0x0222); in xgene_phy_cfg_cmu_clk_type()
715 cmu_wr(ctx, cmu_type, CMU_REG14, 0x2225); in xgene_phy_cfg_cmu_clk_type()
722 cmu_wr(ctx, cmu_type, CMU_REG0, val); in xgene_phy_cfg_cmu_clk_type()
726 cmu_wr(ctx, cmu_type, CMU_REG1, val); in xgene_phy_cfg_cmu_clk_type()
732 cmu_wr(ctx, cmu_type, CMU_REG0, val); in xgene_phy_cfg_cmu_clk_type()
736 cmu_wr(ctx, cmu_type, CMU_REG1, val); in xgene_phy_cfg_cmu_clk_type()
747 cmu_wr(ctx, cmu_type, CMU_REG1, val); in xgene_phy_cfg_cmu_clk_type()
751 cmu_wr(ctx, cmu_type, CMU_REG1, val); in xgene_phy_cfg_cmu_clk_type()
771 cmu_wr(ctx, cmu_type, CMU_REG34, val); in xgene_phy_sata_cfg_cmu_core()
780 cmu_wr(ctx, cmu_type, CMU_REG0, val); in xgene_phy_sata_cfg_cmu_core()
793 cmu_wr(ctx, cmu_type, CMU_REG1, val); in xgene_phy_sata_cfg_cmu_core()
817 cmu_wr(ctx, cmu_type, CMU_REG2, val); in xgene_phy_sata_cfg_cmu_core()
832 cmu_wr(ctx, cmu_type, CMU_REG3, val); in xgene_phy_sata_cfg_cmu_core()
837 cmu_wr(ctx, cmu_type, CMU_REG26, val); in xgene_phy_sata_cfg_cmu_core()
847 cmu_wr(ctx, cmu_type, CMU_REG5, val); in xgene_phy_sata_cfg_cmu_core()
853 cmu_wr(ctx, cmu_type, CMU_REG6, val); in xgene_phy_sata_cfg_cmu_core()
867 cmu_wr(ctx, cmu_type, CMU_REG9, val); in xgene_phy_sata_cfg_cmu_core()
872 cmu_wr(ctx, cmu_type, CMU_REG10, val); in xgene_phy_sata_cfg_cmu_core()
883 cmu_wr(ctx, cmu_type, CMU_REG16, val); in xgene_phy_sata_cfg_cmu_core()
889 cmu_wr(ctx, cmu_type, CMU_REG30, val); in xgene_phy_sata_cfg_cmu_core()
892 cmu_wr(ctx, cmu_type, CMU_REG31, 0xF); in xgene_phy_sata_cfg_cmu_core()
900 cmu_wr(ctx, cmu_type, CMU_REG32, val); in xgene_phy_sata_cfg_cmu_core()
904 cmu_wr(ctx, cmu_type, CMU_REG34, 0x8d27); in xgene_phy_sata_cfg_cmu_core()
906 cmu_wr(ctx, cmu_type, CMU_REG34, 0x873c); in xgene_phy_sata_cfg_cmu_core()
909 cmu_wr(ctx, cmu_type, CMU_REG37, 0xF00F); in xgene_phy_sata_cfg_cmu_core()
920 cmu_wr(ctx, cmu_type, CMU_REG35, val); in xgene_phy_ssc_enable()
927 cmu_wr(ctx, cmu_type, CMU_REG36, val); in xgene_phy_ssc_enable()
1156 cmu_wr(ctx, cmu_type, CMU_REG1, val); in xgene_phy_cal_rdy_chk()
1183 cmu_wr(ctx, cmu_type, CMU_REG17, val); in xgene_phy_cal_rdy_chk()
1194 cmu_wr(ctx, cmu_type, CMU_REG17, val); in xgene_phy_cal_rdy_chk()
1201 cmu_wr(ctx, cmu_type, CMU_REG17, val); in xgene_phy_cal_rdy_chk()
1244 cmu_wr(ctx, cmu_type, CMU_REG16, val); in xgene_phy_pdwn_force_vco()