Lines Matching refs:value
270 static inline void ao_writel(struct tegra186_xusb_padctl *priv, u32 value, unsigned int offset) in ao_writel() argument
272 writel(value, priv->ao_regs + offset); in ao_writel()
326 u32 value; in tegra186_utmi_enable_phy_sleepwalk() local
331 value = ao_readl(priv, XUSB_AO_UTMIP_SLEEPWALK_CFG(index)); in tegra186_utmi_enable_phy_sleepwalk()
332 value &= ~MASTER_ENABLE; in tegra186_utmi_enable_phy_sleepwalk()
333 ao_writel(priv, value, XUSB_AO_UTMIP_SLEEPWALK_CFG(index)); in tegra186_utmi_enable_phy_sleepwalk()
336 value = ao_readl(priv, XUSB_AO_UTMIP_SLEEPWALK_CFG(index)); in tegra186_utmi_enable_phy_sleepwalk()
337 value |= MASTER_CFG_SEL; in tegra186_utmi_enable_phy_sleepwalk()
338 ao_writel(priv, value, XUSB_AO_UTMIP_SLEEPWALK_CFG(index)); in tegra186_utmi_enable_phy_sleepwalk()
341 value = ao_readl(priv, XUSB_AO_USB_DEBOUNCE_DEL); in tegra186_utmi_enable_phy_sleepwalk()
342 value &= ~UTMIP_LINE_DEB_CNT(~0); in tegra186_utmi_enable_phy_sleepwalk()
343 value |= UTMIP_LINE_DEB_CNT(1); in tegra186_utmi_enable_phy_sleepwalk()
344 ao_writel(priv, value, XUSB_AO_USB_DEBOUNCE_DEL); in tegra186_utmi_enable_phy_sleepwalk()
347 value = ao_readl(priv, XUSB_AO_UTMIP_SLEEPWALK_CFG(index)); in tegra186_utmi_enable_phy_sleepwalk()
348 value &= ~(FAKE_USBOP_VAL | FAKE_USBON_VAL | in tegra186_utmi_enable_phy_sleepwalk()
350 ao_writel(priv, value, XUSB_AO_UTMIP_SLEEPWALK_CFG(index)); in tegra186_utmi_enable_phy_sleepwalk()
353 value = ao_readl(priv, XUSB_AO_UTMIP_SLEEPWALK_CFG(index)); in tegra186_utmi_enable_phy_sleepwalk()
354 value &= ~LINE_WAKEUP_EN; in tegra186_utmi_enable_phy_sleepwalk()
355 ao_writel(priv, value, XUSB_AO_UTMIP_SLEEPWALK_CFG(index)); in tegra186_utmi_enable_phy_sleepwalk()
358 value = ao_readl(priv, XUSB_AO_UTMIP_SLEEPWALK_CFG(index)); in tegra186_utmi_enable_phy_sleepwalk()
359 value &= ~WAKE_VAL(~0); in tegra186_utmi_enable_phy_sleepwalk()
360 value |= WAKE_VAL_NONE; in tegra186_utmi_enable_phy_sleepwalk()
361 ao_writel(priv, value, XUSB_AO_UTMIP_SLEEPWALK_CFG(index)); in tegra186_utmi_enable_phy_sleepwalk()
364 value = ao_readl(priv, XUSB_AO_UTMIP_PAD_CFG(index)); in tegra186_utmi_enable_phy_sleepwalk()
365 value |= (USBOP_VAL_PD | USBON_VAL_PD); in tegra186_utmi_enable_phy_sleepwalk()
366 ao_writel(priv, value, XUSB_AO_UTMIP_PAD_CFG(index)); in tegra186_utmi_enable_phy_sleepwalk()
369 value = ao_readl(priv, XUSB_AO_UTMIP_SAVED_STATE(index)); in tegra186_utmi_enable_phy_sleepwalk()
370 value &= ~SPEED(~0); in tegra186_utmi_enable_phy_sleepwalk()
374 value |= UTMI_HS; in tegra186_utmi_enable_phy_sleepwalk()
378 value |= UTMI_FS; in tegra186_utmi_enable_phy_sleepwalk()
382 value |= UTMI_LS; in tegra186_utmi_enable_phy_sleepwalk()
386 value |= UTMI_RST; in tegra186_utmi_enable_phy_sleepwalk()
390 ao_writel(priv, value, XUSB_AO_UTMIP_SAVED_STATE(index)); in tegra186_utmi_enable_phy_sleepwalk()
393 value = ao_readl(priv, XUSB_AO_UTMIP_SLEEPWALK_CFG(index)); in tegra186_utmi_enable_phy_sleepwalk()
394 value |= LINEVAL_WALK_EN; in tegra186_utmi_enable_phy_sleepwalk()
395 value &= ~WAKE_WALK_EN; in tegra186_utmi_enable_phy_sleepwalk()
396 ao_writel(priv, value, XUSB_AO_UTMIP_SLEEPWALK_CFG(index)); in tegra186_utmi_enable_phy_sleepwalk()
401 value = ao_readl(priv, XUSB_AO_UTMIP_TRIGGERS(index)); in tegra186_utmi_enable_phy_sleepwalk()
402 value |= (CLR_WALK_PTR | CLR_WAKE_ALARM | CAP_CFG); in tegra186_utmi_enable_phy_sleepwalk()
403 ao_writel(priv, value, XUSB_AO_UTMIP_TRIGGERS(index)); in tegra186_utmi_enable_phy_sleepwalk()
410 value = USBOP_RPD_A | USBOP_RPD_B | USBOP_RPD_C | USBOP_RPD_D; in tegra186_utmi_enable_phy_sleepwalk()
411 value |= USBON_RPD_A | USBON_RPD_B | USBON_RPD_C | USBON_RPD_D; in tegra186_utmi_enable_phy_sleepwalk()
417 value |= HIGHZ_A; in tegra186_utmi_enable_phy_sleepwalk()
418 value |= AP_A; in tegra186_utmi_enable_phy_sleepwalk()
419 value |= AN_B | AN_C | AN_D; in tegra186_utmi_enable_phy_sleepwalk()
424 value |= HIGHZ_A; in tegra186_utmi_enable_phy_sleepwalk()
425 value |= AN_A; in tegra186_utmi_enable_phy_sleepwalk()
426 value |= AP_B | AP_C | AP_D; in tegra186_utmi_enable_phy_sleepwalk()
430 value |= HIGHZ_A | HIGHZ_B | HIGHZ_C | HIGHZ_D; in tegra186_utmi_enable_phy_sleepwalk()
434 ao_writel(priv, value, XUSB_AO_UTMIP_SLEEPWALK(index)); in tegra186_utmi_enable_phy_sleepwalk()
437 value = ao_readl(priv, XUSB_AO_UTMIP_PAD_CFG(index)); in tegra186_utmi_enable_phy_sleepwalk()
438 value &= ~(USBOP_VAL_PD | USBON_VAL_PD); in tegra186_utmi_enable_phy_sleepwalk()
439 ao_writel(priv, value, XUSB_AO_UTMIP_PAD_CFG(index)); in tegra186_utmi_enable_phy_sleepwalk()
444 value = ao_readl(priv, XUSB_AO_UTMIP_PAD_CFG(index)); in tegra186_utmi_enable_phy_sleepwalk()
445 value |= FSLS_USE_XUSB_AO | TRK_CTRL_USE_XUSB_AO | RPD_CTRL_USE_XUSB_AO | in tegra186_utmi_enable_phy_sleepwalk()
447 ao_writel(priv, value, XUSB_AO_UTMIP_PAD_CFG(index)); in tegra186_utmi_enable_phy_sleepwalk()
450 value = ao_readl(priv, XUSB_AO_UTMIP_SLEEPWALK_CFG(index)); in tegra186_utmi_enable_phy_sleepwalk()
451 value &= ~WAKE_VAL(~0); in tegra186_utmi_enable_phy_sleepwalk()
452 value |= WAKE_VAL_ANY; in tegra186_utmi_enable_phy_sleepwalk()
453 ao_writel(priv, value, XUSB_AO_UTMIP_SLEEPWALK_CFG(index)); in tegra186_utmi_enable_phy_sleepwalk()
456 value = ao_readl(priv, XUSB_AO_UTMIP_SLEEPWALK_CFG(index)); in tegra186_utmi_enable_phy_sleepwalk()
457 value |= MASTER_ENABLE | LINE_WAKEUP_EN; in tegra186_utmi_enable_phy_sleepwalk()
458 ao_writel(priv, value, XUSB_AO_UTMIP_SLEEPWALK_CFG(index)); in tegra186_utmi_enable_phy_sleepwalk()
470 u32 value; in tegra186_utmi_disable_phy_sleepwalk() local
475 value = ao_readl(priv, XUSB_AO_UTMIP_SLEEPWALK_CFG(index)); in tegra186_utmi_disable_phy_sleepwalk()
476 value &= ~(MASTER_ENABLE | LINE_WAKEUP_EN); in tegra186_utmi_disable_phy_sleepwalk()
477 ao_writel(priv, value, XUSB_AO_UTMIP_SLEEPWALK_CFG(index)); in tegra186_utmi_disable_phy_sleepwalk()
480 value = ao_readl(priv, XUSB_AO_UTMIP_PAD_CFG(index)); in tegra186_utmi_disable_phy_sleepwalk()
481 value &= ~(FSLS_USE_XUSB_AO | TRK_CTRL_USE_XUSB_AO | RPD_CTRL_USE_XUSB_AO | in tegra186_utmi_disable_phy_sleepwalk()
483 ao_writel(priv, value, XUSB_AO_UTMIP_PAD_CFG(index)); in tegra186_utmi_disable_phy_sleepwalk()
486 value = ao_readl(priv, XUSB_AO_UTMIP_SLEEPWALK_CFG(index)); in tegra186_utmi_disable_phy_sleepwalk()
487 value &= ~WAKE_VAL(~0); in tegra186_utmi_disable_phy_sleepwalk()
488 value |= WAKE_VAL_NONE; in tegra186_utmi_disable_phy_sleepwalk()
489 ao_writel(priv, value, XUSB_AO_UTMIP_SLEEPWALK_CFG(index)); in tegra186_utmi_disable_phy_sleepwalk()
492 value = ao_readl(priv, XUSB_AO_UTMIP_PAD_CFG(index)); in tegra186_utmi_disable_phy_sleepwalk()
493 value |= USBOP_VAL_PD | USBON_VAL_PD; in tegra186_utmi_disable_phy_sleepwalk()
494 ao_writel(priv, value, XUSB_AO_UTMIP_PAD_CFG(index)); in tegra186_utmi_disable_phy_sleepwalk()
497 value = ao_readl(priv, XUSB_AO_UTMIP_TRIGGERS(index)); in tegra186_utmi_disable_phy_sleepwalk()
498 value |= CLR_WAKE_ALARM; in tegra186_utmi_disable_phy_sleepwalk()
499 ao_writel(priv, value, XUSB_AO_UTMIP_TRIGGERS(index)); in tegra186_utmi_disable_phy_sleepwalk()
510 u32 value; in tegra186_utmi_enable_phy_wake() local
514 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_utmi_enable_phy_wake()
515 value &= ~ALL_WAKE_EVENTS; in tegra186_utmi_enable_phy_wake()
516 value |= USB2_PORT_WAKEUP_EVENT(index); in tegra186_utmi_enable_phy_wake()
517 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_utmi_enable_phy_wake()
521 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_utmi_enable_phy_wake()
522 value &= ~ALL_WAKE_EVENTS; in tegra186_utmi_enable_phy_wake()
523 value |= USB2_PORT_WAKE_INTERRUPT_ENABLE(index); in tegra186_utmi_enable_phy_wake()
524 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_utmi_enable_phy_wake()
535 u32 value; in tegra186_utmi_disable_phy_wake() local
539 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_utmi_disable_phy_wake()
540 value &= ~ALL_WAKE_EVENTS; in tegra186_utmi_disable_phy_wake()
541 value &= ~USB2_PORT_WAKE_INTERRUPT_ENABLE(index); in tegra186_utmi_disable_phy_wake()
542 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_utmi_disable_phy_wake()
546 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_utmi_disable_phy_wake()
547 value &= ~ALL_WAKE_EVENTS; in tegra186_utmi_disable_phy_wake()
548 value |= USB2_PORT_WAKEUP_EVENT(index); in tegra186_utmi_disable_phy_wake()
549 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_utmi_disable_phy_wake()
560 u32 value; in tegra186_utmi_phy_remote_wake_detected() local
562 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_utmi_phy_remote_wake_detected()
563 if ((value & USB2_PORT_WAKE_INTERRUPT_ENABLE(index)) && in tegra186_utmi_phy_remote_wake_detected()
564 (value & USB2_PORT_WAKEUP_EVENT(index))) in tegra186_utmi_phy_remote_wake_detected()
584 u32 value; in tegra186_utmi_bias_pad_power_on() local
598 value = padctl_readl(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL1); in tegra186_utmi_bias_pad_power_on()
599 value &= ~USB2_TRK_START_TIMER(~0); in tegra186_utmi_bias_pad_power_on()
600 value |= USB2_TRK_START_TIMER(0x1e); in tegra186_utmi_bias_pad_power_on()
601 value &= ~USB2_TRK_DONE_RESET_TIMER(~0); in tegra186_utmi_bias_pad_power_on()
602 value |= USB2_TRK_DONE_RESET_TIMER(0xa); in tegra186_utmi_bias_pad_power_on()
603 padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL1); in tegra186_utmi_bias_pad_power_on()
605 value = padctl_readl(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL0); in tegra186_utmi_bias_pad_power_on()
606 value &= ~BIAS_PAD_PD; in tegra186_utmi_bias_pad_power_on()
607 value &= ~HS_SQUELCH_LEVEL(~0); in tegra186_utmi_bias_pad_power_on()
608 value |= HS_SQUELCH_LEVEL(priv->calib.hs_squelch); in tegra186_utmi_bias_pad_power_on()
609 padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL0); in tegra186_utmi_bias_pad_power_on()
613 value = padctl_readl(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL1); in tegra186_utmi_bias_pad_power_on()
614 value &= ~USB2_PD_TRK; in tegra186_utmi_bias_pad_power_on()
615 padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL1); in tegra186_utmi_bias_pad_power_on()
627 value = padctl_readl(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL1); in tegra186_utmi_bias_pad_power_on()
628 value |= USB2_TRK_COMPLETED; in tegra186_utmi_bias_pad_power_on()
629 padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL1); in tegra186_utmi_bias_pad_power_on()
635 value = padctl_readl(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL2); in tegra186_utmi_bias_pad_power_on()
636 value |= USB2_TRK_HW_MODE; in tegra186_utmi_bias_pad_power_on()
637 value &= ~CYA_TRK_CODE_UPDATE_ON_IDLE; in tegra186_utmi_bias_pad_power_on()
638 padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL2); in tegra186_utmi_bias_pad_power_on()
649 u32 value; in tegra186_utmi_bias_pad_power_off() local
663 value = padctl_readl(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL1); in tegra186_utmi_bias_pad_power_off()
664 value |= USB2_PD_TRK; in tegra186_utmi_bias_pad_power_off()
665 padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL1); in tegra186_utmi_bias_pad_power_off()
668 value = padctl_readl(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL2); in tegra186_utmi_bias_pad_power_off()
669 value &= ~USB2_TRK_HW_MODE; in tegra186_utmi_bias_pad_power_off()
670 padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL2); in tegra186_utmi_bias_pad_power_off()
684 u32 value; in tegra186_utmi_pad_power_on() local
701 value = padctl_readl(padctl, XUSB_PADCTL_USB2_OTG_PADX_CTL0(index)); in tegra186_utmi_pad_power_on()
702 value &= ~USB2_OTG_PD; in tegra186_utmi_pad_power_on()
703 padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL0(index)); in tegra186_utmi_pad_power_on()
705 value = padctl_readl(padctl, XUSB_PADCTL_USB2_OTG_PADX_CTL1(index)); in tegra186_utmi_pad_power_on()
706 value &= ~USB2_OTG_PD_DR; in tegra186_utmi_pad_power_on()
707 padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL1(index)); in tegra186_utmi_pad_power_on()
715 u32 value; in tegra186_utmi_pad_power_down() local
722 value = padctl_readl(padctl, XUSB_PADCTL_USB2_OTG_PADX_CTL0(index)); in tegra186_utmi_pad_power_down()
723 value |= USB2_OTG_PD; in tegra186_utmi_pad_power_down()
724 padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL0(index)); in tegra186_utmi_pad_power_down()
726 value = padctl_readl(padctl, XUSB_PADCTL_USB2_OTG_PADX_CTL1(index)); in tegra186_utmi_pad_power_down()
727 value |= USB2_OTG_PD_DR; in tegra186_utmi_pad_power_down()
728 padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL1(index)); in tegra186_utmi_pad_power_down()
738 u32 value; in tegra186_xusb_padctl_vbus_override() local
742 value = padctl_readl(padctl, USB2_VBUS_ID); in tegra186_xusb_padctl_vbus_override()
745 value |= VBUS_OVERRIDE; in tegra186_xusb_padctl_vbus_override()
746 value &= ~ID_OVERRIDE(~0); in tegra186_xusb_padctl_vbus_override()
747 value |= ID_OVERRIDE_FLOATING; in tegra186_xusb_padctl_vbus_override()
749 value &= ~VBUS_OVERRIDE; in tegra186_xusb_padctl_vbus_override()
752 padctl_writel(padctl, value, USB2_VBUS_ID); in tegra186_xusb_padctl_vbus_override()
760 u32 value; in tegra186_xusb_padctl_id_override() local
764 value = padctl_readl(padctl, USB2_VBUS_ID); in tegra186_xusb_padctl_id_override()
767 if (value & VBUS_OVERRIDE) { in tegra186_xusb_padctl_id_override()
768 value &= ~VBUS_OVERRIDE; in tegra186_xusb_padctl_id_override()
769 padctl_writel(padctl, value, USB2_VBUS_ID); in tegra186_xusb_padctl_id_override()
772 value = padctl_readl(padctl, USB2_VBUS_ID); in tegra186_xusb_padctl_id_override()
775 value &= ~ID_OVERRIDE(~0); in tegra186_xusb_padctl_id_override()
776 value |= ID_OVERRIDE_GROUNDED; in tegra186_xusb_padctl_id_override()
778 value &= ~ID_OVERRIDE(~0); in tegra186_xusb_padctl_id_override()
779 value |= ID_OVERRIDE_FLOATING; in tegra186_xusb_padctl_id_override()
782 padctl_writel(padctl, value, USB2_VBUS_ID); in tegra186_xusb_padctl_id_override()
835 u32 value; in tegra186_utmi_phy_power_on() local
843 value = padctl_readl(padctl, XUSB_PADCTL_USB2_PAD_MUX); in tegra186_utmi_phy_power_on()
844 value &= ~(USB2_PORT_MASK << USB2_PORT_SHIFT(index)); in tegra186_utmi_phy_power_on()
845 value |= (PORT_XUSB << USB2_PORT_SHIFT(index)); in tegra186_utmi_phy_power_on()
846 padctl_writel(padctl, value, XUSB_PADCTL_USB2_PAD_MUX); in tegra186_utmi_phy_power_on()
848 value = padctl_readl(padctl, XUSB_PADCTL_USB2_PORT_CAP); in tegra186_utmi_phy_power_on()
849 value &= ~(PORT_CAP_MASK << PORTX_CAP_SHIFT(index)); in tegra186_utmi_phy_power_on()
852 value |= (PORT_CAP_DISABLED << PORTX_CAP_SHIFT(index)); in tegra186_utmi_phy_power_on()
854 value |= (PORT_CAP_DEVICE << PORTX_CAP_SHIFT(index)); in tegra186_utmi_phy_power_on()
856 value |= (PORT_CAP_HOST << PORTX_CAP_SHIFT(index)); in tegra186_utmi_phy_power_on()
858 value |= (PORT_CAP_OTG << PORTX_CAP_SHIFT(index)); in tegra186_utmi_phy_power_on()
860 padctl_writel(padctl, value, XUSB_PADCTL_USB2_PORT_CAP); in tegra186_utmi_phy_power_on()
862 value = padctl_readl(padctl, XUSB_PADCTL_USB2_OTG_PADX_CTL0(index)); in tegra186_utmi_phy_power_on()
863 value &= ~USB2_OTG_PD_ZI; in tegra186_utmi_phy_power_on()
864 value |= TERM_SEL; in tegra186_utmi_phy_power_on()
865 value &= ~HS_CURR_LEVEL(~0); in tegra186_utmi_phy_power_on()
878 value |= HS_CURR_LEVEL(hs_current_level); in tegra186_utmi_phy_power_on()
880 value |= HS_CURR_LEVEL(priv->calib.hs_curr_level[index]); in tegra186_utmi_phy_power_on()
883 padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL0(index)); in tegra186_utmi_phy_power_on()
885 value = padctl_readl(padctl, XUSB_PADCTL_USB2_OTG_PADX_CTL1(index)); in tegra186_utmi_phy_power_on()
886 value &= ~TERM_RANGE_ADJ(~0); in tegra186_utmi_phy_power_on()
887 value |= TERM_RANGE_ADJ(priv->calib.hs_term_range_adj); in tegra186_utmi_phy_power_on()
888 value &= ~RPD_CTRL(~0); in tegra186_utmi_phy_power_on()
889 value |= RPD_CTRL(priv->calib.rpd_ctrl); in tegra186_utmi_phy_power_on()
890 padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL1(index)); in tegra186_utmi_phy_power_on()
1090 u32 value; in tegra186_usb3_enable_phy_sleepwalk() local
1094 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_enable_phy_sleepwalk()
1095 value |= SSPX_ELPG_CLAMP_EN_EARLY(index); in tegra186_usb3_enable_phy_sleepwalk()
1096 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_enable_phy_sleepwalk()
1100 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_enable_phy_sleepwalk()
1101 value |= SSPX_ELPG_CLAMP_EN(index); in tegra186_usb3_enable_phy_sleepwalk()
1102 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_enable_phy_sleepwalk()
1115 u32 value; in tegra186_usb3_disable_phy_sleepwalk() local
1119 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_disable_phy_sleepwalk()
1120 value &= ~SSPX_ELPG_CLAMP_EN_EARLY(index); in tegra186_usb3_disable_phy_sleepwalk()
1121 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_disable_phy_sleepwalk()
1125 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_disable_phy_sleepwalk()
1126 value &= ~SSPX_ELPG_CLAMP_EN(index); in tegra186_usb3_disable_phy_sleepwalk()
1127 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_disable_phy_sleepwalk()
1138 u32 value; in tegra186_usb3_enable_phy_wake() local
1142 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_usb3_enable_phy_wake()
1143 value &= ~ALL_WAKE_EVENTS; in tegra186_usb3_enable_phy_wake()
1144 value |= SS_PORT_WAKEUP_EVENT(index); in tegra186_usb3_enable_phy_wake()
1145 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_usb3_enable_phy_wake()
1149 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_usb3_enable_phy_wake()
1150 value &= ~ALL_WAKE_EVENTS; in tegra186_usb3_enable_phy_wake()
1151 value |= SS_PORT_WAKE_INTERRUPT_ENABLE(index); in tegra186_usb3_enable_phy_wake()
1152 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_usb3_enable_phy_wake()
1163 u32 value; in tegra186_usb3_disable_phy_wake() local
1167 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_usb3_disable_phy_wake()
1168 value &= ~ALL_WAKE_EVENTS; in tegra186_usb3_disable_phy_wake()
1169 value &= ~SS_PORT_WAKE_INTERRUPT_ENABLE(index); in tegra186_usb3_disable_phy_wake()
1170 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_usb3_disable_phy_wake()
1174 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_usb3_disable_phy_wake()
1175 value &= ~ALL_WAKE_EVENTS; in tegra186_usb3_disable_phy_wake()
1176 value |= SS_PORT_WAKEUP_EVENT(index); in tegra186_usb3_disable_phy_wake()
1177 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_usb3_disable_phy_wake()
1188 u32 value; in tegra186_usb3_phy_remote_wake_detected() local
1190 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_usb3_phy_remote_wake_detected()
1191 if ((value & SS_PORT_WAKE_INTERRUPT_ENABLE(index)) && (value & SS_PORT_WAKEUP_EVENT(index))) in tegra186_usb3_phy_remote_wake_detected()
1237 u32 value; in tegra186_usb3_phy_power_on() local
1254 value = padctl_readl(padctl, XUSB_PADCTL_SS_PORT_CAP); in tegra186_usb3_phy_power_on()
1255 value &= ~(PORT_CAP_MASK << PORTX_CAP_SHIFT(index)); in tegra186_usb3_phy_power_on()
1258 value |= (PORT_CAP_DISABLED << PORTX_CAP_SHIFT(index)); in tegra186_usb3_phy_power_on()
1260 value |= (PORT_CAP_DEVICE << PORTX_CAP_SHIFT(index)); in tegra186_usb3_phy_power_on()
1262 value |= (PORT_CAP_HOST << PORTX_CAP_SHIFT(index)); in tegra186_usb3_phy_power_on()
1264 value |= (PORT_CAP_OTG << PORTX_CAP_SHIFT(index)); in tegra186_usb3_phy_power_on()
1266 padctl_writel(padctl, value, XUSB_PADCTL_SS_PORT_CAP); in tegra186_usb3_phy_power_on()
1269 value = padctl_readl(padctl, XUSB_PADCTL_SS_PORT_CFG); in tegra186_usb3_phy_power_on()
1270 value &= ~(PORTX_SPEED_SUPPORT_MASK << in tegra186_usb3_phy_power_on()
1272 value |= (PORT_SPEED_SUPPORT_GEN1 << in tegra186_usb3_phy_power_on()
1274 padctl_writel(padctl, value, XUSB_PADCTL_SS_PORT_CFG); in tegra186_usb3_phy_power_on()
1277 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_phy_power_on()
1278 value &= ~SSPX_ELPG_VCORE_DOWN(index); in tegra186_usb3_phy_power_on()
1279 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_phy_power_on()
1283 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_phy_power_on()
1284 value &= ~SSPX_ELPG_CLAMP_EN_EARLY(index); in tegra186_usb3_phy_power_on()
1285 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_phy_power_on()
1289 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_phy_power_on()
1290 value &= ~SSPX_ELPG_CLAMP_EN(index); in tegra186_usb3_phy_power_on()
1291 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_phy_power_on()
1305 u32 value; in tegra186_usb3_phy_power_off() local
1315 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_phy_power_off()
1316 value |= SSPX_ELPG_CLAMP_EN_EARLY(index); in tegra186_usb3_phy_power_off()
1317 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_phy_power_off()
1321 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_phy_power_off()
1322 value |= SSPX_ELPG_CLAMP_EN(index); in tegra186_usb3_phy_power_off()
1323 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_phy_power_off()
1327 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_phy_power_off()
1328 value |= SSPX_ELPG_VCORE_DOWN(index); in tegra186_usb3_phy_power_off()
1329 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_phy_power_off()
1412 u32 value, *level; in tegra186_xusb_read_fuse_calibration() local
1421 err = tegra_fuse_readl(TEGRA_FUSE_SKU_CALIB_0, &value); in tegra186_xusb_read_fuse_calibration()
1426 dev_dbg(dev, "FUSE_USB_CALIB_0 %#x\n", value); in tegra186_xusb_read_fuse_calibration()
1429 level[i] = (value >> HS_CURR_LEVEL_PADX_SHIFT(i)) & in tegra186_xusb_read_fuse_calibration()
1434 padctl->calib.hs_squelch = (value >> HS_SQUELCH_SHIFT) & in tegra186_xusb_read_fuse_calibration()
1436 padctl->calib.hs_term_range_adj = (value >> HS_TERM_RANGE_ADJ_SHIFT) & in tegra186_xusb_read_fuse_calibration()
1439 err = tegra_fuse_readl(TEGRA_FUSE_USB_CALIB_EXT_0, &value); in tegra186_xusb_read_fuse_calibration()
1445 dev_dbg(dev, "FUSE_USB_CALIB_EXT_0 %#x\n", value); in tegra186_xusb_read_fuse_calibration()
1447 padctl->calib.rpd_ctrl = (value >> RPD_CTRL_SHIFT) & RPD_CTRL_MASK; in tegra186_xusb_read_fuse_calibration()