Lines Matching refs:them
24 allows configuring of SoC pins and using them as GPIOs.
37 using them as GPIOs.
47 interface that allows configuring of SoC pins and using them as
58 interface that allows configuring of SoC pins and using them as
75 of Intel Alder Lake PCH pins and using them as GPIOs.
83 configuring of SoC pins and using them as GPIOs.
91 of Intel Cannon Lake PCH pins and using them as GPIOs.
99 of Intel Cedar Fork PCH pins and using them as GPIOs.
107 of Intel Denverton SoC pins and using them as GPIOs.
115 of Intel Elkhart Lake SoC pins and using them as GPIOs.
123 of Intel Emmitsburg pins and using them as GPIOs.
131 of Intel Gemini Lake SoC pins and using them as GPIOs.
139 of Intel Ice Lake PCH pins and using them as GPIOs.
147 of Intel Jasper Lake PCH pins and using them as GPIOs.
155 of Intel Lakefield SoC pins and using them as GPIOs.
163 of Intel Lewisburg pins and using them as GPIOs.
171 of Intel Meteor Lake pins and using them as GPIOs.
180 using them as GPIOs.
188 of Intel Tiger Lake PCH pins and using them as GPIOs.