Lines Matching refs:reg_off

112 static inline u32 sppctl_get_reg_and_bit_offset(unsigned int offset, u32 *reg_off)  in sppctl_get_reg_and_bit_offset()  argument
117 	*reg_off = (offset / 32) * 4;  in sppctl_get_reg_and_bit_offset()
123 static inline u32 sppctl_get_moon_reg_and_bit_offset(unsigned int offset, u32 *reg_off)  in sppctl_get_moon_reg_and_bit_offset()  argument
133 	*reg_off = (offset / 16) * 4;  in sppctl_get_moon_reg_and_bit_offset()
139 static inline u32 sppctl_prep_moon_reg_and_offset(unsigned int offset, u32 *reg_off, int val)  in sppctl_prep_moon_reg_and_offset()  argument
143 	bit_off = sppctl_get_moon_reg_and_bit_offset(offset, reg_off);  in sppctl_prep_moon_reg_and_offset()
227 static void sppctl_gmx_set(struct sppctl_pdata *pctl, u8 reg_off, u8 bit_off, u8 bit_sz,  in sppctl_gmx_set()  argument
240 	writel(reg, pctl->moon1_base + reg_off * 4);  in sppctl_gmx_set()
264 	u32 reg_off, bit_off, reg;  in sppctl_first_get()  local
266 	bit_off = sppctl_get_reg_and_bit_offset(offset, &reg_off);  in sppctl_first_get()
267 	reg = sppctl_first_readl(spp_gchip, reg_off);  in sppctl_first_get()
299 	u32 reg_off, bit_off, reg;  in sppctl_master_get()  local
301 	bit_off = sppctl_get_moon_reg_and_bit_offset(offset, &reg_off);  in sppctl_master_get()
302 	reg = sppctl_gpio_master_readl(spp_gchip, reg_off);  in sppctl_master_get()
310 	u32 reg_off, bit_off, reg;  in sppctl_first_master_set()  local
315 		bit_off = sppctl_get_reg_and_bit_offset(offset, &reg_off);  in sppctl_first_master_set()
316 		reg = sppctl_first_readl(spp_gchip, reg_off);  in sppctl_first_master_set()
323 				sppctl_first_writel(spp_gchip, reg, reg_off);  in sppctl_first_master_set()
328 				sppctl_first_writel(spp_gchip, reg, reg_off);  in sppctl_first_master_set()
338 		reg = sppctl_prep_moon_reg_and_offset(offset, &reg_off, (master == mux_m_gpio));  in sppctl_first_master_set()
339 		sppctl_gpio_master_writel(spp_gchip, reg, reg_off);  in sppctl_first_master_set()
346 	u32 reg_off, reg;  in sppctl_gpio_input_inv_set()  local
348 	reg = sppctl_prep_moon_reg_and_offset(offset, &reg_off, 1);  in sppctl_gpio_input_inv_set()
349 	sppctl_gpio_iinv_writel(spp_gchip, reg, reg_off);  in sppctl_gpio_input_inv_set()
355 	u32 reg_off, reg;  in sppctl_gpio_output_inv_set()  local
357 	reg = sppctl_prep_moon_reg_and_offset(offset, &reg_off, 1);  in sppctl_gpio_output_inv_set()
358 	sppctl_gpio_oinv_writel(spp_gchip, reg, reg_off);  in sppctl_gpio_output_inv_set()
364 	u32 reg_off, bit_off, reg;  in sppctl_gpio_output_od_get()  local
366 	bit_off = sppctl_get_moon_reg_and_bit_offset(offset, &reg_off);  in sppctl_gpio_output_od_get()
367 	reg = sppctl_gpio_od_readl(spp_gchip, reg_off);  in sppctl_gpio_output_od_get()
376 	u32 reg_off, reg;  in sppctl_gpio_output_od_set()  local
378 	reg = sppctl_prep_moon_reg_and_offset(offset, &reg_off, val);  in sppctl_gpio_output_od_set()
379 	sppctl_gpio_od_writel(spp_gchip, reg, reg_off);  in sppctl_gpio_output_od_set()
385 	u32 reg_off, bit_off, reg;  in sppctl_gpio_get_direction()  local
387 	bit_off = sppctl_get_moon_reg_and_bit_offset(offset, &reg_off);  in sppctl_gpio_get_direction()
388 	reg = sppctl_gpio_oe_readl(spp_gchip, reg_off);  in sppctl_gpio_get_direction()
396 	u32 reg_off, bit_off, reg;  in sppctl_gpio_inv_get()  local
399 	bit_off = sppctl_get_moon_reg_and_bit_offset(offset, &reg_off);  in sppctl_gpio_inv_get()
404 		reg = sppctl_gpio_iinv_readl(spp_gchip, reg_off);  in sppctl_gpio_inv_get()
406 		reg = sppctl_gpio_oinv_readl(spp_gchip, reg_off);  in sppctl_gpio_inv_get()
417 	u32 reg_off, reg;  in sppctl_gpio_direction_input()  local
419 	reg = sppctl_prep_moon_reg_and_offset(offset, &reg_off, 0);  in sppctl_gpio_direction_input()
423 	sppctl_gpio_oe_writel(spp_gchip, reg, reg_off);  in sppctl_gpio_direction_input()
433 	u32 reg_off, reg;  in sppctl_gpio_direction_output()  local
435 	reg = sppctl_prep_moon_reg_and_offset(offset, &reg_off, 1);  in sppctl_gpio_direction_output()
439 	sppctl_gpio_oe_writel(spp_gchip, reg, reg_off);  in sppctl_gpio_direction_output()
446 	reg = sppctl_prep_moon_reg_and_offset(offset, &reg_off, val);  in sppctl_gpio_direction_output()
447 	sppctl_gpio_out_writel(spp_gchip, reg, reg_off);  in sppctl_gpio_direction_output()
456 	u32 reg_off, bit_off, reg;  in sppctl_gpio_get()  local
458 	bit_off = sppctl_get_reg_and_bit_offset(offset, &reg_off);  in sppctl_gpio_get()
459 	reg = sppctl_gpio_in_readl(spp_gchip, reg_off);  in sppctl_gpio_get()
467 	u32 reg_off, reg;  in sppctl_gpio_set()  local
469 	reg = sppctl_prep_moon_reg_and_offset(offset, &reg_off, val);  in sppctl_gpio_set()
470 	sppctl_gpio_out_writel(spp_gchip, reg, reg_off);  in sppctl_gpio_set()
478 	u32 reg_off, reg;  in sppctl_gpio_set_config()  local
482 		reg = sppctl_prep_moon_reg_and_offset(offset, &reg_off, 1);  in sppctl_gpio_set_config()
483 		sppctl_gpio_od_writel(spp_gchip, reg, reg_off);  in sppctl_gpio_set_config()