Lines Matching refs:pwr_ctrl
21 struct power_table_control *pwr_ctrl = &config_store.mode_set[idx].power_control; in amd_pmf_set_automode() local
23 amd_pmf_send_cmd(dev, SET_SPL, false, pwr_ctrl->spl, NULL); in amd_pmf_set_automode()
24 amd_pmf_send_cmd(dev, SET_FPPT, false, pwr_ctrl->fppt, NULL); in amd_pmf_set_automode()
25 amd_pmf_send_cmd(dev, SET_SPPT, false, pwr_ctrl->sppt, NULL); in amd_pmf_set_automode()
26 amd_pmf_send_cmd(dev, SET_SPPT_APU_ONLY, false, pwr_ctrl->sppt_apu_only, NULL); in amd_pmf_set_automode()
27 amd_pmf_send_cmd(dev, SET_STT_MIN_LIMIT, false, pwr_ctrl->stt_min, NULL); in amd_pmf_set_automode()
29 pwr_ctrl->stt_skin_temp[STT_TEMP_APU], NULL); in amd_pmf_set_automode()
31 pwr_ctrl->stt_skin_temp[STT_TEMP_HS2], NULL); in amd_pmf_set_automode()
164 struct power_table_control *pwr_ctrl; in amd_pmf_load_defaults_auto_mode() local
198 pwr_ctrl = &config_store.mode_set[AUTO_QUIET].power_control; in amd_pmf_load_defaults_auto_mode()
199 pwr_ctrl->spl = output.spl_quiet; in amd_pmf_load_defaults_auto_mode()
200 pwr_ctrl->sppt = output.sppt_quiet; in amd_pmf_load_defaults_auto_mode()
201 pwr_ctrl->fppt = output.fppt_quiet; in amd_pmf_load_defaults_auto_mode()
202 pwr_ctrl->sppt_apu_only = output.sppt_apu_only_quiet; in amd_pmf_load_defaults_auto_mode()
203 pwr_ctrl->stt_min = output.stt_min_limit_quiet; in amd_pmf_load_defaults_auto_mode()
204 pwr_ctrl->stt_skin_temp[STT_TEMP_APU] = output.stt_apu_quiet; in amd_pmf_load_defaults_auto_mode()
205 pwr_ctrl->stt_skin_temp[STT_TEMP_HS2] = output.stt_hs2_quiet; in amd_pmf_load_defaults_auto_mode()
207 pwr_ctrl = &config_store.mode_set[AUTO_BALANCE].power_control; in amd_pmf_load_defaults_auto_mode()
208 pwr_ctrl->spl = output.spl_balanced; in amd_pmf_load_defaults_auto_mode()
209 pwr_ctrl->sppt = output.sppt_balanced; in amd_pmf_load_defaults_auto_mode()
210 pwr_ctrl->fppt = output.fppt_balanced; in amd_pmf_load_defaults_auto_mode()
211 pwr_ctrl->sppt_apu_only = output.sppt_apu_only_balanced; in amd_pmf_load_defaults_auto_mode()
212 pwr_ctrl->stt_min = output.stt_min_limit_balanced; in amd_pmf_load_defaults_auto_mode()
213 pwr_ctrl->stt_skin_temp[STT_TEMP_APU] = output.stt_apu_balanced; in amd_pmf_load_defaults_auto_mode()
214 pwr_ctrl->stt_skin_temp[STT_TEMP_HS2] = output.stt_hs2_balanced; in amd_pmf_load_defaults_auto_mode()
216 pwr_ctrl = &config_store.mode_set[AUTO_PERFORMANCE].power_control; in amd_pmf_load_defaults_auto_mode()
217 pwr_ctrl->spl = output.spl_perf; in amd_pmf_load_defaults_auto_mode()
218 pwr_ctrl->sppt = output.sppt_perf; in amd_pmf_load_defaults_auto_mode()
219 pwr_ctrl->fppt = output.fppt_perf; in amd_pmf_load_defaults_auto_mode()
220 pwr_ctrl->sppt_apu_only = output.sppt_apu_only_perf; in amd_pmf_load_defaults_auto_mode()
221 pwr_ctrl->stt_min = output.stt_min_limit_perf; in amd_pmf_load_defaults_auto_mode()
222 pwr_ctrl->stt_skin_temp[STT_TEMP_APU] = output.stt_apu_perf; in amd_pmf_load_defaults_auto_mode()
223 pwr_ctrl->stt_skin_temp[STT_TEMP_HS2] = output.stt_hs2_perf; in amd_pmf_load_defaults_auto_mode()
225 pwr_ctrl = &config_store.mode_set[AUTO_PERFORMANCE_ON_LAP].power_control; in amd_pmf_load_defaults_auto_mode()
226 pwr_ctrl->spl = output.spl_perf_on_lap; in amd_pmf_load_defaults_auto_mode()
227 pwr_ctrl->sppt = output.sppt_perf_on_lap; in amd_pmf_load_defaults_auto_mode()
228 pwr_ctrl->fppt = output.fppt_perf_on_lap; in amd_pmf_load_defaults_auto_mode()
229 pwr_ctrl->sppt_apu_only = output.sppt_apu_only_perf_on_lap; in amd_pmf_load_defaults_auto_mode()
230 pwr_ctrl->stt_min = output.stt_min_limit_perf_on_lap; in amd_pmf_load_defaults_auto_mode()
231 pwr_ctrl->stt_skin_temp[STT_TEMP_APU] = output.stt_apu_perf_on_lap; in amd_pmf_load_defaults_auto_mode()
232 pwr_ctrl->stt_skin_temp[STT_TEMP_HS2] = output.stt_hs2_perf_on_lap; in amd_pmf_load_defaults_auto_mode()