Lines Matching refs:outpw
80 #define outpw(port, word) outw((word), (port)) macro
809 #define AscSetChipCfgLsw(port, data) outpw((port)+IOP_CONFIG_LOW, data)
810 #define AscSetChipCfgMsw(port, data) outpw((port)+IOP_CONFIG_HIGH, data)
814 #define AscSetChipEEPData(port, data) outpw((port)+IOP_EEP_DATA, data)
816 #define AscSetChipLramAddr(port, addr) outpw((PortAddr)((port)+IOP_RAM_ADDR), addr)
818 #define AscSetChipLramData(port, data) outpw((port)+IOP_RAM_DATA, data)
822 #define AscSetChipStatus(port, cs_val) outpw((port)+IOP_STATUS, cs_val)
827 #define AscSetPCAddr(port, data) outpw((port)+IOP_REG_PC, data)
834 #define AscWriteChipAX(port, data) outpw((port)+IOP_REG_AX, data)
838 #define AscWriteChipIH(port, data) outpw((port)+IOP_REG_IH, data)
842 #define AscWriteChipFIFO_L(port, data) outpw((port)+IOP_REG_FIFO_L, data)
844 #define AscWriteChipFIFO_H(port, data) outpw((port)+IOP_REG_FIFO_H, data)
848 #define AscWriteChipDA0(port) outpw((port)+IOP_REG_DA0, data)
850 #define AscWriteChipDA1(port) outpw((port)+IOP_REG_DA1, data)
852 #define AscWriteChipDC0(port) outpw((port)+IOP_REG_DC0, data)
854 #define AscWriteChipDC1(port) outpw((port)+IOP_REG_DC1, data)
3806 outpw(iop_base + IOP_RAM_DATA, in AscMemWordCopyPtrToLram()
3825 outpw(iop_base + IOP_RAM_DATA, ((ushort)s_buffer[i + 1] << 8) | s_buffer[i]); /* LSW */ in AscMemDWordCopyPtrToLram()
3826 outpw(iop_base + IOP_RAM_DATA, ((ushort)s_buffer[i + 3] << 8) | s_buffer[i + 2]); /* MSW */ in AscMemDWordCopyPtrToLram()
7866 outpw(iop_base + IOP_RAM_DATA, in DvcPutScsiQ()