Lines Matching refs:dev_spec
999 if ((tgtdev->dev_spec.pcie_inf.dev_info & in mpi3mr_update_sdev()
1003 tgtdev->dev_spec.pcie_inf.mdts / 512); in mpi3mr_update_sdev()
1004 if (tgtdev->dev_spec.pcie_inf.pgsz == 0) in mpi3mr_update_sdev()
1009 ((1 << tgtdev->dev_spec.pcie_inf.pgsz) - 1)); in mpi3mr_update_sdev()
1130 tgtdev->dev_spec.sas_sata_inf.dev_info = dev_info; in mpi3mr_update_tgtdev()
1131 tgtdev->dev_spec.sas_sata_inf.sas_address = in mpi3mr_update_tgtdev()
1133 tgtdev->dev_spec.sas_sata_inf.phy_id = sasinf->phy_num; in mpi3mr_update_tgtdev()
1134 tgtdev->dev_spec.sas_sata_inf.attached_phy_id = in mpi3mr_update_tgtdev()
1149 if (tgtdev->dev_spec.sas_sata_inf.hba_port) in mpi3mr_update_tgtdev()
1150 tgtdev->dev_spec.sas_sata_inf.hba_port->port_id = in mpi3mr_update_tgtdev()
1160 tgtdev->dev_spec.pcie_inf.dev_info = dev_info; in mpi3mr_update_tgtdev()
1161 tgtdev->dev_spec.pcie_inf.capb = in mpi3mr_update_tgtdev()
1163 tgtdev->dev_spec.pcie_inf.mdts = MPI3MR_DEFAULT_MDTS; in mpi3mr_update_tgtdev()
1165 tgtdev->dev_spec.pcie_inf.pgsz = 12; in mpi3mr_update_tgtdev()
1167 tgtdev->dev_spec.pcie_inf.mdts = in mpi3mr_update_tgtdev()
1169 tgtdev->dev_spec.pcie_inf.pgsz = pcieinf->page_size; in mpi3mr_update_tgtdev()
1170 tgtdev->dev_spec.pcie_inf.reset_to = in mpi3mr_update_tgtdev()
1173 tgtdev->dev_spec.pcie_inf.abort_to = in mpi3mr_update_tgtdev()
1177 if (tgtdev->dev_spec.pcie_inf.mdts > (1024 * 1024)) in mpi3mr_update_tgtdev()
1178 tgtdev->dev_spec.pcie_inf.mdts = (1024 * 1024); in mpi3mr_update_tgtdev()
1205 tgtdev->dev_spec.vd_inf.state = vdinf->vd_state; in mpi3mr_update_tgtdev()
1209 tgtdev->dev_spec.vd_inf.tg_id = vdinf_io_throttle_group; in mpi3mr_update_tgtdev()
1210 tgtdev->dev_spec.vd_inf.tg_high = in mpi3mr_update_tgtdev()
1212 tgtdev->dev_spec.vd_inf.tg_low = in mpi3mr_update_tgtdev()
1217 tg->high = tgtdev->dev_spec.vd_inf.tg_high; in mpi3mr_update_tgtdev()
1218 tg->low = tgtdev->dev_spec.vd_inf.tg_low; in mpi3mr_update_tgtdev()
1220 tgtdev->dev_spec.vd_inf.tg_qd_reduction; in mpi3mr_update_tgtdev()
1225 tgtdev->dev_spec.vd_inf.tg = tg; in mpi3mr_update_tgtdev()
3646 if (cmd_priv && tgtdev->dev_spec.pcie_inf.abort_to) in mpi3mr_issue_tm()
3647 timeout = tgtdev->dev_spec.pcie_inf.abort_to; in mpi3mr_issue_tm()
3648 else if (!cmd_priv && tgtdev->dev_spec.pcie_inf.reset_to) in mpi3mr_issue_tm()
3649 timeout = tgtdev->dev_spec.pcie_inf.reset_to; in mpi3mr_issue_tm()
4306 if ((tgt_dev->dev_spec.pcie_inf.dev_info & in mpi3mr_slave_configure()
4310 tgt_dev->dev_spec.pcie_inf.mdts / 512); in mpi3mr_slave_configure()
4311 if (tgt_dev->dev_spec.pcie_inf.pgsz == 0) in mpi3mr_slave_configure()
4316 ((1 << tgt_dev->dev_spec.pcie_inf.pgsz) - 1)); in mpi3mr_slave_configure()
4445 tgt_dev->dev_spec.vd_inf.tg; in mpi3mr_target_alloc()