Lines Matching refs:chip_info
1617 struct pl022_config_chip const *chip_info) in verify_controller_parameters() argument
1619 if ((chip_info->iface < SSP_INTERFACE_MOTOROLA_SPI) in verify_controller_parameters()
1620 || (chip_info->iface > SSP_INTERFACE_UNIDIRECTIONAL)) { in verify_controller_parameters()
1625 if ((chip_info->iface == SSP_INTERFACE_UNIDIRECTIONAL) && in verify_controller_parameters()
1632 if ((chip_info->hierarchy != SSP_MASTER) in verify_controller_parameters()
1633 && (chip_info->hierarchy != SSP_SLAVE)) { in verify_controller_parameters()
1638 if ((chip_info->com_mode != INTERRUPT_TRANSFER) in verify_controller_parameters()
1639 && (chip_info->com_mode != DMA_TRANSFER) in verify_controller_parameters()
1640 && (chip_info->com_mode != POLLING_TRANSFER)) { in verify_controller_parameters()
1645 switch (chip_info->rx_lev_trig) { in verify_controller_parameters()
1670 switch (chip_info->tx_lev_trig) { in verify_controller_parameters()
1695 if (chip_info->iface == SSP_INTERFACE_NATIONAL_MICROWIRE) { in verify_controller_parameters()
1696 if ((chip_info->ctrl_len < SSP_BITS_4) in verify_controller_parameters()
1697 || (chip_info->ctrl_len > SSP_BITS_32)) { in verify_controller_parameters()
1702 if ((chip_info->wait_state != SSP_MWIRE_WAIT_ZERO) in verify_controller_parameters()
1703 && (chip_info->wait_state != SSP_MWIRE_WAIT_ONE)) { in verify_controller_parameters()
1710 if ((chip_info->duplex != in verify_controller_parameters()
1712 && (chip_info->duplex != in verify_controller_parameters()
1719 if (chip_info->duplex != SSP_MICROWIRE_CHANNEL_FULL_DUPLEX) { in verify_controller_parameters()
1842 struct pl022_config_chip const *chip_info; in pl022_setup() local
1867 chip_info = spi->controller_data; in pl022_setup()
1869 if (chip_info == NULL) { in pl022_setup()
1889 chip_info = &chip_info_dt; in pl022_setup()
1891 chip_info = &pl022_default_chip_info; in pl022_setup()
1904 if ((0 == chip_info->clk_freq.cpsdvsr) in pl022_setup()
1905 && (0 == chip_info->clk_freq.scr)) { in pl022_setup()
1912 memcpy(&clk_freq, &chip_info->clk_freq, sizeof(clk_freq)); in pl022_setup()
1925 status = verify_controller_parameters(pl022, chip_info); in pl022_setup()
1931 pl022->rx_lev_trig = chip_info->rx_lev_trig; in pl022_setup()
1932 pl022->tx_lev_trig = chip_info->tx_lev_trig; in pl022_setup()
1935 chip->xfer_type = chip_info->com_mode; in pl022_setup()
1966 if ((chip_info->com_mode == DMA_TRANSFER) in pl022_setup()
1991 SSP_WRITE_BITS(chip->cr1, chip_info->clkdelay, in pl022_setup()
1995 SSP_WRITE_BITS(chip->cr0, chip_info->duplex, in pl022_setup()
1997 SSP_WRITE_BITS(chip->cr0, chip_info->ctrl_len, in pl022_setup()
1999 SSP_WRITE_BITS(chip->cr0, chip_info->iface, in pl022_setup()
2001 SSP_WRITE_BITS(chip->cr1, chip_info->wait_state, in pl022_setup()
2016 SSP_WRITE_BITS(chip->cr1, chip_info->rx_lev_trig, in pl022_setup()
2018 SSP_WRITE_BITS(chip->cr1, chip_info->tx_lev_trig, in pl022_setup()
2023 SSP_WRITE_BITS(chip->cr0, chip_info->iface, in pl022_setup()
2050 SSP_WRITE_BITS(chip->cr1, chip_info->hierarchy, SSP_CR1_MASK_MS, 2); in pl022_setup()
2051 SSP_WRITE_BITS(chip->cr1, chip_info->slave_tx_disable, SSP_CR1_MASK_SOD, in pl022_setup()