Lines Matching refs:REG_CR
65 REG_CR, enumerator
93 [REG_CR] = UART011_CR,
181 [REG_CR] = UART011_CR,
1312 cr = pl011_read(uap, REG_CR); in pl011_rs485_tx_stop()
1322 pl011_write(cr, uap, REG_CR); in pl011_rs485_tx_stop()
1443 cr = pl011_read(uap, REG_CR); in pl011_rs485_tx_start()
1455 pl011_write(cr, uap, REG_CR); in pl011_rs485_tx_start()
1629 cr = pl011_read(uap, REG_CR); in pl011_set_mctrl()
1649 pl011_write(cr, uap, REG_CR); in pl011_set_mctrl()
1865 cr = pl011_read(uap, REG_CR); in pl011_startup()
1872 pl011_write(cr, uap, REG_CR); in pl011_startup()
1936 cr = pl011_read(uap, REG_CR); in pl011_disable_uart()
1939 pl011_write(cr, uap, REG_CR); in pl011_disable_uart()
2126 old_cr = pl011_read(uap, REG_CR); in pl011_set_termios()
2169 pl011_write(old_cr, uap, REG_CR); in pl011_set_termios()
2239 u32 cr = pl011_read(uap, REG_CR); in pl011_rs485_config()
2242 pl011_write(cr, uap, REG_CR); in pl011_rs485_config()
2339 old_cr = pl011_read(uap, REG_CR); in pl011_console_write()
2342 pl011_write(new_cr, uap, REG_CR); in pl011_console_write()
2356 pl011_write(old_cr, uap, REG_CR); in pl011_console_write()
2368 if (pl011_read(uap, REG_CR) & UART01x_CR_UARTEN) { in pl011_console_get_options()
2392 if (pl011_read(uap, REG_CR) in pl011_console_get_options()