Lines Matching refs:hba
86 void ufshcd_mcq_config_mac(struct ufs_hba *hba, u32 max_active_cmds) in ufshcd_mcq_config_mac() argument
90 val = ufshcd_readl(hba, REG_UFS_MCQ_CFG); in ufshcd_mcq_config_mac()
93 ufshcd_writel(hba, val, REG_UFS_MCQ_CFG); in ufshcd_mcq_config_mac()
105 struct ufs_hw_queue *ufshcd_mcq_req_to_hwq(struct ufs_hba *hba, in ufshcd_mcq_req_to_hwq() argument
112 return &hba->uhq[hwq + UFSHCD_MCQ_IO_QUEUE_OFFSET]; in ufshcd_mcq_req_to_hwq()
127 int ufshcd_mcq_decide_queue_depth(struct ufs_hba *hba) in ufshcd_mcq_decide_queue_depth() argument
132 mac = ufshcd_mcq_vops_get_hba_mac(hba); in ufshcd_mcq_decide_queue_depth()
134 dev_err(hba->dev, "Failed to get mac, err=%d\n", mac); in ufshcd_mcq_decide_queue_depth()
138 WARN_ON_ONCE(!hba->dev_info.bqueuedepth); in ufshcd_mcq_decide_queue_depth()
144 return min_t(int, mac, hba->dev_info.bqueuedepth); in ufshcd_mcq_decide_queue_depth()
147 static int ufshcd_mcq_config_nr_queues(struct ufs_hba *hba) in ufshcd_mcq_config_nr_queues() argument
151 struct Scsi_Host *host = hba->host; in ufshcd_mcq_config_nr_queues()
153 hba_maxq = FIELD_GET(MAX_QUEUE_SUP, hba->mcq_capabilities); in ufshcd_mcq_config_nr_queues()
159 dev_err(hba->dev, "Total queues (%d) exceeds HC capacity (%d)\n", in ufshcd_mcq_config_nr_queues()
167 hba->nr_queues[HCTX_TYPE_DEFAULT] = rw_queues; in ufshcd_mcq_config_nr_queues()
168 rem -= hba->nr_queues[HCTX_TYPE_DEFAULT]; in ufshcd_mcq_config_nr_queues()
174 hba->nr_queues[HCTX_TYPE_POLL] = poll_queues; in ufshcd_mcq_config_nr_queues()
175 rem -= hba->nr_queues[HCTX_TYPE_POLL]; in ufshcd_mcq_config_nr_queues()
179 hba->nr_queues[HCTX_TYPE_READ] = read_queues; in ufshcd_mcq_config_nr_queues()
180 rem -= hba->nr_queues[HCTX_TYPE_READ]; in ufshcd_mcq_config_nr_queues()
183 if (!hba->nr_queues[HCTX_TYPE_DEFAULT]) in ufshcd_mcq_config_nr_queues()
184 hba->nr_queues[HCTX_TYPE_DEFAULT] = min3(rem, rw_queues, in ufshcd_mcq_config_nr_queues()
188 host->nr_hw_queues += hba->nr_queues[i]; in ufshcd_mcq_config_nr_queues()
190 hba->nr_hw_queues = host->nr_hw_queues + UFS_MCQ_NUM_DEV_CMD_QUEUES; in ufshcd_mcq_config_nr_queues()
194 int ufshcd_mcq_memory_alloc(struct ufs_hba *hba) in ufshcd_mcq_memory_alloc() argument
200 for (i = 0; i < hba->nr_hw_queues; i++) { in ufshcd_mcq_memory_alloc()
201 hwq = &hba->uhq[i]; in ufshcd_mcq_memory_alloc()
205 hwq->sqe_base_addr = dmam_alloc_coherent(hba->dev, utrdl_size, in ufshcd_mcq_memory_alloc()
209 dev_err(hba->dev, "SQE allocation failed\n"); in ufshcd_mcq_memory_alloc()
214 hwq->cqe_base_addr = dmam_alloc_coherent(hba->dev, cqe_size, in ufshcd_mcq_memory_alloc()
218 dev_err(hba->dev, "CQE allocation failed\n"); in ufshcd_mcq_memory_alloc()
230 (hba->mcq_opr[(p)].offset + hba->mcq_opr[(p)].stride * (i))
232 static void __iomem *mcq_opr_base(struct ufs_hba *hba, in mcq_opr_base() argument
235 struct ufshcd_mcq_opr_info_t *opr = &hba->mcq_opr[n]; in mcq_opr_base()
240 u32 ufshcd_mcq_read_cqis(struct ufs_hba *hba, int i) in ufshcd_mcq_read_cqis() argument
242 return readl(mcq_opr_base(hba, OPR_CQIS, i) + REG_CQIS); in ufshcd_mcq_read_cqis()
245 void ufshcd_mcq_write_cqis(struct ufs_hba *hba, u32 val, int i) in ufshcd_mcq_write_cqis() argument
247 writel(val, mcq_opr_base(hba, OPR_CQIS, i) + REG_CQIS); in ufshcd_mcq_write_cqis()
255 static int ufshcd_mcq_get_tag(struct ufs_hba *hba, in ufshcd_mcq_get_tag() argument
266 hba->ucdl_dma_addr; in ufshcd_mcq_get_tag()
271 static void ufshcd_mcq_process_cqe(struct ufs_hba *hba, in ufshcd_mcq_process_cqe() argument
275 int tag = ufshcd_mcq_get_tag(hba, hwq, cqe); in ufshcd_mcq_process_cqe()
277 ufshcd_compl_one_cqe(hba, tag, cqe); in ufshcd_mcq_process_cqe()
280 unsigned long ufshcd_mcq_poll_cqe_nolock(struct ufs_hba *hba, in ufshcd_mcq_poll_cqe_nolock() argument
287 ufshcd_mcq_process_cqe(hba, hwq); in ufshcd_mcq_poll_cqe_nolock()
299 unsigned long ufshcd_mcq_poll_cqe_lock(struct ufs_hba *hba, in ufshcd_mcq_poll_cqe_lock() argument
305 completed_reqs = ufshcd_mcq_poll_cqe_nolock(hba, hwq); in ufshcd_mcq_poll_cqe_lock()
311 void ufshcd_mcq_make_queues_operational(struct ufs_hba *hba) in ufshcd_mcq_make_queues_operational() argument
317 for (i = 0; i < hba->nr_hw_queues; i++) { in ufshcd_mcq_make_queues_operational()
318 hwq = &hba->uhq[i]; in ufshcd_mcq_make_queues_operational()
323 ufsmcq_writelx(hba, lower_32_bits(hwq->sqe_dma_addr), in ufshcd_mcq_make_queues_operational()
326 ufsmcq_writelx(hba, upper_32_bits(hwq->sqe_dma_addr), in ufshcd_mcq_make_queues_operational()
329 ufsmcq_writelx(hba, MCQ_OPR_OFFSET_n(OPR_SQD, i), in ufshcd_mcq_make_queues_operational()
332 ufsmcq_writelx(hba, MCQ_OPR_OFFSET_n(OPR_SQIS, i), in ufshcd_mcq_make_queues_operational()
336 ufsmcq_writelx(hba, lower_32_bits(hwq->cqe_dma_addr), in ufshcd_mcq_make_queues_operational()
339 ufsmcq_writelx(hba, upper_32_bits(hwq->cqe_dma_addr), in ufshcd_mcq_make_queues_operational()
342 ufsmcq_writelx(hba, MCQ_OPR_OFFSET_n(OPR_CQD, i), in ufshcd_mcq_make_queues_operational()
345 ufsmcq_writelx(hba, MCQ_OPR_OFFSET_n(OPR_CQIS, i), in ufshcd_mcq_make_queues_operational()
349 hwq->mcq_sq_head = mcq_opr_base(hba, OPR_SQD, i) + REG_SQHP; in ufshcd_mcq_make_queues_operational()
350 hwq->mcq_sq_tail = mcq_opr_base(hba, OPR_SQD, i) + REG_SQTP; in ufshcd_mcq_make_queues_operational()
351 hwq->mcq_cq_head = mcq_opr_base(hba, OPR_CQD, i) + REG_CQHP; in ufshcd_mcq_make_queues_operational()
352 hwq->mcq_cq_tail = mcq_opr_base(hba, OPR_CQD, i) + REG_CQTP; in ufshcd_mcq_make_queues_operational()
358 if (i < hba->nr_hw_queues - hba->nr_queues[HCTX_TYPE_POLL]) in ufshcd_mcq_make_queues_operational()
359 writel(1, mcq_opr_base(hba, OPR_CQIS, i) + REG_CQIE); in ufshcd_mcq_make_queues_operational()
362 ufsmcq_writel(hba, (1 << QUEUE_EN_OFFSET) | qsize, in ufshcd_mcq_make_queues_operational()
369 ufsmcq_writel(hba, (1 << QUEUE_EN_OFFSET) | qsize | in ufshcd_mcq_make_queues_operational()
375 void ufshcd_mcq_enable_esi(struct ufs_hba *hba) in ufshcd_mcq_enable_esi() argument
377 ufshcd_writel(hba, ufshcd_readl(hba, REG_UFS_MEM_CFG) | 0x2, in ufshcd_mcq_enable_esi()
382 void ufshcd_mcq_config_esi(struct ufs_hba *hba, struct msi_msg *msg) in ufshcd_mcq_config_esi() argument
384 ufshcd_writel(hba, msg->address_lo, REG_UFS_ESILBA); in ufshcd_mcq_config_esi()
385 ufshcd_writel(hba, msg->address_hi, REG_UFS_ESIUBA); in ufshcd_mcq_config_esi()
389 int ufshcd_mcq_init(struct ufs_hba *hba) in ufshcd_mcq_init() argument
391 struct Scsi_Host *host = hba->host; in ufshcd_mcq_init()
395 ret = ufshcd_mcq_config_nr_queues(hba); in ufshcd_mcq_init()
399 ret = ufshcd_vops_mcq_config_resource(hba); in ufshcd_mcq_init()
403 ret = ufshcd_mcq_vops_op_runtime_config(hba); in ufshcd_mcq_init()
405 dev_err(hba->dev, "Operation runtime config failed, ret=%d\n", in ufshcd_mcq_init()
409 hba->uhq = devm_kzalloc(hba->dev, in ufshcd_mcq_init()
410 hba->nr_hw_queues * sizeof(struct ufs_hw_queue), in ufshcd_mcq_init()
412 if (!hba->uhq) { in ufshcd_mcq_init()
413 dev_err(hba->dev, "ufs hw queue memory allocation failed\n"); in ufshcd_mcq_init()
417 for (i = 0; i < hba->nr_hw_queues; i++) { in ufshcd_mcq_init()
418 hwq = &hba->uhq[i]; in ufshcd_mcq_init()
419 hwq->max_entries = hba->nutrs; in ufshcd_mcq_init()
425 hba->dev_cmd_queue = &hba->uhq[0]; in ufshcd_mcq_init()
427 hba->dev_cmd_queue->max_entries = MAX_DEV_CMD_ENTRIES; in ufshcd_mcq_init()