Lines Matching refs:ep0state
315 enum usbf_ep0state ep0state; member
1805 ep0->udc->ep0state = EP0_IDLE; in usbf_ep0_enable()
1939 if (ep0->udc->ep0state == EP0_IN_STATUS_START_PHASE) in usbf_ep0_queue()
1945 if (ep0->udc->ep0state == EP0_IN_STATUS_PHASE) { in usbf_ep0_queue()
2071 ep->udc->ep0state = EP0_IDLE; in usbf_ep_dequeue()
2477 udc->ep0state = EP0_IN_DATA_PHASE; in usbf_handle_ep0_setup()
2483 udc->ep0state = EP0_OUT_DATA_PHASE; in usbf_handle_ep0_setup()
2489 udc->ep0state = EP0_IN_STATUS_START_PHASE; in usbf_handle_ep0_setup()
2552 udc->ep0state = next_ep0state; in usbf_handle_ep0_data_status()
2584 udc->ep0state = EP0_OUT_STATUS_PHASE; in usbf_handle_ep0_out_status_start()
2605 udc->ep0state = EP0_IN_STATUS_PHASE; in usbf_handle_ep0_in_status_start()
2626 udc->ep0state = EP0_IN_STATUS_END_PHASE; in usbf_handle_ep0_in_status_start()
2630 udc->ep0state = EP0_IN_STATUS_PHASE; in usbf_handle_ep0_in_status_start()
2655 dev_dbg(ep0->udc->dev, "udc->ep0state=%d\n", udc->ep0state); in usbf_ep0_interrupt()
2658 prev_ep0state = udc->ep0state; in usbf_ep0_interrupt()
2659 switch (udc->ep0state) { in usbf_ep0_interrupt()
2705 udc->ep0state = EP0_IDLE; in usbf_ep0_interrupt()
2743 udc->ep0state = EP0_IDLE; in usbf_ep0_interrupt()
2747 udc->ep0state = EP0_IDLE; in usbf_ep0_interrupt()
2762 udc->ep0state = EP0_IDLE; in usbf_ep0_interrupt()
2766 } while ((prev_ep0state != udc->ep0state) || (prev_sts != sts)); in usbf_ep0_interrupt()
2769 udc->ep0state, sts, in usbf_ep0_interrupt()