Lines Matching refs:maxpacket
1274 { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, },
1275 { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, },
1276 { .hw_ep_num = 2, .style = FIFO_RXTX, .maxpacket = 512, },
1277 { .hw_ep_num = 3, .style = FIFO_RXTX, .maxpacket = 256, },
1278 { .hw_ep_num = 4, .style = FIFO_RXTX, .maxpacket = 256, },
1283 { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, .mode = BUF_DOUBLE, },
1284 { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, .mode = BUF_DOUBLE, },
1285 { .hw_ep_num = 2, .style = FIFO_RXTX, .maxpacket = 512, .mode = BUF_DOUBLE, },
1286 { .hw_ep_num = 3, .style = FIFO_RXTX, .maxpacket = 256, },
1287 { .hw_ep_num = 4, .style = FIFO_RXTX, .maxpacket = 256, },
1292 { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, },
1293 { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, },
1294 { .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, },
1295 { .hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, },
1296 { .hw_ep_num = 3, .style = FIFO_RXTX, .maxpacket = 960, },
1297 { .hw_ep_num = 4, .style = FIFO_RXTX, .maxpacket = 1024, },
1302 { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, .mode = BUF_DOUBLE, },
1303 { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, .mode = BUF_DOUBLE, },
1304 { .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, },
1305 { .hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, },
1306 { .hw_ep_num = 3, .style = FIFO_RXTX, .maxpacket = 256, },
1307 { .hw_ep_num = 4, .style = FIFO_RXTX, .maxpacket = 256, },
1312 { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, },
1313 { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, },
1314 { .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, },
1315 { .hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, },
1316 { .hw_ep_num = 3, .style = FIFO_TX, .maxpacket = 512, },
1317 { .hw_ep_num = 3, .style = FIFO_RX, .maxpacket = 512, },
1318 { .hw_ep_num = 4, .style = FIFO_TX, .maxpacket = 512, },
1319 { .hw_ep_num = 4, .style = FIFO_RX, .maxpacket = 512, },
1320 { .hw_ep_num = 5, .style = FIFO_TX, .maxpacket = 512, },
1321 { .hw_ep_num = 5, .style = FIFO_RX, .maxpacket = 512, },
1322 { .hw_ep_num = 6, .style = FIFO_TX, .maxpacket = 512, },
1323 { .hw_ep_num = 6, .style = FIFO_RX, .maxpacket = 512, },
1324 { .hw_ep_num = 7, .style = FIFO_TX, .maxpacket = 512, },
1325 { .hw_ep_num = 7, .style = FIFO_RX, .maxpacket = 512, },
1326 { .hw_ep_num = 8, .style = FIFO_TX, .maxpacket = 512, },
1327 { .hw_ep_num = 8, .style = FIFO_RX, .maxpacket = 512, },
1328 { .hw_ep_num = 9, .style = FIFO_TX, .maxpacket = 512, },
1329 { .hw_ep_num = 9, .style = FIFO_RX, .maxpacket = 512, },
1330 { .hw_ep_num = 10, .style = FIFO_TX, .maxpacket = 256, },
1331 { .hw_ep_num = 10, .style = FIFO_RX, .maxpacket = 64, },
1332 { .hw_ep_num = 11, .style = FIFO_TX, .maxpacket = 256, },
1333 { .hw_ep_num = 11, .style = FIFO_RX, .maxpacket = 64, },
1334 { .hw_ep_num = 12, .style = FIFO_TX, .maxpacket = 256, },
1335 { .hw_ep_num = 12, .style = FIFO_RX, .maxpacket = 64, },
1336 { .hw_ep_num = 13, .style = FIFO_RXTX, .maxpacket = 4096, },
1337 { .hw_ep_num = 14, .style = FIFO_RXTX, .maxpacket = 1024, },
1338 { .hw_ep_num = 15, .style = FIFO_RXTX, .maxpacket = 1024, },
1343 { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, },
1344 { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, },
1345 { .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, },
1346 { .hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, },
1347 { .hw_ep_num = 3, .style = FIFO_TX, .maxpacket = 512, },
1348 { .hw_ep_num = 3, .style = FIFO_RX, .maxpacket = 512, },
1349 { .hw_ep_num = 4, .style = FIFO_TX, .maxpacket = 512, },
1350 { .hw_ep_num = 4, .style = FIFO_RX, .maxpacket = 512, },
1351 { .hw_ep_num = 5, .style = FIFO_TX, .maxpacket = 512, },
1352 { .hw_ep_num = 5, .style = FIFO_RX, .maxpacket = 512, },
1353 { .hw_ep_num = 6, .style = FIFO_TX, .maxpacket = 32, },
1354 { .hw_ep_num = 6, .style = FIFO_RX, .maxpacket = 32, },
1355 { .hw_ep_num = 7, .style = FIFO_TX, .maxpacket = 32, },
1356 { .hw_ep_num = 7, .style = FIFO_RX, .maxpacket = 32, },
1357 { .hw_ep_num = 8, .style = FIFO_TX, .maxpacket = 32, },
1358 { .hw_ep_num = 8, .style = FIFO_RX, .maxpacket = 32, },
1359 { .hw_ep_num = 9, .style = FIFO_TX, .maxpacket = 32, },
1360 { .hw_ep_num = 9, .style = FIFO_RX, .maxpacket = 32, },
1361 { .hw_ep_num = 10, .style = FIFO_TX, .maxpacket = 32, },
1362 { .hw_ep_num = 10, .style = FIFO_RX, .maxpacket = 32, },
1363 { .hw_ep_num = 11, .style = FIFO_TX, .maxpacket = 32, },
1364 { .hw_ep_num = 11, .style = FIFO_RX, .maxpacket = 32, },
1365 { .hw_ep_num = 12, .style = FIFO_TX, .maxpacket = 32, },
1366 { .hw_ep_num = 12, .style = FIFO_RX, .maxpacket = 32, },
1367 { .hw_ep_num = 13, .style = FIFO_RXTX, .maxpacket = 512, },
1368 { .hw_ep_num = 14, .style = FIFO_RXTX, .maxpacket = 1024, },
1369 { .hw_ep_num = 15, .style = FIFO_RXTX, .maxpacket = 1024, },
1384 u16 maxpacket = cfg->maxpacket; in fifo_setup() local
1390 size = ffs(max(maxpacket, (u16) 8)) - 1; in fifo_setup()
1391 maxpacket = 1 << size; in fifo_setup()
1395 if ((offset + (maxpacket << 1)) > in fifo_setup()
1400 if ((offset + maxpacket) > (1 << (musb->config->ram_bits + 2))) in fifo_setup()
1418 hw_ep->max_packet_sz_tx = maxpacket; in fifo_setup()
1424 hw_ep->max_packet_sz_rx = maxpacket; in fifo_setup()
1430 hw_ep->max_packet_sz_rx = maxpacket; in fifo_setup()
1435 hw_ep->max_packet_sz_tx = maxpacket; in fifo_setup()
1446 return offset + (maxpacket << ((c_size & MUSB_FIFOSZ_DPB) ? 1 : 0)); in fifo_setup()
1450 .style = FIFO_RXTX, .maxpacket = 64,