Lines Matching refs:dinfo
67 int intelfbhw_get_chipset(struct pci_dev *pdev, struct intelfb_info *dinfo) in intelfbhw_get_chipset() argument
70 if (!pdev || !dinfo) in intelfbhw_get_chipset()
75 dinfo->name = "Intel(R) 830M"; in intelfbhw_get_chipset()
76 dinfo->chipset = INTEL_830M; in intelfbhw_get_chipset()
77 dinfo->mobile = 1; in intelfbhw_get_chipset()
78 dinfo->pll_index = PLLS_I8xx; in intelfbhw_get_chipset()
81 dinfo->name = "Intel(R) 845G"; in intelfbhw_get_chipset()
82 dinfo->chipset = INTEL_845G; in intelfbhw_get_chipset()
83 dinfo->mobile = 0; in intelfbhw_get_chipset()
84 dinfo->pll_index = PLLS_I8xx; in intelfbhw_get_chipset()
87 dinfo->mobile = 1; in intelfbhw_get_chipset()
88 dinfo->name = "Intel(R) 854"; in intelfbhw_get_chipset()
89 dinfo->chipset = INTEL_854; in intelfbhw_get_chipset()
93 dinfo->mobile = 1; in intelfbhw_get_chipset()
94 dinfo->pll_index = PLLS_I8xx; in intelfbhw_get_chipset()
99 dinfo->name = "Intel(R) 855GME"; in intelfbhw_get_chipset()
100 dinfo->chipset = INTEL_855GME; in intelfbhw_get_chipset()
103 dinfo->name = "Intel(R) 855GM"; in intelfbhw_get_chipset()
104 dinfo->chipset = INTEL_855GM; in intelfbhw_get_chipset()
107 dinfo->name = "Intel(R) 852GME"; in intelfbhw_get_chipset()
108 dinfo->chipset = INTEL_852GME; in intelfbhw_get_chipset()
111 dinfo->name = "Intel(R) 852GM"; in intelfbhw_get_chipset()
112 dinfo->chipset = INTEL_852GM; in intelfbhw_get_chipset()
115 dinfo->name = "Intel(R) 852GM/855GM"; in intelfbhw_get_chipset()
116 dinfo->chipset = INTEL_85XGM; in intelfbhw_get_chipset()
121 dinfo->name = "Intel(R) 865G"; in intelfbhw_get_chipset()
122 dinfo->chipset = INTEL_865G; in intelfbhw_get_chipset()
123 dinfo->mobile = 0; in intelfbhw_get_chipset()
124 dinfo->pll_index = PLLS_I8xx; in intelfbhw_get_chipset()
127 dinfo->name = "Intel(R) 915G"; in intelfbhw_get_chipset()
128 dinfo->chipset = INTEL_915G; in intelfbhw_get_chipset()
129 dinfo->mobile = 0; in intelfbhw_get_chipset()
130 dinfo->pll_index = PLLS_I9xx; in intelfbhw_get_chipset()
133 dinfo->name = "Intel(R) 915GM"; in intelfbhw_get_chipset()
134 dinfo->chipset = INTEL_915GM; in intelfbhw_get_chipset()
135 dinfo->mobile = 1; in intelfbhw_get_chipset()
136 dinfo->pll_index = PLLS_I9xx; in intelfbhw_get_chipset()
139 dinfo->name = "Intel(R) 945G"; in intelfbhw_get_chipset()
140 dinfo->chipset = INTEL_945G; in intelfbhw_get_chipset()
141 dinfo->mobile = 0; in intelfbhw_get_chipset()
142 dinfo->pll_index = PLLS_I9xx; in intelfbhw_get_chipset()
145 dinfo->name = "Intel(R) 945GM"; in intelfbhw_get_chipset()
146 dinfo->chipset = INTEL_945GM; in intelfbhw_get_chipset()
147 dinfo->mobile = 1; in intelfbhw_get_chipset()
148 dinfo->pll_index = PLLS_I9xx; in intelfbhw_get_chipset()
151 dinfo->name = "Intel(R) 945GME"; in intelfbhw_get_chipset()
152 dinfo->chipset = INTEL_945GME; in intelfbhw_get_chipset()
153 dinfo->mobile = 1; in intelfbhw_get_chipset()
154 dinfo->pll_index = PLLS_I9xx; in intelfbhw_get_chipset()
157 dinfo->name = "Intel(R) 965G"; in intelfbhw_get_chipset()
158 dinfo->chipset = INTEL_965G; in intelfbhw_get_chipset()
159 dinfo->mobile = 0; in intelfbhw_get_chipset()
160 dinfo->pll_index = PLLS_I9xx; in intelfbhw_get_chipset()
163 dinfo->name = "Intel(R) 965GM"; in intelfbhw_get_chipset()
164 dinfo->chipset = INTEL_965GM; in intelfbhw_get_chipset()
165 dinfo->mobile = 1; in intelfbhw_get_chipset()
166 dinfo->pll_index = PLLS_I9xx; in intelfbhw_get_chipset()
280 int intelfbhw_check_non_crt(struct intelfb_info *dinfo) in intelfbhw_check_non_crt() argument
311 int intelfbhw_validate_mode(struct intelfb_info *dinfo, in intelfbhw_validate_mode() argument
327 if (tmp > dinfo->fb.size) { in intelfbhw_validate_mode()
330 BtoKB(tmp), BtoKB(dinfo->fb.size)); in intelfbhw_validate_mode()
383 struct intelfb_info *dinfo = GET_DINFO(info); in intelfbhw_pan_display() local
397 offset = (yoffset * dinfo->pitch) + in intelfbhw_pan_display()
400 offset += dinfo->fb.offset << 12; in intelfbhw_pan_display()
402 dinfo->vsync.pan_offset = offset; in intelfbhw_pan_display()
404 !intelfbhw_enable_irq(dinfo)) in intelfbhw_pan_display()
405 dinfo->vsync.pan_display = 1; in intelfbhw_pan_display()
407 dinfo->vsync.pan_display = 0; in intelfbhw_pan_display()
417 struct intelfb_info *dinfo = GET_DINFO(info); in intelfbhw_do_blank() local
437 DBG_MSG("cursor_on is %d\n", dinfo->cursor_on); in intelfbhw_do_blank()
439 if (dinfo->cursor_on) { in intelfbhw_do_blank()
441 intelfbhw_cursor_hide(dinfo); in intelfbhw_do_blank()
443 intelfbhw_cursor_show(dinfo); in intelfbhw_do_blank()
444 dinfo->cursor_on = 1; in intelfbhw_do_blank()
446 dinfo->cursor_blanked = blank; in intelfbhw_do_blank()
497 void intelfbhw_setcolreg(struct intelfb_info *dinfo, unsigned regno, in intelfbhw_setcolreg() argument
501 u32 palette_reg = (dinfo->pipe == PIPE_A) ? in intelfbhw_setcolreg()
516 int intelfbhw_read_hw_state(struct intelfb_info *dinfo, in intelfbhw_read_hw_state() argument
525 if (!hw || !dinfo) in intelfbhw_read_hw_state()
682 static void intelfbhw_get_p1p2(struct intelfb_info *dinfo, int dpll, in intelfbhw_get_p1p2() argument
687 if (IS_I9XX(dinfo)) { in intelfbhw_get_p1p2()
710 void intelfbhw_print_hw_state(struct intelfb_info *dinfo, in intelfbhw_print_hw_state() argument
715 int index = dinfo->pll_index; in intelfbhw_print_hw_state()
729 intelfbhw_get_p1p2(dinfo, hw->vga_pd, &p1, &p2); in intelfbhw_print_hw_state()
740 intelfbhw_get_p1p2(dinfo, hw->vga_pd, &p1, &p2); in intelfbhw_print_hw_state()
757 intelfbhw_get_p1p2(dinfo, hw->dpll_a, &p1, &p2); in intelfbhw_print_hw_state()
768 intelfbhw_get_p1p2(dinfo, hw->dpll_a, &p1, &p2); in intelfbhw_print_hw_state()
1038 int intelfbhw_mode_to_hw(struct intelfb_info *dinfo, in intelfbhw_mode_to_hw() argument
1113 if (calc_pll_params(dinfo->pll_index, clock_target, &m1, &m2, in intelfbhw_mode_to_hw()
1135 if (IS_I9XX(dinfo)) { in intelfbhw_mode_to_hw()
1246 hw->disp_a_stride = dinfo->pitch; in intelfbhw_mode_to_hw()
1252 hw->disp_a_base += dinfo->fb.offset << 12; in intelfbhw_mode_to_hw()
1255 stride_alignment = IS_I9XX(dinfo) ? STRIDE_ALIGNMENT_I9XX : in intelfbhw_mode_to_hw()
1275 int intelfbhw_program_mode(struct intelfb_info *dinfo, in intelfbhw_program_mode() argument
1298 dinfo->pipe = intelfbhw_active_pipe(hw); in intelfbhw_program_mode()
1300 if (dinfo->pipe == PIPE_B) { in intelfbhw_program_mode()
1427 switch (dinfo->info->var.vmode & (FB_VMODE_INTERLACED | in intelfbhw_program_mode()
1448 if (dinfo->pdev->device == PCI_DEVICE_ID_INTEL_830M) { in intelfbhw_program_mode()
1480 static void refresh_ring(struct intelfb_info *dinfo);
1481 static void reset_state(struct intelfb_info *dinfo);
1482 static void do_flush(struct intelfb_info *dinfo);
1484 static u32 get_ring_space(struct intelfb_info *dinfo) in get_ring_space() argument
1488 if (dinfo->ring_tail >= dinfo->ring_head) in get_ring_space()
1489 ring_space = dinfo->ring.size - in get_ring_space()
1490 (dinfo->ring_tail - dinfo->ring_head); in get_ring_space()
1492 ring_space = dinfo->ring_head - dinfo->ring_tail; in get_ring_space()
1502 static int wait_ring(struct intelfb_info *dinfo, int n) in wait_ring() argument
1513 while (dinfo->ring_space < n) { in wait_ring()
1514 dinfo->ring_head = INREG(PRI_RING_HEAD) & RING_HEAD_MASK; in wait_ring()
1515 dinfo->ring_space = get_ring_space(dinfo); in wait_ring()
1517 if (dinfo->ring_head != last_head) { in wait_ring()
1519 last_head = dinfo->ring_head; in wait_ring()
1525 reset_state(dinfo); in wait_ring()
1526 refresh_ring(dinfo); in wait_ring()
1527 do_flush(dinfo); in wait_ring()
1532 dinfo->ring_space, n); in wait_ring()
1535 dinfo->ring_lockup = 1; in wait_ring()
1544 static void do_flush(struct intelfb_info *dinfo) in do_flush() argument
1552 void intelfbhw_do_sync(struct intelfb_info *dinfo) in intelfbhw_do_sync() argument
1558 if (!dinfo->accel) in intelfbhw_do_sync()
1566 do_flush(dinfo); in intelfbhw_do_sync()
1567 wait_ring(dinfo, dinfo->ring.size - RING_MIN_FREE); in intelfbhw_do_sync()
1568 dinfo->ring_space = dinfo->ring.size - RING_MIN_FREE; in intelfbhw_do_sync()
1571 static void refresh_ring(struct intelfb_info *dinfo) in refresh_ring() argument
1577 dinfo->ring_head = INREG(PRI_RING_HEAD) & RING_HEAD_MASK; in refresh_ring()
1578 dinfo->ring_tail = INREG(PRI_RING_TAIL) & RING_TAIL_MASK; in refresh_ring()
1579 dinfo->ring_space = get_ring_space(dinfo); in refresh_ring()
1582 static void reset_state(struct intelfb_info *dinfo) in reset_state() argument
1600 refresh_ring(dinfo); in reset_state()
1601 intelfbhw_do_sync(dinfo); in reset_state()
1612 void intelfbhw_2d_stop(struct intelfb_info *dinfo) in intelfbhw_2d_stop() argument
1616 dinfo->accel, dinfo->ring_active); in intelfbhw_2d_stop()
1619 if (!dinfo->accel) in intelfbhw_2d_stop()
1622 dinfo->ring_active = 0; in intelfbhw_2d_stop()
1623 reset_state(dinfo); in intelfbhw_2d_stop()
1631 void intelfbhw_2d_start(struct intelfb_info *dinfo) in intelfbhw_2d_start() argument
1635 dinfo->accel, dinfo->ring_active); in intelfbhw_2d_start()
1638 if (!dinfo->accel) in intelfbhw_2d_start()
1646 OUTREG(PRI_RING_START, dinfo->ring.physical & RING_START_MASK); in intelfbhw_2d_start()
1648 ((dinfo->ring.size - GTT_PAGE_SIZE) & RING_LENGTH_MASK) | in intelfbhw_2d_start()
1650 refresh_ring(dinfo); in intelfbhw_2d_start()
1651 dinfo->ring_active = 1; in intelfbhw_2d_start()
1655 void intelfbhw_do_fillrect(struct intelfb_info *dinfo, u32 x, u32 y, u32 w, in intelfbhw_do_fillrect() argument
1666 br09 = dinfo->fb_start + (y * pitch + x * (bpp / 8)); in intelfbhw_do_fillrect()
1694 DBG_MSG("ring = 0x%08x, 0x%08x (%d)\n", dinfo->ring_head, in intelfbhw_do_fillrect()
1695 dinfo->ring_tail, dinfo->ring_space); in intelfbhw_do_fillrect()
1700 intelfbhw_do_bitblt(struct intelfb_info *dinfo, u32 curx, u32 cury, in intelfbhw_do_bitblt() argument
1711 br09 = dinfo->fb_start; in intelfbhw_do_bitblt()
1713 br12 = dinfo->fb_start; in intelfbhw_do_bitblt()
1745 int intelfbhw_do_drawglyph(struct intelfb_info *dinfo, u32 fg, u32 bg, u32 w, in intelfbhw_do_drawglyph() argument
1782 br09 = dinfo->fb_start; in intelfbhw_do_drawglyph()
1834 void intelfbhw_cursor_init(struct intelfb_info *dinfo) in intelfbhw_cursor_init() argument
1842 if (dinfo->mobile || IS_I9XX(dinfo)) { in intelfbhw_cursor_init()
1843 if (!dinfo->cursor.physical) in intelfbhw_cursor_init()
1851 OUTREG(CURSOR_A_BASEADDR, dinfo->cursor.physical); in intelfbhw_cursor_init()
1858 OUTREG(CURSOR_A_BASEADDR, dinfo->cursor.offset << 12); in intelfbhw_cursor_init()
1865 void intelfbhw_cursor_hide(struct intelfb_info *dinfo) in intelfbhw_cursor_hide() argument
1873 dinfo->cursor_on = 0; in intelfbhw_cursor_hide()
1874 if (dinfo->mobile || IS_I9XX(dinfo)) { in intelfbhw_cursor_hide()
1875 if (!dinfo->cursor.physical) in intelfbhw_cursor_hide()
1882 OUTREG(CURSOR_A_BASEADDR, dinfo->cursor.physical); in intelfbhw_cursor_hide()
1890 void intelfbhw_cursor_show(struct intelfb_info *dinfo) in intelfbhw_cursor_show() argument
1898 dinfo->cursor_on = 1; in intelfbhw_cursor_show()
1900 if (dinfo->cursor_blanked) in intelfbhw_cursor_show()
1903 if (dinfo->mobile || IS_I9XX(dinfo)) { in intelfbhw_cursor_show()
1904 if (!dinfo->cursor.physical) in intelfbhw_cursor_show()
1911 OUTREG(CURSOR_A_BASEADDR, dinfo->cursor.physical); in intelfbhw_cursor_show()
1919 void intelfbhw_cursor_setpos(struct intelfb_info *dinfo, int x, int y) in intelfbhw_cursor_setpos() argument
1937 if (IS_I9XX(dinfo)) in intelfbhw_cursor_setpos()
1938 OUTREG(CURSOR_A_BASEADDR, dinfo->cursor.physical); in intelfbhw_cursor_setpos()
1941 void intelfbhw_cursor_setcolor(struct intelfb_info *dinfo, u32 bg, u32 fg) in intelfbhw_cursor_setcolor() argument
1953 void intelfbhw_cursor_load(struct intelfb_info *dinfo, int width, int height, in intelfbhw_cursor_load() argument
1956 u8 __iomem *addr = (u8 __iomem *)dinfo->cursor.virtual; in intelfbhw_cursor_load()
1964 if (!dinfo->cursor.virtual) in intelfbhw_cursor_load()
1982 void intelfbhw_cursor_reset(struct intelfb_info *dinfo) in intelfbhw_cursor_reset() argument
1984 u8 __iomem *addr = (u8 __iomem *)dinfo->cursor.virtual; in intelfbhw_cursor_reset()
1991 if (!dinfo->cursor.virtual) in intelfbhw_cursor_reset()
2006 struct intelfb_info *dinfo = dev_id; in intelfbhw_irq() local
2008 spin_lock(&dinfo->int_lock); in intelfbhw_irq()
2011 if (dinfo->info->var.vmode & FB_VMODE_INTERLACED) in intelfbhw_irq()
2017 spin_unlock(&dinfo->int_lock); in intelfbhw_irq()
2025 if (dinfo->vsync.pan_display) { in intelfbhw_irq()
2026 dinfo->vsync.pan_display = 0; in intelfbhw_irq()
2027 OUTREG(DSPABASE, dinfo->vsync.pan_offset); in intelfbhw_irq()
2030 dinfo->vsync.count++; in intelfbhw_irq()
2031 wake_up_interruptible(&dinfo->vsync.wait); in intelfbhw_irq()
2033 spin_unlock(&dinfo->int_lock); in intelfbhw_irq()
2038 int intelfbhw_enable_irq(struct intelfb_info *dinfo) in intelfbhw_enable_irq() argument
2041 if (!test_and_set_bit(0, &dinfo->irq_flags)) { in intelfbhw_enable_irq()
2042 if (request_irq(dinfo->pdev->irq, intelfbhw_irq, IRQF_SHARED, in intelfbhw_enable_irq()
2043 "intelfb", dinfo)) { in intelfbhw_enable_irq()
2044 clear_bit(0, &dinfo->irq_flags); in intelfbhw_enable_irq()
2048 spin_lock_irq(&dinfo->int_lock); in intelfbhw_enable_irq()
2052 spin_lock_irq(&dinfo->int_lock); in intelfbhw_enable_irq()
2054 if (dinfo->info->var.vmode & FB_VMODE_INTERLACED) in intelfbhw_enable_irq()
2063 spin_unlock_irq(&dinfo->int_lock); in intelfbhw_enable_irq()
2067 void intelfbhw_disable_irq(struct intelfb_info *dinfo) in intelfbhw_disable_irq() argument
2069 if (test_and_clear_bit(0, &dinfo->irq_flags)) { in intelfbhw_disable_irq()
2070 if (dinfo->vsync.pan_display) { in intelfbhw_disable_irq()
2071 dinfo->vsync.pan_display = 0; in intelfbhw_disable_irq()
2072 OUTREG(DSPABASE, dinfo->vsync.pan_offset); in intelfbhw_disable_irq()
2074 spin_lock_irq(&dinfo->int_lock); in intelfbhw_disable_irq()
2080 spin_unlock_irq(&dinfo->int_lock); in intelfbhw_disable_irq()
2082 free_irq(dinfo->pdev->irq, dinfo); in intelfbhw_disable_irq()
2086 int intelfbhw_wait_for_vsync(struct intelfb_info *dinfo, u32 pipe) in intelfbhw_wait_for_vsync() argument
2094 vsync = &dinfo->vsync; in intelfbhw_wait_for_vsync()
2100 ret = intelfbhw_enable_irq(dinfo); in intelfbhw_wait_for_vsync()