Lines Matching refs:par
81 static void vgaHWSeqReset(struct savagefb_par *par, int start) in vgaHWSeqReset() argument
84 VGAwSEQ(0x00, 0x01, par); /* Synchronous Reset */ in vgaHWSeqReset()
86 VGAwSEQ(0x00, 0x03, par); /* End Reset */ in vgaHWSeqReset()
89 static void vgaHWProtect(struct savagefb_par *par, int on) in vgaHWProtect() argument
97 tmp = VGArSEQ(0x01, par); in vgaHWProtect()
99 vgaHWSeqReset(par, 1); /* start synchronous reset */ in vgaHWProtect()
100 VGAwSEQ(0x01, tmp | 0x20, par);/* disable the display */ in vgaHWProtect()
102 VGAenablePalette(par); in vgaHWProtect()
108 tmp = VGArSEQ(0x01, par); in vgaHWProtect()
110 VGAwSEQ(0x01, tmp & ~0x20, par);/* reenable display */ in vgaHWProtect()
111 vgaHWSeqReset(par, 0); /* clear synchronous reset */ in vgaHWProtect()
113 VGAdisablePalette(par); in vgaHWProtect()
117 static void vgaHWRestore(struct savagefb_par *par, struct savage_reg *reg) in vgaHWRestore() argument
121 VGAwMISC(reg->MiscOutReg, par); in vgaHWRestore()
124 VGAwSEQ(i, reg->Sequencer[i], par); in vgaHWRestore()
128 VGAwCR(17, reg->CRTC[17] & ~0x80, par); in vgaHWRestore()
131 VGAwCR(i, reg->CRTC[i], par); in vgaHWRestore()
134 VGAwGR(i, reg->Graphics[i], par); in vgaHWRestore()
136 VGAenablePalette(par); in vgaHWRestore()
139 VGAwATTR(i, reg->Attribute[i], par); in vgaHWRestore()
141 VGAdisablePalette(par); in vgaHWRestore()
145 struct savagefb_par *par, in vgaHWInit() argument
258 savage3D_waitfifo(struct savagefb_par *par, int space) in savage3D_waitfifo() argument
262 while ((savage_in32(0x48C00, par) & 0x0000ffff) > slots); in savage3D_waitfifo()
266 savage4_waitfifo(struct savagefb_par *par, int space) in savage4_waitfifo() argument
270 while ((savage_in32(0x48C60, par) & 0x001fffff) > slots); in savage4_waitfifo()
274 savage2000_waitfifo(struct savagefb_par *par, int space) in savage2000_waitfifo() argument
278 while ((savage_in32(0x48C60, par) & 0x0000ffff) > slots); in savage2000_waitfifo()
283 savage3D_waitidle(struct savagefb_par *par) in savage3D_waitidle() argument
285 while ((savage_in32(0x48C00, par) & 0x0008ffff) != 0x80000); in savage3D_waitidle()
289 savage4_waitidle(struct savagefb_par *par) in savage4_waitidle() argument
291 while ((savage_in32(0x48C60, par) & 0x00a00000) != 0x00a00000); in savage4_waitidle()
295 savage2000_waitidle(struct savagefb_par *par) in savage2000_waitidle() argument
297 while ((savage_in32(0x48C60, par) & 0x009fffff)); in savage2000_waitidle()
302 SavageSetup2DEngine(struct savagefb_par *par) in SavageSetup2DEngine() argument
307 BCI_BD_SET_BPP(GlobalBitmapDescriptor, par->depth); in SavageSetup2DEngine()
308 BCI_BD_SET_STRIDE(GlobalBitmapDescriptor, par->vwidth); in SavageSetup2DEngine()
310 switch(par->chip) { in SavageSetup2DEngine()
314 savage_out32(0x48C18, savage_in32(0x48C18, par) & 0x3FF0, par); in SavageSetup2DEngine()
317 (par->cob_offset >> 11) | (par->cob_index << 29), in SavageSetup2DEngine()
318 par); in SavageSetup2DEngine()
320 savage_out32(0x48C10, 0x78207220, par); in SavageSetup2DEngine()
321 savage_out32(0x48C0C, 0, par); in SavageSetup2DEngine()
323 savage_out32(0x48C18, savage_in32(0x48C18, par) | 0x0C, par); in SavageSetup2DEngine()
331 savage_out32(0x48C18, savage_in32(0x48C18, par) & 0x3FF0, par); in SavageSetup2DEngine()
333 savage_out32(0x48C10, 0x00700040, par); in SavageSetup2DEngine()
334 savage_out32(0x48C0C, 0, par); in SavageSetup2DEngine()
336 savage_out32(0x48C18, savage_in32(0x48C18, par) | 0x08, par); in SavageSetup2DEngine()
340 savage_out32(0x48C18, 0, par); in SavageSetup2DEngine()
343 (par->cob_offset >> 7) | (par->cob_index), in SavageSetup2DEngine()
344 par); in SavageSetup2DEngine()
346 savage_out32(0x48A30, 0, par); in SavageSetup2DEngine()
348 savage_out32(0x48C18, savage_in32(0x48C18, par) | 0x00280000, in SavageSetup2DEngine()
349 par); in SavageSetup2DEngine()
355 vga_out8(0x3d4, 0x31, par); in SavageSetup2DEngine()
356 vga_out8(0x3d5, 0x0c, par); in SavageSetup2DEngine()
359 vga_out8(0x3d4, 0x50, par); in SavageSetup2DEngine()
360 vga_out8(0x3d5, vga_in8(0x3d5, par) | 0xC1, par); in SavageSetup2DEngine()
363 vga_out8(0x3d4, 0x40, par); in SavageSetup2DEngine()
364 vga_out8(0x3d5, 0x01, par); in SavageSetup2DEngine()
366 savage_out32(MONO_PAT_0, ~0, par); in SavageSetup2DEngine()
367 savage_out32(MONO_PAT_1, ~0, par); in SavageSetup2DEngine()
370 savage_out32(0x8128, ~0, par); /* enable all write planes */ in SavageSetup2DEngine()
371 savage_out32(0x812C, ~0, par); /* enable all read planes */ in SavageSetup2DEngine()
372 savage_out16(0x8134, 0x27, par); in SavageSetup2DEngine()
373 savage_out16(0x8136, 0x07, par); in SavageSetup2DEngine()
376 par->bci_ptr = 0; in SavageSetup2DEngine()
377 par->SavageWaitFifo(par, 4); in SavageSetup2DEngine()
389 par->bci_ptr = 0; in SavageSetup2DEngine()
390 par->SavageWaitFifo(par, 4); in SavageSetup2DEngine()
400 struct savagefb_par *par = info->par; in savagefb_set_clip() local
404 par->bci_ptr = 0; in savagefb_set_clip()
405 par->SavageWaitFifo(par,3); in savagefb_set_clip()
411 static void SavageSetup2DEngine(struct savagefb_par *par) {} in SavageSetup2DEngine() argument
508 static void SavagePrintRegs(struct savagefb_par *par) in SavagePrintRegs() argument
520 vga_out8(0x3c4, i, par); in SavagePrintRegs()
521 printk(KERN_DEBUG " %02x", vga_in8(0x3c5, par)); in SavagePrintRegs()
530 vga_out8(vgaCRIndex, i, par); in SavagePrintRegs()
531 printk(KERN_DEBUG " %02x", vga_in8(vgaCRReg, par)); in SavagePrintRegs()
540 static void savage_get_default_par(struct savagefb_par *par, struct savage_reg *reg) in savage_get_default_par() argument
544 vga_out16(0x3d4, 0x4838, par); in savage_get_default_par()
545 vga_out16(0x3d4, 0xa039, par); in savage_get_default_par()
546 vga_out16(0x3c4, 0x0608, par); in savage_get_default_par()
548 vga_out8(0x3d4, 0x66, par); in savage_get_default_par()
549 cr66 = vga_in8(0x3d5, par); in savage_get_default_par()
550 vga_out8(0x3d5, cr66 | 0x80, par); in savage_get_default_par()
551 vga_out8(0x3d4, 0x3a, par); in savage_get_default_par()
552 cr3a = vga_in8(0x3d5, par); in savage_get_default_par()
553 vga_out8(0x3d5, cr3a | 0x80, par); in savage_get_default_par()
554 vga_out8(0x3d4, 0x53, par); in savage_get_default_par()
555 cr53 = vga_in8(0x3d5, par); in savage_get_default_par()
556 vga_out8(0x3d5, cr53 & 0x7f, par); in savage_get_default_par()
558 vga_out8(0x3d4, 0x66, par); in savage_get_default_par()
559 vga_out8(0x3d5, cr66, par); in savage_get_default_par()
560 vga_out8(0x3d4, 0x3a, par); in savage_get_default_par()
561 vga_out8(0x3d5, cr3a, par); in savage_get_default_par()
563 vga_out8(0x3d4, 0x66, par); in savage_get_default_par()
564 vga_out8(0x3d5, cr66, par); in savage_get_default_par()
565 vga_out8(0x3d4, 0x3a, par); in savage_get_default_par()
566 vga_out8(0x3d5, cr3a, par); in savage_get_default_par()
569 vga_out8(0x3c4, 0x08, par); in savage_get_default_par()
570 reg->SR08 = vga_in8(0x3c5, par); in savage_get_default_par()
571 vga_out8(0x3c5, 0x06, par); in savage_get_default_par()
574 vga_out8(0x3d4, 0x31, par); in savage_get_default_par()
575 reg->CR31 = vga_in8(0x3d5, par); in savage_get_default_par()
576 vga_out8(0x3d4, 0x32, par); in savage_get_default_par()
577 reg->CR32 = vga_in8(0x3d5, par); in savage_get_default_par()
578 vga_out8(0x3d4, 0x34, par); in savage_get_default_par()
579 reg->CR34 = vga_in8(0x3d5, par); in savage_get_default_par()
580 vga_out8(0x3d4, 0x36, par); in savage_get_default_par()
581 reg->CR36 = vga_in8(0x3d5, par); in savage_get_default_par()
582 vga_out8(0x3d4, 0x3a, par); in savage_get_default_par()
583 reg->CR3A = vga_in8(0x3d5, par); in savage_get_default_par()
584 vga_out8(0x3d4, 0x40, par); in savage_get_default_par()
585 reg->CR40 = vga_in8(0x3d5, par); in savage_get_default_par()
586 vga_out8(0x3d4, 0x42, par); in savage_get_default_par()
587 reg->CR42 = vga_in8(0x3d5, par); in savage_get_default_par()
588 vga_out8(0x3d4, 0x45, par); in savage_get_default_par()
589 reg->CR45 = vga_in8(0x3d5, par); in savage_get_default_par()
590 vga_out8(0x3d4, 0x50, par); in savage_get_default_par()
591 reg->CR50 = vga_in8(0x3d5, par); in savage_get_default_par()
592 vga_out8(0x3d4, 0x51, par); in savage_get_default_par()
593 reg->CR51 = vga_in8(0x3d5, par); in savage_get_default_par()
594 vga_out8(0x3d4, 0x53, par); in savage_get_default_par()
595 reg->CR53 = vga_in8(0x3d5, par); in savage_get_default_par()
596 vga_out8(0x3d4, 0x58, par); in savage_get_default_par()
597 reg->CR58 = vga_in8(0x3d5, par); in savage_get_default_par()
598 vga_out8(0x3d4, 0x60, par); in savage_get_default_par()
599 reg->CR60 = vga_in8(0x3d5, par); in savage_get_default_par()
600 vga_out8(0x3d4, 0x66, par); in savage_get_default_par()
601 reg->CR66 = vga_in8(0x3d5, par); in savage_get_default_par()
602 vga_out8(0x3d4, 0x67, par); in savage_get_default_par()
603 reg->CR67 = vga_in8(0x3d5, par); in savage_get_default_par()
604 vga_out8(0x3d4, 0x68, par); in savage_get_default_par()
605 reg->CR68 = vga_in8(0x3d5, par); in savage_get_default_par()
606 vga_out8(0x3d4, 0x69, par); in savage_get_default_par()
607 reg->CR69 = vga_in8(0x3d5, par); in savage_get_default_par()
608 vga_out8(0x3d4, 0x6f, par); in savage_get_default_par()
609 reg->CR6F = vga_in8(0x3d5, par); in savage_get_default_par()
611 vga_out8(0x3d4, 0x33, par); in savage_get_default_par()
612 reg->CR33 = vga_in8(0x3d5, par); in savage_get_default_par()
613 vga_out8(0x3d4, 0x86, par); in savage_get_default_par()
614 reg->CR86 = vga_in8(0x3d5, par); in savage_get_default_par()
615 vga_out8(0x3d4, 0x88, par); in savage_get_default_par()
616 reg->CR88 = vga_in8(0x3d5, par); in savage_get_default_par()
617 vga_out8(0x3d4, 0x90, par); in savage_get_default_par()
618 reg->CR90 = vga_in8(0x3d5, par); in savage_get_default_par()
619 vga_out8(0x3d4, 0x91, par); in savage_get_default_par()
620 reg->CR91 = vga_in8(0x3d5, par); in savage_get_default_par()
621 vga_out8(0x3d4, 0xb0, par); in savage_get_default_par()
622 reg->CRB0 = vga_in8(0x3d5, par) | 0x80; in savage_get_default_par()
625 vga_out8(0x3d4, 0x3b, par); in savage_get_default_par()
626 reg->CR3B = vga_in8(0x3d5, par); in savage_get_default_par()
627 vga_out8(0x3d4, 0x3c, par); in savage_get_default_par()
628 reg->CR3C = vga_in8(0x3d5, par); in savage_get_default_par()
629 vga_out8(0x3d4, 0x43, par); in savage_get_default_par()
630 reg->CR43 = vga_in8(0x3d5, par); in savage_get_default_par()
631 vga_out8(0x3d4, 0x5d, par); in savage_get_default_par()
632 reg->CR5D = vga_in8(0x3d5, par); in savage_get_default_par()
633 vga_out8(0x3d4, 0x5e, par); in savage_get_default_par()
634 reg->CR5E = vga_in8(0x3d5, par); in savage_get_default_par()
635 vga_out8(0x3d4, 0x65, par); in savage_get_default_par()
636 reg->CR65 = vga_in8(0x3d5, par); in savage_get_default_par()
639 vga_out8(0x3c4, 0x0e, par); in savage_get_default_par()
640 reg->SR0E = vga_in8(0x3c5, par); in savage_get_default_par()
641 vga_out8(0x3c4, 0x0f, par); in savage_get_default_par()
642 reg->SR0F = vga_in8(0x3c5, par); in savage_get_default_par()
643 vga_out8(0x3c4, 0x10, par); in savage_get_default_par()
644 reg->SR10 = vga_in8(0x3c5, par); in savage_get_default_par()
645 vga_out8(0x3c4, 0x11, par); in savage_get_default_par()
646 reg->SR11 = vga_in8(0x3c5, par); in savage_get_default_par()
647 vga_out8(0x3c4, 0x12, par); in savage_get_default_par()
648 reg->SR12 = vga_in8(0x3c5, par); in savage_get_default_par()
649 vga_out8(0x3c4, 0x13, par); in savage_get_default_par()
650 reg->SR13 = vga_in8(0x3c5, par); in savage_get_default_par()
651 vga_out8(0x3c4, 0x29, par); in savage_get_default_par()
652 reg->SR29 = vga_in8(0x3c5, par); in savage_get_default_par()
654 vga_out8(0x3c4, 0x15, par); in savage_get_default_par()
655 reg->SR15 = vga_in8(0x3c5, par); in savage_get_default_par()
656 vga_out8(0x3c4, 0x30, par); in savage_get_default_par()
657 reg->SR30 = vga_in8(0x3c5, par); in savage_get_default_par()
658 vga_out8(0x3c4, 0x18, par); in savage_get_default_par()
659 reg->SR18 = vga_in8(0x3c5, par); in savage_get_default_par()
662 if (par->chip == S3_SAVAGE_MX) { in savage_get_default_par()
666 vga_out8(0x3c4, 0x54+i, par); in savage_get_default_par()
667 reg->SR54[i] = vga_in8(0x3c5, par); in savage_get_default_par()
671 vga_out8(0x3d4, 0x66, par); in savage_get_default_par()
672 cr66 = vga_in8(0x3d5, par); in savage_get_default_par()
673 vga_out8(0x3d5, cr66 | 0x80, par); in savage_get_default_par()
674 vga_out8(0x3d4, 0x3a, par); in savage_get_default_par()
675 cr3a = vga_in8(0x3d5, par); in savage_get_default_par()
676 vga_out8(0x3d5, cr3a | 0x80, par); in savage_get_default_par()
679 if (par->chip != S3_SAVAGE_MX) { in savage_get_default_par()
680 reg->MMPR0 = savage_in32(FIFO_CONTROL_REG, par); in savage_get_default_par()
681 reg->MMPR1 = savage_in32(MIU_CONTROL_REG, par); in savage_get_default_par()
682 reg->MMPR2 = savage_in32(STREAMS_TIMEOUT_REG, par); in savage_get_default_par()
683 reg->MMPR3 = savage_in32(MISC_TIMEOUT_REG, par); in savage_get_default_par()
686 vga_out8(0x3d4, 0x3a, par); in savage_get_default_par()
687 vga_out8(0x3d5, cr3a, par); in savage_get_default_par()
688 vga_out8(0x3d4, 0x66, par); in savage_get_default_par()
689 vga_out8(0x3d5, cr66, par); in savage_get_default_par()
692 static void savage_set_default_par(struct savagefb_par *par, in savage_set_default_par() argument
697 vga_out16(0x3d4, 0x4838, par); in savage_set_default_par()
698 vga_out16(0x3d4, 0xa039, par); in savage_set_default_par()
699 vga_out16(0x3c4, 0x0608, par); in savage_set_default_par()
701 vga_out8(0x3d4, 0x66, par); in savage_set_default_par()
702 cr66 = vga_in8(0x3d5, par); in savage_set_default_par()
703 vga_out8(0x3d5, cr66 | 0x80, par); in savage_set_default_par()
704 vga_out8(0x3d4, 0x3a, par); in savage_set_default_par()
705 cr3a = vga_in8(0x3d5, par); in savage_set_default_par()
706 vga_out8(0x3d5, cr3a | 0x80, par); in savage_set_default_par()
707 vga_out8(0x3d4, 0x53, par); in savage_set_default_par()
708 cr53 = vga_in8(0x3d5, par); in savage_set_default_par()
709 vga_out8(0x3d5, cr53 & 0x7f, par); in savage_set_default_par()
711 vga_out8(0x3d4, 0x66, par); in savage_set_default_par()
712 vga_out8(0x3d5, cr66, par); in savage_set_default_par()
713 vga_out8(0x3d4, 0x3a, par); in savage_set_default_par()
714 vga_out8(0x3d5, cr3a, par); in savage_set_default_par()
716 vga_out8(0x3d4, 0x66, par); in savage_set_default_par()
717 vga_out8(0x3d5, cr66, par); in savage_set_default_par()
718 vga_out8(0x3d4, 0x3a, par); in savage_set_default_par()
719 vga_out8(0x3d5, cr3a, par); in savage_set_default_par()
722 vga_out8(0x3c4, 0x08, par); in savage_set_default_par()
723 vga_out8(0x3c5, reg->SR08, par); in savage_set_default_par()
724 vga_out8(0x3c5, 0x06, par); in savage_set_default_par()
727 vga_out8(0x3d4, 0x31, par); in savage_set_default_par()
728 vga_out8(0x3d5, reg->CR31, par); in savage_set_default_par()
729 vga_out8(0x3d4, 0x32, par); in savage_set_default_par()
730 vga_out8(0x3d5, reg->CR32, par); in savage_set_default_par()
731 vga_out8(0x3d4, 0x34, par); in savage_set_default_par()
732 vga_out8(0x3d5, reg->CR34, par); in savage_set_default_par()
733 vga_out8(0x3d4, 0x36, par); in savage_set_default_par()
734 vga_out8(0x3d5,reg->CR36, par); in savage_set_default_par()
735 vga_out8(0x3d4, 0x3a, par); in savage_set_default_par()
736 vga_out8(0x3d5, reg->CR3A, par); in savage_set_default_par()
737 vga_out8(0x3d4, 0x40, par); in savage_set_default_par()
738 vga_out8(0x3d5, reg->CR40, par); in savage_set_default_par()
739 vga_out8(0x3d4, 0x42, par); in savage_set_default_par()
740 vga_out8(0x3d5, reg->CR42, par); in savage_set_default_par()
741 vga_out8(0x3d4, 0x45, par); in savage_set_default_par()
742 vga_out8(0x3d5, reg->CR45, par); in savage_set_default_par()
743 vga_out8(0x3d4, 0x50, par); in savage_set_default_par()
744 vga_out8(0x3d5, reg->CR50, par); in savage_set_default_par()
745 vga_out8(0x3d4, 0x51, par); in savage_set_default_par()
746 vga_out8(0x3d5, reg->CR51, par); in savage_set_default_par()
747 vga_out8(0x3d4, 0x53, par); in savage_set_default_par()
748 vga_out8(0x3d5, reg->CR53, par); in savage_set_default_par()
749 vga_out8(0x3d4, 0x58, par); in savage_set_default_par()
750 vga_out8(0x3d5, reg->CR58, par); in savage_set_default_par()
751 vga_out8(0x3d4, 0x60, par); in savage_set_default_par()
752 vga_out8(0x3d5, reg->CR60, par); in savage_set_default_par()
753 vga_out8(0x3d4, 0x66, par); in savage_set_default_par()
754 vga_out8(0x3d5, reg->CR66, par); in savage_set_default_par()
755 vga_out8(0x3d4, 0x67, par); in savage_set_default_par()
756 vga_out8(0x3d5, reg->CR67, par); in savage_set_default_par()
757 vga_out8(0x3d4, 0x68, par); in savage_set_default_par()
758 vga_out8(0x3d5, reg->CR68, par); in savage_set_default_par()
759 vga_out8(0x3d4, 0x69, par); in savage_set_default_par()
760 vga_out8(0x3d5, reg->CR69, par); in savage_set_default_par()
761 vga_out8(0x3d4, 0x6f, par); in savage_set_default_par()
762 vga_out8(0x3d5, reg->CR6F, par); in savage_set_default_par()
764 vga_out8(0x3d4, 0x33, par); in savage_set_default_par()
765 vga_out8(0x3d5, reg->CR33, par); in savage_set_default_par()
766 vga_out8(0x3d4, 0x86, par); in savage_set_default_par()
767 vga_out8(0x3d5, reg->CR86, par); in savage_set_default_par()
768 vga_out8(0x3d4, 0x88, par); in savage_set_default_par()
769 vga_out8(0x3d5, reg->CR88, par); in savage_set_default_par()
770 vga_out8(0x3d4, 0x90, par); in savage_set_default_par()
771 vga_out8(0x3d5, reg->CR90, par); in savage_set_default_par()
772 vga_out8(0x3d4, 0x91, par); in savage_set_default_par()
773 vga_out8(0x3d5, reg->CR91, par); in savage_set_default_par()
774 vga_out8(0x3d4, 0xb0, par); in savage_set_default_par()
775 vga_out8(0x3d5, reg->CRB0, par); in savage_set_default_par()
778 vga_out8(0x3d4, 0x3b, par); in savage_set_default_par()
779 vga_out8(0x3d5, reg->CR3B, par); in savage_set_default_par()
780 vga_out8(0x3d4, 0x3c, par); in savage_set_default_par()
781 vga_out8(0x3d5, reg->CR3C, par); in savage_set_default_par()
782 vga_out8(0x3d4, 0x43, par); in savage_set_default_par()
783 vga_out8(0x3d5, reg->CR43, par); in savage_set_default_par()
784 vga_out8(0x3d4, 0x5d, par); in savage_set_default_par()
785 vga_out8(0x3d5, reg->CR5D, par); in savage_set_default_par()
786 vga_out8(0x3d4, 0x5e, par); in savage_set_default_par()
787 vga_out8(0x3d5, reg->CR5E, par); in savage_set_default_par()
788 vga_out8(0x3d4, 0x65, par); in savage_set_default_par()
789 vga_out8(0x3d5, reg->CR65, par); in savage_set_default_par()
792 vga_out8(0x3c4, 0x0e, par); in savage_set_default_par()
793 vga_out8(0x3c5, reg->SR0E, par); in savage_set_default_par()
794 vga_out8(0x3c4, 0x0f, par); in savage_set_default_par()
795 vga_out8(0x3c5, reg->SR0F, par); in savage_set_default_par()
796 vga_out8(0x3c4, 0x10, par); in savage_set_default_par()
797 vga_out8(0x3c5, reg->SR10, par); in savage_set_default_par()
798 vga_out8(0x3c4, 0x11, par); in savage_set_default_par()
799 vga_out8(0x3c5, reg->SR11, par); in savage_set_default_par()
800 vga_out8(0x3c4, 0x12, par); in savage_set_default_par()
801 vga_out8(0x3c5, reg->SR12, par); in savage_set_default_par()
802 vga_out8(0x3c4, 0x13, par); in savage_set_default_par()
803 vga_out8(0x3c5, reg->SR13, par); in savage_set_default_par()
804 vga_out8(0x3c4, 0x29, par); in savage_set_default_par()
805 vga_out8(0x3c5, reg->SR29, par); in savage_set_default_par()
807 vga_out8(0x3c4, 0x15, par); in savage_set_default_par()
808 vga_out8(0x3c5, reg->SR15, par); in savage_set_default_par()
809 vga_out8(0x3c4, 0x30, par); in savage_set_default_par()
810 vga_out8(0x3c5, reg->SR30, par); in savage_set_default_par()
811 vga_out8(0x3c4, 0x18, par); in savage_set_default_par()
812 vga_out8(0x3c5, reg->SR18, par); in savage_set_default_par()
815 if (par->chip == S3_SAVAGE_MX) { in savage_set_default_par()
819 vga_out8(0x3c4, 0x54+i, par); in savage_set_default_par()
820 vga_out8(0x3c5, reg->SR54[i], par); in savage_set_default_par()
824 vga_out8(0x3d4, 0x66, par); in savage_set_default_par()
825 cr66 = vga_in8(0x3d5, par); in savage_set_default_par()
826 vga_out8(0x3d5, cr66 | 0x80, par); in savage_set_default_par()
827 vga_out8(0x3d4, 0x3a, par); in savage_set_default_par()
828 cr3a = vga_in8(0x3d5, par); in savage_set_default_par()
829 vga_out8(0x3d5, cr3a | 0x80, par); in savage_set_default_par()
832 if (par->chip != S3_SAVAGE_MX) { in savage_set_default_par()
833 savage_out32(FIFO_CONTROL_REG, reg->MMPR0, par); in savage_set_default_par()
834 savage_out32(MIU_CONTROL_REG, reg->MMPR1, par); in savage_set_default_par()
835 savage_out32(STREAMS_TIMEOUT_REG, reg->MMPR2, par); in savage_set_default_par()
836 savage_out32(MISC_TIMEOUT_REG, reg->MMPR3, par); in savage_set_default_par()
839 vga_out8(0x3d4, 0x3a, par); in savage_set_default_par()
840 vga_out8(0x3d5, cr3a, par); in savage_set_default_par()
841 vga_out8(0x3d4, 0x66, par); in savage_set_default_par()
842 vga_out8(0x3d5, cr66, par); in savage_set_default_par()
867 struct savagefb_par *par = info->par; in savagefb_check_var() local
928 if (par->SavagePanelWidth && in savagefb_check_var()
929 (var->xres > par->SavagePanelWidth || in savagefb_check_var()
930 var->yres > par->SavagePanelHeight)) { in savagefb_check_var()
933 par->SavagePanelWidth, in savagefb_check_var()
934 par->SavagePanelHeight); in savagefb_check_var()
970 struct savagefb_par *par, in savagefb_decode_var() argument
999 par->depth = var->bits_per_pixel; in savagefb_decode_var()
1000 par->vwidth = var->xres_virtual; in savagefb_decode_var()
1002 if (var->bits_per_pixel == 16 && par->chip == S3_SAVAGE3D) { in savagefb_decode_var()
1013 vgaHWInit(var, par, &timings, reg); in savagefb_decode_var()
1022 if ((par->chip == S3_SAVAGE2000) && (dclk >= 230000)) in savagefb_decode_var()
1028 if (S3_SAVAGE_MOBILE_SERIES(par->chip) || in savagefb_decode_var()
1029 ((par->chip == S3_SAVAGE2000) && (dclk >= 230000))) in savagefb_decode_var()
1035 if (S3_SAVAGE_MOBILE_SERIES(par->chip) || in savagefb_decode_var()
1036 ((par->chip == S3_SAVAGE2000) && (dclk >= 230000))) in savagefb_decode_var()
1054 vga_out8(0x3d4, 0x3a, par); in savagefb_decode_var()
1055 tmp = vga_in8(0x3d5, par); in savagefb_decode_var()
1065 vga_out8(0x3d4, 0x58, par); in savagefb_decode_var()
1066 reg->CR58 = vga_in8(0x3d5, par) & 0x80; in savagefb_decode_var()
1073 vga_out8(0x3d4, 0x40, par); in savagefb_decode_var()
1074 reg->CR40 = vga_in8(0x3d5, par) & ~0x01; in savagefb_decode_var()
1084 if (par->MCLK <= 0) { in savagefb_decode_var()
1088 common_calc_clock(par->MCLK, 1, 1, 31, 0, 3, 135000, 270000, in savagefb_decode_var()
1169 if (par->chip == S3_SAVAGE2000) in savagefb_decode_var()
1178 vga_out8(0x3d4, 0x36, par); in savagefb_decode_var()
1179 reg->CR36 = vga_in8(0x3d5, par); in savagefb_decode_var()
1180 vga_out8(0x3d4, 0x68, par); in savagefb_decode_var()
1181 reg->CR68 = vga_in8(0x3d5, par); in savagefb_decode_var()
1183 vga_out8(0x3d4, 0x6f, par); in savagefb_decode_var()
1184 reg->CR6F = vga_in8(0x3d5, par); in savagefb_decode_var()
1185 vga_out8(0x3d4, 0x86, par); in savagefb_decode_var()
1186 reg->CR86 = vga_in8(0x3d5, par); in savagefb_decode_var()
1187 vga_out8(0x3d4, 0x88, par); in savagefb_decode_var()
1188 reg->CR88 = vga_in8(0x3d5, par) | 0x08; in savagefb_decode_var()
1189 vga_out8(0x3d4, 0xb0, par); in savagefb_decode_var()
1190 reg->CRB0 = vga_in8(0x3d5, par) | 0x80; in savagefb_decode_var()
1207 struct savagefb_par *par = info->par; in savagefb_setcolreg() local
1212 par->palette[regno].red = red; in savagefb_setcolreg()
1213 par->palette[regno].green = green; in savagefb_setcolreg()
1214 par->palette[regno].blue = blue; in savagefb_setcolreg()
1215 par->palette[regno].transp = transp; in savagefb_setcolreg()
1219 vga_out8(0x3c8, regno, par); in savagefb_setcolreg()
1221 vga_out8(0x3c9, red >> 10, par); in savagefb_setcolreg()
1222 vga_out8(0x3c9, green >> 10, par); in savagefb_setcolreg()
1223 vga_out8(0x3c9, blue >> 10, par); in savagefb_setcolreg()
1257 static void savagefb_set_par_int(struct savagefb_par *par, struct savage_reg *reg) in savagefb_set_par_int() argument
1263 par->SavageWaitIdle(par); in savagefb_set_par_int()
1265 vga_out8(0x3c2, 0x23, par); in savagefb_set_par_int()
1267 vga_out16(0x3d4, 0x4838, par); in savagefb_set_par_int()
1268 vga_out16(0x3d4, 0xa539, par); in savagefb_set_par_int()
1269 vga_out16(0x3c4, 0x0608, par); in savagefb_set_par_int()
1271 vgaHWProtect(par, 1); in savagefb_set_par_int()
1280 VerticalRetraceWait(par); in savagefb_set_par_int()
1281 vga_out8(0x3d4, 0x67, par); in savagefb_set_par_int()
1282 cr67 = vga_in8(0x3d5, par); in savagefb_set_par_int()
1283 vga_out8(0x3d5, cr67/*par->CR67*/ & ~0x0c, par); /* no STREAMS yet */ in savagefb_set_par_int()
1285 vga_out8(0x3d4, 0x23, par); in savagefb_set_par_int()
1286 vga_out8(0x3d5, 0x00, par); in savagefb_set_par_int()
1287 vga_out8(0x3d4, 0x26, par); in savagefb_set_par_int()
1288 vga_out8(0x3d5, 0x00, par); in savagefb_set_par_int()
1291 vga_out8(0x3d4, 0x66, par); in savagefb_set_par_int()
1292 vga_out8(0x3d5, reg->CR66, par); in savagefb_set_par_int()
1293 vga_out8(0x3d4, 0x3a, par); in savagefb_set_par_int()
1294 vga_out8(0x3d5, reg->CR3A, par); in savagefb_set_par_int()
1295 vga_out8(0x3d4, 0x31, par); in savagefb_set_par_int()
1296 vga_out8(0x3d5, reg->CR31, par); in savagefb_set_par_int()
1297 vga_out8(0x3d4, 0x32, par); in savagefb_set_par_int()
1298 vga_out8(0x3d5, reg->CR32, par); in savagefb_set_par_int()
1299 vga_out8(0x3d4, 0x58, par); in savagefb_set_par_int()
1300 vga_out8(0x3d5, reg->CR58, par); in savagefb_set_par_int()
1301 vga_out8(0x3d4, 0x53, par); in savagefb_set_par_int()
1302 vga_out8(0x3d5, reg->CR53 & 0x7f, par); in savagefb_set_par_int()
1304 vga_out16(0x3c4, 0x0608, par); in savagefb_set_par_int()
1308 vga_out8(0x3c4, 0x0e, par); in savagefb_set_par_int()
1309 vga_out8(0x3c5, reg->SR0E, par); in savagefb_set_par_int()
1310 vga_out8(0x3c4, 0x0f, par); in savagefb_set_par_int()
1311 vga_out8(0x3c5, reg->SR0F, par); in savagefb_set_par_int()
1312 vga_out8(0x3c4, 0x29, par); in savagefb_set_par_int()
1313 vga_out8(0x3c5, reg->SR29, par); in savagefb_set_par_int()
1314 vga_out8(0x3c4, 0x15, par); in savagefb_set_par_int()
1315 vga_out8(0x3c5, reg->SR15, par); in savagefb_set_par_int()
1318 if (par->chip == S3_SAVAGE_MX) { in savagefb_set_par_int()
1322 vga_out8(0x3c4, 0x54+i, par); in savagefb_set_par_int()
1323 vga_out8(0x3c5, reg->SR54[i], par); in savagefb_set_par_int()
1327 vgaHWRestore (par, reg); in savagefb_set_par_int()
1330 vga_out8(0x3d4, 0x53, par); in savagefb_set_par_int()
1331 vga_out8(0x3d5, reg->CR53, par); in savagefb_set_par_int()
1332 vga_out8(0x3d4, 0x5d, par); in savagefb_set_par_int()
1333 vga_out8(0x3d5, reg->CR5D, par); in savagefb_set_par_int()
1334 vga_out8(0x3d4, 0x5e, par); in savagefb_set_par_int()
1335 vga_out8(0x3d5, reg->CR5E, par); in savagefb_set_par_int()
1336 vga_out8(0x3d4, 0x3b, par); in savagefb_set_par_int()
1337 vga_out8(0x3d5, reg->CR3B, par); in savagefb_set_par_int()
1338 vga_out8(0x3d4, 0x3c, par); in savagefb_set_par_int()
1339 vga_out8(0x3d5, reg->CR3C, par); in savagefb_set_par_int()
1340 vga_out8(0x3d4, 0x43, par); in savagefb_set_par_int()
1341 vga_out8(0x3d5, reg->CR43, par); in savagefb_set_par_int()
1342 vga_out8(0x3d4, 0x65, par); in savagefb_set_par_int()
1343 vga_out8(0x3d5, reg->CR65, par); in savagefb_set_par_int()
1346 vga_out8(0x3d4, 0x67, par); in savagefb_set_par_int()
1348 cr67 = vga_in8(0x3d5, par) & 0xf; in savagefb_set_par_int()
1349 vga_out8(0x3d5, 0x50 | cr67, par); in savagefb_set_par_int()
1351 vga_out8(0x3d4, 0x67, par); in savagefb_set_par_int()
1353 vga_out8(0x3d5, reg->CR67 & ~0x0c, par); in savagefb_set_par_int()
1356 vga_out8(0x3d4, 0x34, par); in savagefb_set_par_int()
1357 vga_out8(0x3d5, reg->CR34, par); in savagefb_set_par_int()
1358 vga_out8(0x3d4, 0x40, par); in savagefb_set_par_int()
1359 vga_out8(0x3d5, reg->CR40, par); in savagefb_set_par_int()
1360 vga_out8(0x3d4, 0x42, par); in savagefb_set_par_int()
1361 vga_out8(0x3d5, reg->CR42, par); in savagefb_set_par_int()
1362 vga_out8(0x3d4, 0x45, par); in savagefb_set_par_int()
1363 vga_out8(0x3d5, reg->CR45, par); in savagefb_set_par_int()
1364 vga_out8(0x3d4, 0x50, par); in savagefb_set_par_int()
1365 vga_out8(0x3d5, reg->CR50, par); in savagefb_set_par_int()
1366 vga_out8(0x3d4, 0x51, par); in savagefb_set_par_int()
1367 vga_out8(0x3d5, reg->CR51, par); in savagefb_set_par_int()
1370 vga_out8(0x3d4, 0x36, par); in savagefb_set_par_int()
1371 vga_out8(0x3d5, reg->CR36, par); in savagefb_set_par_int()
1372 vga_out8(0x3d4, 0x60, par); in savagefb_set_par_int()
1373 vga_out8(0x3d5, reg->CR60, par); in savagefb_set_par_int()
1374 vga_out8(0x3d4, 0x68, par); in savagefb_set_par_int()
1375 vga_out8(0x3d5, reg->CR68, par); in savagefb_set_par_int()
1376 vga_out8(0x3d4, 0x69, par); in savagefb_set_par_int()
1377 vga_out8(0x3d5, reg->CR69, par); in savagefb_set_par_int()
1378 vga_out8(0x3d4, 0x6f, par); in savagefb_set_par_int()
1379 vga_out8(0x3d5, reg->CR6F, par); in savagefb_set_par_int()
1381 vga_out8(0x3d4, 0x33, par); in savagefb_set_par_int()
1382 vga_out8(0x3d5, reg->CR33, par); in savagefb_set_par_int()
1383 vga_out8(0x3d4, 0x86, par); in savagefb_set_par_int()
1384 vga_out8(0x3d5, reg->CR86, par); in savagefb_set_par_int()
1385 vga_out8(0x3d4, 0x88, par); in savagefb_set_par_int()
1386 vga_out8(0x3d5, reg->CR88, par); in savagefb_set_par_int()
1387 vga_out8(0x3d4, 0x90, par); in savagefb_set_par_int()
1388 vga_out8(0x3d5, reg->CR90, par); in savagefb_set_par_int()
1389 vga_out8(0x3d4, 0x91, par); in savagefb_set_par_int()
1390 vga_out8(0x3d5, reg->CR91, par); in savagefb_set_par_int()
1392 if (par->chip == S3_SAVAGE4) { in savagefb_set_par_int()
1393 vga_out8(0x3d4, 0xb0, par); in savagefb_set_par_int()
1394 vga_out8(0x3d5, reg->CRB0, par); in savagefb_set_par_int()
1397 vga_out8(0x3d4, 0x32, par); in savagefb_set_par_int()
1398 vga_out8(0x3d5, reg->CR32, par); in savagefb_set_par_int()
1401 vga_out8(0x3c4, 0x08, par); in savagefb_set_par_int()
1402 vga_out8(0x3c5, 0x06, par); in savagefb_set_par_int()
1408 vga_out8(0x3c4, 0x10, par); in savagefb_set_par_int()
1409 vga_out8(0x3c5, reg->SR10, par); in savagefb_set_par_int()
1410 vga_out8(0x3c4, 0x11, par); in savagefb_set_par_int()
1411 vga_out8(0x3c5, reg->SR11, par); in savagefb_set_par_int()
1415 vga_out8(0x3c4, 0x0e, par); in savagefb_set_par_int()
1416 vga_out8(0x3c5, reg->SR0E, par); in savagefb_set_par_int()
1417 vga_out8(0x3c4, 0x0f, par); in savagefb_set_par_int()
1418 vga_out8(0x3c5, reg->SR0F, par); in savagefb_set_par_int()
1419 vga_out8(0x3c4, 0x12, par); in savagefb_set_par_int()
1420 vga_out8(0x3c5, reg->SR12, par); in savagefb_set_par_int()
1421 vga_out8(0x3c4, 0x13, par); in savagefb_set_par_int()
1422 vga_out8(0x3c5, reg->SR13, par); in savagefb_set_par_int()
1423 vga_out8(0x3c4, 0x29, par); in savagefb_set_par_int()
1424 vga_out8(0x3c5, reg->SR29, par); in savagefb_set_par_int()
1425 vga_out8(0x3c4, 0x18, par); in savagefb_set_par_int()
1426 vga_out8(0x3c5, reg->SR18, par); in savagefb_set_par_int()
1429 vga_out8(0x3c4, 0x15, par); in savagefb_set_par_int()
1430 tmp = vga_in8(0x3c5, par) & ~0x21; in savagefb_set_par_int()
1432 vga_out8(0x3c5, tmp | 0x03, par); in savagefb_set_par_int()
1433 vga_out8(0x3c5, tmp | 0x23, par); in savagefb_set_par_int()
1434 vga_out8(0x3c5, tmp | 0x03, par); in savagefb_set_par_int()
1435 vga_out8(0x3c5, reg->SR15, par); in savagefb_set_par_int()
1438 vga_out8(0x3c4, 0x30, par); in savagefb_set_par_int()
1439 vga_out8(0x3c5, reg->SR30, par); in savagefb_set_par_int()
1440 vga_out8(0x3c4, 0x08, par); in savagefb_set_par_int()
1441 vga_out8(0x3c5, reg->SR08, par); in savagefb_set_par_int()
1444 VerticalRetraceWait(par); in savagefb_set_par_int()
1445 vga_out8(0x3d4, 0x67, par); in savagefb_set_par_int()
1446 vga_out8(0x3d5, reg->CR67, par); in savagefb_set_par_int()
1448 vga_out8(0x3d4, 0x66, par); in savagefb_set_par_int()
1449 cr66 = vga_in8(0x3d5, par); in savagefb_set_par_int()
1450 vga_out8(0x3d5, cr66 | 0x80, par); in savagefb_set_par_int()
1451 vga_out8(0x3d4, 0x3a, par); in savagefb_set_par_int()
1452 cr3a = vga_in8(0x3d5, par); in savagefb_set_par_int()
1453 vga_out8(0x3d5, cr3a | 0x80, par); in savagefb_set_par_int()
1455 if (par->chip != S3_SAVAGE_MX) { in savagefb_set_par_int()
1456 VerticalRetraceWait(par); in savagefb_set_par_int()
1457 savage_out32(FIFO_CONTROL_REG, reg->MMPR0, par); in savagefb_set_par_int()
1458 par->SavageWaitIdle(par); in savagefb_set_par_int()
1459 savage_out32(MIU_CONTROL_REG, reg->MMPR1, par); in savagefb_set_par_int()
1460 par->SavageWaitIdle(par); in savagefb_set_par_int()
1461 savage_out32(STREAMS_TIMEOUT_REG, reg->MMPR2, par); in savagefb_set_par_int()
1462 par->SavageWaitIdle(par); in savagefb_set_par_int()
1463 savage_out32(MISC_TIMEOUT_REG, reg->MMPR3, par); in savagefb_set_par_int()
1466 vga_out8(0x3d4, 0x66, par); in savagefb_set_par_int()
1467 vga_out8(0x3d5, cr66, par); in savagefb_set_par_int()
1468 vga_out8(0x3d4, 0x3a, par); in savagefb_set_par_int()
1469 vga_out8(0x3d5, cr3a, par); in savagefb_set_par_int()
1471 SavageSetup2DEngine(par); in savagefb_set_par_int()
1472 vgaHWProtect(par, 0); in savagefb_set_par_int()
1475 static void savagefb_update_start(struct savagefb_par *par, int base) in savagefb_update_start() argument
1478 vga_out16(0x3d4, (base & 0x00ff00) | 0x0c, par); in savagefb_update_start()
1479 vga_out16(0x3d4, ((base & 0x00ff) << 8) | 0x0d, par); in savagefb_update_start()
1480 vga_out8(0x3d4, 0x69, par); in savagefb_update_start()
1481 vga_out8(0x3d5, (base & 0x7f0000) >> 16, par); in savagefb_update_start()
1502 struct savagefb_par *par = info->par; in savagefb_set_par() local
1507 err = savagefb_decode_var(var, par, &par->state); in savagefb_set_par()
1511 if (par->dacSpeedBpp <= 0) { in savagefb_set_par()
1513 par->dacSpeedBpp = par->clock[3]; in savagefb_set_par()
1515 par->dacSpeedBpp = par->clock[2]; in savagefb_set_par()
1517 par->dacSpeedBpp = par->clock[1]; in savagefb_set_par()
1519 par->dacSpeedBpp = par->clock[0]; in savagefb_set_par()
1523 par->maxClock = par->dacSpeedBpp; in savagefb_set_par()
1524 par->minClock = 10000; in savagefb_set_par()
1526 savagefb_set_par_int(par, &par->state); in savagefb_set_par()
1531 SavagePrintRegs(par); in savagefb_set_par()
1541 struct savagefb_par *par = info->par; in savagefb_pan_display() local
1547 savagefb_update_start(par, base); in savagefb_pan_display()
1553 struct savagefb_par *par = info->par; in savagefb_blank() local
1556 if (par->display_type == DISP_CRT) { in savagefb_blank()
1557 vga_out8(0x3c4, 0x08, par); in savagefb_blank()
1558 sr8 = vga_in8(0x3c5, par); in savagefb_blank()
1560 vga_out8(0x3c5, sr8, par); in savagefb_blank()
1561 vga_out8(0x3c4, 0x0d, par); in savagefb_blank()
1562 srd = vga_in8(0x3c5, par); in savagefb_blank()
1580 vga_out8(0x3c4, 0x0d, par); in savagefb_blank()
1581 vga_out8(0x3c5, srd, par); in savagefb_blank()
1584 if (par->display_type == DISP_LCD || in savagefb_blank()
1585 par->display_type == DISP_DFP) { in savagefb_blank()
1589 vga_out8(0x3c4, 0x31, par); /* SR31 bit 4 - FP enable */ in savagefb_blank()
1590 vga_out8(0x3c5, vga_in8(0x3c5, par) | 0x10, par); in savagefb_blank()
1595 vga_out8(0x3c4, 0x31, par); /* SR31 bit 4 - FP enable */ in savagefb_blank()
1596 vga_out8(0x3c5, vga_in8(0x3c5, par) & ~0x10, par); in savagefb_blank()
1606 struct savagefb_par *par = info->par; in savagefb_open() local
1608 mutex_lock(&par->open_lock); in savagefb_open()
1610 if (!par->open_count) { in savagefb_open()
1611 memset(&par->vgastate, 0, sizeof(par->vgastate)); in savagefb_open()
1612 par->vgastate.flags = VGA_SAVE_CMAP | VGA_SAVE_FONTS | in savagefb_open()
1614 par->vgastate.vgabase = par->mmio.vbase + 0x8000; in savagefb_open()
1615 save_vga(&par->vgastate); in savagefb_open()
1616 savage_get_default_par(par, &par->initial); in savagefb_open()
1619 par->open_count++; in savagefb_open()
1620 mutex_unlock(&par->open_lock); in savagefb_open()
1626 struct savagefb_par *par = info->par; in savagefb_release() local
1628 mutex_lock(&par->open_lock); in savagefb_release()
1630 if (par->open_count == 1) { in savagefb_release()
1631 savage_set_default_par(par, &par->initial); in savagefb_release()
1632 restore_vga(&par->vgastate); in savagefb_release()
1635 par->open_count--; in savagefb_release()
1636 mutex_unlock(&par->open_lock); in savagefb_release()
1681 static void savage_enable_mmio(struct savagefb_par *par) in savage_enable_mmio() argument
1687 val = vga_in8(0x3c3, par); in savage_enable_mmio()
1688 vga_out8(0x3c3, val | 0x01, par); in savage_enable_mmio()
1689 val = vga_in8(0x3cc, par); in savage_enable_mmio()
1690 vga_out8(0x3c2, val | 0x01, par); in savage_enable_mmio()
1692 if (par->chip >= S3_SAVAGE4) { in savage_enable_mmio()
1693 vga_out8(0x3d4, 0x40, par); in savage_enable_mmio()
1694 val = vga_in8(0x3d5, par); in savage_enable_mmio()
1695 vga_out8(0x3d5, val | 1, par); in savage_enable_mmio()
1700 static void savage_disable_mmio(struct savagefb_par *par) in savage_disable_mmio() argument
1706 if (par->chip >= S3_SAVAGE4) { in savage_disable_mmio()
1707 vga_out8(0x3d4, 0x40, par); in savage_disable_mmio()
1708 val = vga_in8(0x3d5, par); in savage_disable_mmio()
1709 vga_out8(0x3d5, val | 1, par); in savage_disable_mmio()
1716 struct savagefb_par *par = info->par; in savage_map_mmio() local
1719 if (S3_SAVAGE3D_SERIES(par->chip)) in savage_map_mmio()
1720 par->mmio.pbase = pci_resource_start(par->pcidev, 0) + in savage_map_mmio()
1723 par->mmio.pbase = pci_resource_start(par->pcidev, 0) + in savage_map_mmio()
1726 par->mmio.len = SAVAGE_NEWMMIO_REGSIZE; in savage_map_mmio()
1728 par->mmio.vbase = ioremap(par->mmio.pbase, par->mmio.len); in savage_map_mmio()
1729 if (!par->mmio.vbase) { in savage_map_mmio()
1734 par->mmio.vbase); in savage_map_mmio()
1736 info->fix.mmio_start = par->mmio.pbase; in savage_map_mmio()
1737 info->fix.mmio_len = par->mmio.len; in savage_map_mmio()
1739 par->bci_base = (u32 __iomem *)(par->mmio.vbase + BCI_BUFFER_OFFSET); in savage_map_mmio()
1740 par->bci_ptr = 0; in savage_map_mmio()
1742 savage_enable_mmio(par); in savage_map_mmio()
1749 struct savagefb_par *par = info->par; in savage_unmap_mmio() local
1752 savage_disable_mmio(par); in savage_unmap_mmio()
1754 if (par->mmio.vbase) { in savage_unmap_mmio()
1755 iounmap(par->mmio.vbase); in savage_unmap_mmio()
1756 par->mmio.vbase = NULL; in savage_unmap_mmio()
1762 struct savagefb_par *par = info->par; in savage_map_video() local
1767 if (S3_SAVAGE3D_SERIES(par->chip)) in savage_map_video()
1772 par->video.pbase = pci_resource_start(par->pcidev, resource); in savage_map_video()
1773 par->video.len = video_len; in savage_map_video()
1774 par->video.vbase = ioremap_wc(par->video.pbase, par->video.len); in savage_map_video()
1776 if (!par->video.vbase) { in savage_map_video()
1781 "pbase == %x\n", par->video.vbase, par->video.pbase); in savage_map_video()
1783 info->fix.smem_start = par->video.pbase; in savage_map_video()
1784 info->fix.smem_len = par->video.len - par->cob_size; in savage_map_video()
1785 info->screen_base = par->video.vbase; in savage_map_video()
1786 par->video.wc_cookie = arch_phys_wc_add(par->video.pbase, video_len); in savage_map_video()
1789 memset_io(par->video.vbase, 0, par->video.len); in savage_map_video()
1796 struct savagefb_par *par = info->par; in savage_unmap_video() local
1800 if (par->video.vbase) { in savage_unmap_video()
1801 arch_phys_wc_del(par->video.wc_cookie); in savage_unmap_video()
1802 iounmap(par->video.vbase); in savage_unmap_video()
1803 par->video.vbase = NULL; in savage_unmap_video()
1808 static int savage_init_hw(struct savagefb_par *par) in savage_init_hw() argument
1821 vga_out8(0x3d4, 0x11, par); in savage_init_hw()
1822 tmp = vga_in8(0x3d5, par); in savage_init_hw()
1823 vga_out8(0x3d5, tmp & 0x7f, par); in savage_init_hw()
1826 vga_out16(0x3d4, 0x4838, par); in savage_init_hw()
1827 vga_out16(0x3d4, 0xa039, par); in savage_init_hw()
1828 vga_out16(0x3c4, 0x0608, par); in savage_init_hw()
1830 vga_out8(0x3d4, 0x40, par); in savage_init_hw()
1831 tmp = vga_in8(0x3d5, par); in savage_init_hw()
1832 vga_out8(0x3d5, tmp & ~0x01, par); in savage_init_hw()
1835 vga_out8(0x3d4, 0x38, par); in savage_init_hw()
1836 vga_out8(0x3d5, 0x48, par); in savage_init_hw()
1839 vga_out16(0x3d4, 0x4838, par); in savage_init_hw()
1843 vga_out8(0x3d4, 0x36, par); /* for register CR36 (CONFG_REG1), */ in savage_init_hw()
1844 config1 = vga_in8(0x3d5, par); /* get amount of vram installed */ in savage_init_hw()
1848 switch (par->chip) { in savage_init_hw()
1860 vga_out8(0x3d4, 0x68, par); /* memory control 1 */ in savage_init_hw()
1861 if ((vga_in8(0x3d5, par) & 0xC0) == (0x01 << 6)) in savage_init_hw()
1891 vga_out8(0x3d4, 0x66, par); in savage_init_hw()
1892 cr66 = vga_in8(0x3d5, par); in savage_init_hw()
1893 vga_out8(0x3d5, cr66 | 0x02, par); in savage_init_hw()
1896 vga_out8(0x3d4, 0x66, par); in savage_init_hw()
1897 vga_out8(0x3d5, cr66 & ~0x02, par); /* clear reset flag */ in savage_init_hw()
1905 vga_out8(0x3d4, 0x3f, par); in savage_init_hw()
1906 cr3f = vga_in8(0x3d5, par); in savage_init_hw()
1907 vga_out8(0x3d5, cr3f | 0x08, par); in savage_init_hw()
1910 vga_out8(0x3d4, 0x3f, par); in savage_init_hw()
1911 vga_out8(0x3d5, cr3f & ~0x08, par); /* clear reset flags */ in savage_init_hw()
1915 par->numClocks = 4; in savage_init_hw()
1916 par->clock[0] = 250000; in savage_init_hw()
1917 par->clock[1] = 250000; in savage_init_hw()
1918 par->clock[2] = 220000; in savage_init_hw()
1919 par->clock[3] = 220000; in savage_init_hw()
1922 vga_out8(0x3c4, 0x08, par); in savage_init_hw()
1923 sr8 = vga_in8(0x3c5, par); in savage_init_hw()
1924 vga_out8(0x3c5, 0x06, par); in savage_init_hw()
1925 vga_out8(0x3c4, 0x10, par); in savage_init_hw()
1926 n = vga_in8(0x3c5, par); in savage_init_hw()
1927 vga_out8(0x3c4, 0x11, par); in savage_init_hw()
1928 m = vga_in8(0x3c5, par); in savage_init_hw()
1929 vga_out8(0x3c4, 0x08, par); in savage_init_hw()
1930 vga_out8(0x3c5, sr8, par); in savage_init_hw()
1934 par->MCLK = ((1431818 * (m+2)) / (n1+2) / (1 << n2) + 50) / 100; in savage_init_hw()
1936 par->MCLK); in savage_init_hw()
1941 if (par->chip == S3_SAVAGE4) { in savage_init_hw()
1944 vga_out8(0x3c4, 0x30, par); in savage_init_hw()
1946 vga_out8(0x3c5, vga_in8(0x3c5, par) & ~0x02, par); in savage_init_hw()
1947 sr30 = vga_in8(0x3c5, par); in savage_init_hw()
1954 if ((S3_SAVAGE_MOBILE_SERIES(par->chip) || in savage_init_hw()
1955 S3_MOBILE_TWISTER_SERIES(par->chip)) && !par->crtonly) in savage_init_hw()
1956 par->display_type = DISP_LCD; in savage_init_hw()
1957 else if (dvi || (par->chip == S3_SAVAGE4 && par->dvi)) in savage_init_hw()
1958 par->display_type = DISP_DFP; in savage_init_hw()
1960 par->display_type = DISP_CRT; in savage_init_hw()
1964 if (par->display_type == DISP_LCD) { in savage_init_hw()
1965 unsigned char cr6b = VGArCR(0x6b, par); in savage_init_hw()
1967 int panelX = (VGArSEQ(0x61, par) + in savage_init_hw()
1968 ((VGArSEQ(0x66, par) & 0x02) << 7) + 1) * 8; in savage_init_hw()
1969 int panelY = (VGArSEQ(0x69, par) + in savage_init_hw()
1970 ((VGArSEQ(0x6e, par) & 0x70) << 4) + 1); in savage_init_hw()
1992 if ((VGArSEQ(0x39, par) & 0x03) == 0) { in savage_init_hw()
1994 } else if ((VGArSEQ(0x30, par) & 0x01) == 0) { in savage_init_hw()
2013 par->SavagePanelWidth = panelX; in savage_init_hw()
2014 par->SavagePanelHeight = panelY; in savage_init_hw()
2017 par->display_type = DISP_CRT; in savage_init_hw()
2020 savage_get_default_par(par, &par->state); in savage_init_hw()
2021 par->save = par->state; in savage_init_hw()
2023 if (S3_SAVAGE4_SERIES(par->chip)) { in savage_init_hw()
2028 par->cob_index = 2; in savage_init_hw()
2029 par->cob_size = 0x8000 << par->cob_index; in savage_init_hw()
2030 par->cob_offset = videoRambytes; in savage_init_hw()
2034 par->cob_index = 7; in savage_init_hw()
2035 par->cob_size = 0x400 << par->cob_index; in savage_init_hw()
2036 par->cob_offset = videoRambytes - par->cob_size; in savage_init_hw()
2045 struct savagefb_par *par = info->par; in savage_init_fb_info() local
2048 par->pcidev = dev; in savage_init_fb_info()
2058 par->chip = S3_SUPERSAVAGE; in savage_init_fb_info()
2062 par->chip = S3_SAVAGE4; in savage_init_fb_info()
2066 par->chip = S3_SAVAGE3D; in savage_init_fb_info()
2070 par->chip = S3_SAVAGE3D; in savage_init_fb_info()
2074 par->chip = S3_SAVAGE2000; in savage_init_fb_info()
2078 par->chip = S3_SAVAGE_MX; in savage_init_fb_info()
2082 par->chip = S3_SAVAGE_MX; in savage_init_fb_info()
2086 par->chip = S3_SAVAGE_MX; in savage_init_fb_info()
2090 par->chip = S3_SAVAGE_MX; in savage_init_fb_info()
2094 par->chip = S3_PROSAVAGE; in savage_init_fb_info()
2098 par->chip = S3_PROSAVAGE; in savage_init_fb_info()
2102 par->chip = S3_TWISTER; in savage_init_fb_info()
2106 par->chip = S3_TWISTER; in savage_init_fb_info()
2110 par->chip = S3_PROSAVAGEDDR; in savage_init_fb_info()
2114 par->chip = S3_PROSAVAGEDDR; in savage_init_fb_info()
2119 if (S3_SAVAGE3D_SERIES(par->chip)) { in savage_init_fb_info()
2120 par->SavageWaitIdle = savage3D_waitidle; in savage_init_fb_info()
2121 par->SavageWaitFifo = savage3D_waitfifo; in savage_init_fb_info()
2122 } else if (S3_SAVAGE4_SERIES(par->chip) || in savage_init_fb_info()
2123 S3_SUPERSAVAGE == par->chip) { in savage_init_fb_info()
2124 par->SavageWaitIdle = savage4_waitidle; in savage_init_fb_info()
2125 par->SavageWaitFifo = savage4_waitfifo; in savage_init_fb_info()
2127 par->SavageWaitIdle = savage2000_waitidle; in savage_init_fb_info()
2128 par->SavageWaitFifo = savage2000_waitfifo; in savage_init_fb_info()
2142 info->pseudo_palette = par->pseudo_palette; in savage_init_fb_info()
2172 struct savagefb_par *par; in savagefb_probe() local
2187 par = info->par; in savagefb_probe()
2188 mutex_init(&par->open_lock); in savagefb_probe()
2207 video_len = savage_init_hw(par); in savagefb_probe()
2230 if (par->SavagePanelWidth) { in savagefb_probe()
2234 cvt_mode.xres = par->SavagePanelWidth; in savagefb_probe()
2235 cvt_mode.yres = par->SavagePanelHeight; in savagefb_probe()
2359 struct savagefb_par *par = info->par; in savagefb_suspend_late() local
2365 par->pm_state = mesg.event; in savagefb_suspend_late()
2382 savage_set_default_par(par, &par->save); in savagefb_suspend_late()
2383 savage_disable_mmio(par); in savagefb_suspend_late()
2407 struct savagefb_par *par = info->par; in savagefb_resume() local
2408 int cur_state = par->pm_state; in savagefb_resume()
2412 par->pm_state = PM_EVENT_ON; in savagefb_resume()
2423 savage_enable_mmio(par); in savagefb_resume()
2424 savage_init_hw(par); in savagefb_resume()