Lines Matching refs:VIASR
668 viafb_write_reg_mask(0x1A, VIASR, 0x00, 0x01); in viafb_set_primary_color_register()
674 viafb_write_reg_mask(0x1A, VIASR, 0x01, 0x01); in viafb_set_secondary_color_register()
713 via_write_reg_mask(VIASR, 0x16, value, 0x40); in set_crt_source()
803 via_write_reg_mask(VIASR, 0x1E, value, 0xC0); in set_dvp0_state()
821 via_write_reg_mask(VIASR, 0x1E, value, 0x30); in set_dvp1_state()
839 via_write_reg_mask(VIASR, 0x2A, value, 0x03); in set_lvds1_state()
857 via_write_reg_mask(VIASR, 0x2A, value, 0x0C); in set_lvds2_state()
960 viafb_write_reg_mask(SR1A, VIASR, 0x02, BIT1); in load_fix_bit_crtc_reg()
995 viafb_write_reg_mask(cr_index, VIASR, data, reg_mask); in viafb_load_reg()
1024 viafb_load_reg(reg_value, viafb_load_reg_num, reg, VIASR); in viafb_load_fetch_count_reg()
1163 viafb_load_reg(reg_value, viafb_load_reg_num, reg, VIASR); in viafb_load_FIFO_reg()
1173 viafb_load_reg(reg_value, viafb_load_reg_num, reg, VIASR); in viafb_load_FIFO_reg()
1184 viafb_load_reg(reg_value, viafb_load_reg_num, reg, VIASR); in viafb_load_FIFO_reg()
1196 viafb_load_reg(reg_value, viafb_load_reg_num, reg, VIASR); in viafb_load_FIFO_reg()
1550 tmp = viafb_read_reg(VIASR, SR43); in init_gfx_chip_info()
1667 viafb_write_reg_mask(SR1A, VIASR, 0x00, BIT0); in viafb_init_dac()
1669 viafb_write_reg_mask(SR1B, VIASR, 0x00, BIT7 + BIT6); in viafb_init_dac()
1676 viafb_write_reg_mask(SR1B, VIASR, 0xC0, BIT7 + BIT6); in viafb_init_dac()
1681 viafb_write_reg_mask(SR1A, VIASR, 0x01, BIT0); in viafb_init_dac()
1688 viafb_write_reg_mask(SR1A, VIASR, 0x00, BIT0); in viafb_init_dac()
1696 viafb_write_reg_mask(SR01, VIASR, 0x20, BIT5); in device_screen_off()
1702 viafb_write_reg_mask(SR01, VIASR, 0x00, BIT5); in device_screen_on()
1798 via_write_reg(VIASR, i, VPIT.SR[i - 1]); in hw_init()
1800 viafb_write_reg_mask(0x15, VIASR, 0xA2, 0xA2); in hw_init()
2057 viafb_write_reg_mask(SR1E, VIASR, in viafb_set_dpa_gfx()
2059 viafb_write_reg_mask(SR2A, VIASR, in viafb_set_dpa_gfx()
2062 viafb_write_reg_mask(SR1B, VIASR, in viafb_set_dpa_gfx()
2064 viafb_write_reg_mask(SR2A, VIASR, in viafb_set_dpa_gfx()
2076 viafb_write_reg_mask(SR65, VIASR, in viafb_set_dpa_gfx()