Lines Matching refs:wdt
298 static inline unsigned long s3c2410wdt_get_freq(struct s3c2410_wdt *wdt) in s3c2410wdt_get_freq() argument
300 return clk_get_rate(wdt->src_clk ? wdt->src_clk : wdt->bus_clk); in s3c2410wdt_get_freq()
303 static inline unsigned int s3c2410wdt_max_timeout(struct s3c2410_wdt *wdt) in s3c2410wdt_max_timeout() argument
305 const unsigned long freq = s3c2410wdt_get_freq(wdt); in s3c2410wdt_max_timeout()
316 static int s3c2410wdt_disable_wdt_reset(struct s3c2410_wdt *wdt, bool mask) in s3c2410wdt_disable_wdt_reset() argument
318 const u32 mask_val = BIT(wdt->drv_data->mask_bit); in s3c2410wdt_disable_wdt_reset()
322 ret = regmap_update_bits(wdt->pmureg, wdt->drv_data->disable_reg, in s3c2410wdt_disable_wdt_reset()
325 dev_err(wdt->dev, "failed to update reg(%d)\n", ret); in s3c2410wdt_disable_wdt_reset()
330 static int s3c2410wdt_mask_wdt_reset(struct s3c2410_wdt *wdt, bool mask) in s3c2410wdt_mask_wdt_reset() argument
332 const u32 mask_val = BIT(wdt->drv_data->mask_bit); in s3c2410wdt_mask_wdt_reset()
333 const bool val_inv = wdt->drv_data->mask_reset_inv; in s3c2410wdt_mask_wdt_reset()
337 ret = regmap_update_bits(wdt->pmureg, wdt->drv_data->mask_reset_reg, in s3c2410wdt_mask_wdt_reset()
340 dev_err(wdt->dev, "failed to update reg(%d)\n", ret); in s3c2410wdt_mask_wdt_reset()
345 static int s3c2410wdt_enable_counter(struct s3c2410_wdt *wdt, bool en) in s3c2410wdt_enable_counter() argument
347 const u32 mask_val = BIT(wdt->drv_data->cnt_en_bit); in s3c2410wdt_enable_counter()
351 ret = regmap_update_bits(wdt->pmureg, wdt->drv_data->cnt_en_reg, in s3c2410wdt_enable_counter()
354 dev_err(wdt->dev, "failed to update reg(%d)\n", ret); in s3c2410wdt_enable_counter()
359 static int s3c2410wdt_enable(struct s3c2410_wdt *wdt, bool en) in s3c2410wdt_enable() argument
363 if (wdt->drv_data->quirks & QUIRK_HAS_PMU_AUTO_DISABLE) { in s3c2410wdt_enable()
364 ret = s3c2410wdt_disable_wdt_reset(wdt, !en); in s3c2410wdt_enable()
369 if (wdt->drv_data->quirks & QUIRK_HAS_PMU_MASK_RESET) { in s3c2410wdt_enable()
370 ret = s3c2410wdt_mask_wdt_reset(wdt, !en); in s3c2410wdt_enable()
375 if (wdt->drv_data->quirks & QUIRK_HAS_PMU_CNT_EN) { in s3c2410wdt_enable()
376 ret = s3c2410wdt_enable_counter(wdt, en); in s3c2410wdt_enable()
386 struct s3c2410_wdt *wdt = watchdog_get_drvdata(wdd); in s3c2410wdt_keepalive() local
388 spin_lock(&wdt->lock); in s3c2410wdt_keepalive()
389 writel(wdt->count, wdt->reg_base + S3C2410_WTCNT); in s3c2410wdt_keepalive()
390 spin_unlock(&wdt->lock); in s3c2410wdt_keepalive()
395 static void __s3c2410wdt_stop(struct s3c2410_wdt *wdt) in __s3c2410wdt_stop() argument
399 wtcon = readl(wdt->reg_base + S3C2410_WTCON); in __s3c2410wdt_stop()
401 writel(wtcon, wdt->reg_base + S3C2410_WTCON); in __s3c2410wdt_stop()
406 struct s3c2410_wdt *wdt = watchdog_get_drvdata(wdd); in s3c2410wdt_stop() local
408 spin_lock(&wdt->lock); in s3c2410wdt_stop()
409 __s3c2410wdt_stop(wdt); in s3c2410wdt_stop()
410 spin_unlock(&wdt->lock); in s3c2410wdt_stop()
418 struct s3c2410_wdt *wdt = watchdog_get_drvdata(wdd); in s3c2410wdt_start() local
420 spin_lock(&wdt->lock); in s3c2410wdt_start()
422 __s3c2410wdt_stop(wdt); in s3c2410wdt_start()
424 wtcon = readl(wdt->reg_base + S3C2410_WTCON); in s3c2410wdt_start()
435 dev_dbg(wdt->dev, "Starting watchdog: count=0x%08x, wtcon=%08lx\n", in s3c2410wdt_start()
436 wdt->count, wtcon); in s3c2410wdt_start()
438 writel(wdt->count, wdt->reg_base + S3C2410_WTDAT); in s3c2410wdt_start()
439 writel(wdt->count, wdt->reg_base + S3C2410_WTCNT); in s3c2410wdt_start()
440 writel(wtcon, wdt->reg_base + S3C2410_WTCON); in s3c2410wdt_start()
441 spin_unlock(&wdt->lock); in s3c2410wdt_start()
446 static inline int s3c2410wdt_is_running(struct s3c2410_wdt *wdt) in s3c2410wdt_is_running() argument
448 return readl(wdt->reg_base + S3C2410_WTCON) & S3C2410_WTCON_ENABLE; in s3c2410wdt_is_running()
454 struct s3c2410_wdt *wdt = watchdog_get_drvdata(wdd); in s3c2410wdt_set_heartbeat() local
455 unsigned long freq = s3c2410wdt_get_freq(wdt); in s3c2410wdt_set_heartbeat()
466 dev_dbg(wdt->dev, "Heartbeat: count=%d, timeout=%d, freq=%lu\n", in s3c2410wdt_set_heartbeat()
478 dev_err(wdt->dev, "timeout %d too big\n", timeout); in s3c2410wdt_set_heartbeat()
483 dev_dbg(wdt->dev, "Heartbeat: timeout=%d, divisor=%d, count=%d (%08x)\n", in s3c2410wdt_set_heartbeat()
487 wdt->count = count; in s3c2410wdt_set_heartbeat()
490 wtcon = readl(wdt->reg_base + S3C2410_WTCON); in s3c2410wdt_set_heartbeat()
494 writel(count, wdt->reg_base + S3C2410_WTDAT); in s3c2410wdt_set_heartbeat()
495 writel(wtcon, wdt->reg_base + S3C2410_WTCON); in s3c2410wdt_set_heartbeat()
505 struct s3c2410_wdt *wdt = watchdog_get_drvdata(wdd); in s3c2410wdt_restart() local
506 void __iomem *wdt_base = wdt->reg_base; in s3c2410wdt_restart()
553 struct s3c2410_wdt *wdt = platform_get_drvdata(param); in s3c2410wdt_irq() local
555 dev_info(wdt->dev, "watchdog timer expired (irq)\n"); in s3c2410wdt_irq()
557 s3c2410wdt_keepalive(&wdt->wdt_device); in s3c2410wdt_irq()
559 if (wdt->drv_data->quirks & QUIRK_HAS_WTCLRINT_REG) in s3c2410wdt_irq()
560 writel(0x1, wdt->reg_base + S3C2410_WTCLRINT); in s3c2410wdt_irq()
565 static inline unsigned int s3c2410wdt_get_bootstatus(struct s3c2410_wdt *wdt) in s3c2410wdt_get_bootstatus() argument
570 if (!(wdt->drv_data->quirks & QUIRK_HAS_PMU_RST_STAT)) in s3c2410wdt_get_bootstatus()
573 ret = regmap_read(wdt->pmureg, wdt->drv_data->rst_stat_reg, &rst_stat); in s3c2410wdt_get_bootstatus()
575 dev_warn(wdt->dev, "Couldn't get RST_STAT register\n"); in s3c2410wdt_get_bootstatus()
576 else if (rst_stat & BIT(wdt->drv_data->rst_stat_bit)) in s3c2410wdt_get_bootstatus()
629 struct s3c2410_wdt *wdt; in s3c2410wdt_probe() local
634 wdt = devm_kzalloc(dev, sizeof(*wdt), GFP_KERNEL); in s3c2410wdt_probe()
635 if (!wdt) in s3c2410wdt_probe()
638 wdt->dev = dev; in s3c2410wdt_probe()
639 spin_lock_init(&wdt->lock); in s3c2410wdt_probe()
640 wdt->wdt_device = s3c2410_wdd; in s3c2410wdt_probe()
642 wdt->drv_data = s3c2410_get_wdt_drv_data(pdev); in s3c2410wdt_probe()
643 if (!wdt->drv_data) in s3c2410wdt_probe()
646 if (wdt->drv_data->quirks & QUIRKS_HAVE_PMUREG) { in s3c2410wdt_probe()
647 wdt->pmureg = syscon_regmap_lookup_by_phandle(dev->of_node, in s3c2410wdt_probe()
649 if (IS_ERR(wdt->pmureg)) { in s3c2410wdt_probe()
651 return PTR_ERR(wdt->pmureg); in s3c2410wdt_probe()
660 wdt->reg_base = devm_platform_ioremap_resource(pdev, 0); in s3c2410wdt_probe()
661 if (IS_ERR(wdt->reg_base)) in s3c2410wdt_probe()
662 return PTR_ERR(wdt->reg_base); in s3c2410wdt_probe()
664 wdt->bus_clk = devm_clk_get(dev, "watchdog"); in s3c2410wdt_probe()
665 if (IS_ERR(wdt->bus_clk)) { in s3c2410wdt_probe()
667 return PTR_ERR(wdt->bus_clk); in s3c2410wdt_probe()
670 ret = clk_prepare_enable(wdt->bus_clk); in s3c2410wdt_probe()
680 wdt->src_clk = devm_clk_get_optional(dev, "watchdog_src"); in s3c2410wdt_probe()
681 if (IS_ERR(wdt->src_clk)) { in s3c2410wdt_probe()
682 dev_err_probe(dev, PTR_ERR(wdt->src_clk), in s3c2410wdt_probe()
684 ret = PTR_ERR(wdt->src_clk); in s3c2410wdt_probe()
688 ret = clk_prepare_enable(wdt->src_clk); in s3c2410wdt_probe()
694 wdt->wdt_device.min_timeout = 1; in s3c2410wdt_probe()
695 wdt->wdt_device.max_timeout = s3c2410wdt_max_timeout(wdt); in s3c2410wdt_probe()
697 watchdog_set_drvdata(&wdt->wdt_device, wdt); in s3c2410wdt_probe()
702 watchdog_init_timeout(&wdt->wdt_device, tmr_margin, dev); in s3c2410wdt_probe()
703 ret = s3c2410wdt_set_heartbeat(&wdt->wdt_device, in s3c2410wdt_probe()
704 wdt->wdt_device.timeout); in s3c2410wdt_probe()
706 ret = s3c2410wdt_set_heartbeat(&wdt->wdt_device, in s3c2410wdt_probe()
724 watchdog_set_nowayout(&wdt->wdt_device, nowayout); in s3c2410wdt_probe()
725 watchdog_set_restart_priority(&wdt->wdt_device, 128); in s3c2410wdt_probe()
727 wdt->wdt_device.bootstatus = s3c2410wdt_get_bootstatus(wdt); in s3c2410wdt_probe()
728 wdt->wdt_device.parent = dev; in s3c2410wdt_probe()
739 s3c2410wdt_start(&wdt->wdt_device); in s3c2410wdt_probe()
740 set_bit(WDOG_HW_RUNNING, &wdt->wdt_device.status); in s3c2410wdt_probe()
742 s3c2410wdt_stop(&wdt->wdt_device); in s3c2410wdt_probe()
745 ret = watchdog_register_device(&wdt->wdt_device); in s3c2410wdt_probe()
749 ret = s3c2410wdt_enable(wdt, true); in s3c2410wdt_probe()
753 platform_set_drvdata(pdev, wdt); in s3c2410wdt_probe()
757 wtcon = readl(wdt->reg_base + S3C2410_WTCON); in s3c2410wdt_probe()
767 watchdog_unregister_device(&wdt->wdt_device); in s3c2410wdt_probe()
770 clk_disable_unprepare(wdt->src_clk); in s3c2410wdt_probe()
773 clk_disable_unprepare(wdt->bus_clk); in s3c2410wdt_probe()
781 struct s3c2410_wdt *wdt = platform_get_drvdata(dev); in s3c2410wdt_remove() local
783 ret = s3c2410wdt_enable(wdt, false); in s3c2410wdt_remove()
787 watchdog_unregister_device(&wdt->wdt_device); in s3c2410wdt_remove()
789 clk_disable_unprepare(wdt->src_clk); in s3c2410wdt_remove()
790 clk_disable_unprepare(wdt->bus_clk); in s3c2410wdt_remove()
797 struct s3c2410_wdt *wdt = platform_get_drvdata(dev); in s3c2410wdt_shutdown() local
799 s3c2410wdt_enable(wdt, false); in s3c2410wdt_shutdown()
800 s3c2410wdt_stop(&wdt->wdt_device); in s3c2410wdt_shutdown()
806 struct s3c2410_wdt *wdt = dev_get_drvdata(dev); in s3c2410wdt_suspend() local
809 wdt->wtcon_save = readl(wdt->reg_base + S3C2410_WTCON); in s3c2410wdt_suspend()
810 wdt->wtdat_save = readl(wdt->reg_base + S3C2410_WTDAT); in s3c2410wdt_suspend()
812 ret = s3c2410wdt_enable(wdt, false); in s3c2410wdt_suspend()
817 s3c2410wdt_stop(&wdt->wdt_device); in s3c2410wdt_suspend()
825 struct s3c2410_wdt *wdt = dev_get_drvdata(dev); in s3c2410wdt_resume() local
828 writel(wdt->wtdat_save, wdt->reg_base + S3C2410_WTDAT); in s3c2410wdt_resume()
829 writel(wdt->wtdat_save, wdt->reg_base + S3C2410_WTCNT);/* Reset count */ in s3c2410wdt_resume()
830 writel(wdt->wtcon_save, wdt->reg_base + S3C2410_WTCON); in s3c2410wdt_resume()
832 ret = s3c2410wdt_enable(wdt, true); in s3c2410wdt_resume()
837 (wdt->wtcon_save & S3C2410_WTCON_ENABLE) ? "en" : "dis"); in s3c2410wdt_resume()