Lines Matching defs:acpi_table_fadt
199 struct acpi_table_fadt { struct
200 struct acpi_table_header header; /* Common ACPI table header */
201 u32 facs; /* 32-bit physical address of FACS */
202 u32 dsdt; /* 32-bit physical address of DSDT */
203 u8 model; /* System Interrupt Model (ACPI 1.0) - not used in ACPI 2.0+ */
204 u8 preferred_profile; /* Conveys preferred power management profile to OSPM. */
205 u16 sci_interrupt; /* System vector of SCI interrupt */
206 u32 smi_command; /* 32-bit Port address of SMI command port */
207 u8 acpi_enable; /* Value to write to SMI_CMD to enable ACPI */
208 u8 acpi_disable; /* Value to write to SMI_CMD to disable ACPI */
209 u8 s4_bios_request; /* Value to write to SMI_CMD to enter S4BIOS state */
210 u8 pstate_control; /* Processor performance state control */
211 u32 pm1a_event_block; /* 32-bit port address of Power Mgt 1a Event Reg Blk */
212 u32 pm1b_event_block; /* 32-bit port address of Power Mgt 1b Event Reg Blk */
213 u32 pm1a_control_block; /* 32-bit port address of Power Mgt 1a Control Reg Blk */
214 u32 pm1b_control_block; /* 32-bit port address of Power Mgt 1b Control Reg Blk */
215 u32 pm2_control_block; /* 32-bit port address of Power Mgt 2 Control Reg Blk */
216 u32 pm_timer_block; /* 32-bit port address of Power Mgt Timer Ctrl Reg Blk */
217 u32 gpe0_block; /* 32-bit port address of General Purpose Event 0 Reg Blk */
218 u32 gpe1_block; /* 32-bit port address of General Purpose Event 1 Reg Blk */
219 u8 pm1_event_length; /* Byte Length of ports at pm1x_event_block */
220 u8 pm1_control_length; /* Byte Length of ports at pm1x_control_block */
221 u8 pm2_control_length; /* Byte Length of ports at pm2_control_block */
222 u8 pm_timer_length; /* Byte Length of ports at pm_timer_block */
223 u8 gpe0_block_length; /* Byte Length of ports at gpe0_block */
224 u8 gpe1_block_length; /* Byte Length of ports at gpe1_block */
225 u8 gpe1_base; /* Offset in GPE number space where GPE1 events start */
226 u8 cst_control; /* Support for the _CST object and C-States change notification */
227 u16 c2_latency; /* Worst case HW latency to enter/exit C2 state */
228 u16 c3_latency; /* Worst case HW latency to enter/exit C3 state */
229 u16 flush_size; /* Processor memory cache line width, in bytes */
230 u16 flush_stride; /* Number of flush strides that need to be read */
231 u8 duty_offset; /* Processor duty cycle index in processor P_CNT reg */
232 u8 duty_width; /* Processor duty cycle value bit width in P_CNT register */
233 u8 day_alarm; /* Index to day-of-month alarm in RTC CMOS RAM */
234 u8 month_alarm; /* Index to month-of-year alarm in RTC CMOS RAM */
235 u8 century; /* Index to century in RTC CMOS RAM */
236 u16 boot_flags; /* IA-PC Boot Architecture Flags (see below for individual flags) */
237 u8 reserved; /* Reserved, must be zero */
238 u32 flags; /* Miscellaneous flag bits (see below for individual flags) */
239 struct acpi_generic_address reset_register; /* 64-bit address of the Reset register */
240 u8 reset_value; /* Value to write to the reset_register port to reset the system */
241 u16 arm_boot_flags; /* ARM-Specific Boot Flags (see below for individual flags) (ACPI 5.1) */
242 u8 minor_revision; /* FADT Minor Revision (ACPI 5.1) */
243 u64 Xfacs; /* 64-bit physical address of FACS */
244 u64 Xdsdt; /* 64-bit physical address of DSDT */
245 …ct acpi_generic_address xpm1a_event_block; /* 64-bit Extended Power Mgt 1a Event Reg Blk address */
246 …ct acpi_generic_address xpm1b_event_block; /* 64-bit Extended Power Mgt 1b Event Reg Blk address */
247 …cpi_generic_address xpm1a_control_block; /* 64-bit Extended Power Mgt 1a Control Reg Blk address */
248 …cpi_generic_address xpm1b_control_block; /* 64-bit Extended Power Mgt 1b Control Reg Blk address */
249 … acpi_generic_address xpm2_control_block; /* 64-bit Extended Power Mgt 2 Control Reg Blk address */
250 …ct acpi_generic_address xpm_timer_block; /* 64-bit Extended Power Mgt Timer Ctrl Reg Blk address */
251 …uct acpi_generic_address xgpe0_block; /* 64-bit Extended General Purpose Event 0 Reg Blk address */
252 …uct acpi_generic_address xgpe1_block; /* 64-bit Extended General Purpose Event 1 Reg Blk address */
253 struct acpi_generic_address sleep_control; /* 64-bit Sleep Control register (ACPI 5.0) */
254 struct acpi_generic_address sleep_status; /* 64-bit Sleep Status register (ACPI 5.0) */
255 u64 hypervisor_id; /* Hypervisor Vendor ID (ACPI 6.0) */