Lines Matching refs:mdev_state
128 struct mdev_state { struct
171 static int mtty_trigger_interrupt(struct mdev_state *mdev_state);
189 static void mtty_create_config_space(struct mdev_state *mdev_state) in mtty_create_config_space() argument
192 STORE_LE32((u32 *) &mdev_state->vconfig[0x0], 0x32534348); in mtty_create_config_space()
195 STORE_LE16((u16 *) &mdev_state->vconfig[0x4], 0x0001); in mtty_create_config_space()
198 STORE_LE16((u16 *) &mdev_state->vconfig[0x6], 0x0200); in mtty_create_config_space()
201 mdev_state->vconfig[0x8] = 0x10; in mtty_create_config_space()
204 mdev_state->vconfig[0x9] = 0x02; in mtty_create_config_space()
207 mdev_state->vconfig[0xa] = 0x00; in mtty_create_config_space()
210 mdev_state->vconfig[0xb] = 0x07; in mtty_create_config_space()
214 STORE_LE32((u32 *) &mdev_state->vconfig[0x10], 0x000001); in mtty_create_config_space()
215 mdev_state->bar_mask[0] = ~(MTTY_IO_BAR_SIZE) + 1; in mtty_create_config_space()
217 if (mdev_state->nr_ports == 2) { in mtty_create_config_space()
219 STORE_LE32((u32 *) &mdev_state->vconfig[0x14], 0x000001); in mtty_create_config_space()
220 mdev_state->bar_mask[1] = ~(MTTY_IO_BAR_SIZE) + 1; in mtty_create_config_space()
224 STORE_LE32((u32 *) &mdev_state->vconfig[0x2c], 0x32534348); in mtty_create_config_space()
226 mdev_state->vconfig[0x34] = 0x00; /* Cap Ptr */ in mtty_create_config_space()
227 mdev_state->vconfig[0x3d] = 0x01; /* interrupt pin (INTA#) */ in mtty_create_config_space()
230 mdev_state->vconfig[0x40] = 0x23; in mtty_create_config_space()
231 mdev_state->vconfig[0x43] = 0x80; in mtty_create_config_space()
232 mdev_state->vconfig[0x44] = 0x23; in mtty_create_config_space()
233 mdev_state->vconfig[0x48] = 0x23; in mtty_create_config_space()
234 mdev_state->vconfig[0x4c] = 0x23; in mtty_create_config_space()
236 mdev_state->vconfig[0x60] = 0x50; in mtty_create_config_space()
237 mdev_state->vconfig[0x61] = 0x43; in mtty_create_config_space()
238 mdev_state->vconfig[0x62] = 0x49; in mtty_create_config_space()
239 mdev_state->vconfig[0x63] = 0x20; in mtty_create_config_space()
240 mdev_state->vconfig[0x64] = 0x53; in mtty_create_config_space()
241 mdev_state->vconfig[0x65] = 0x65; in mtty_create_config_space()
242 mdev_state->vconfig[0x66] = 0x72; in mtty_create_config_space()
243 mdev_state->vconfig[0x67] = 0x69; in mtty_create_config_space()
244 mdev_state->vconfig[0x68] = 0x61; in mtty_create_config_space()
245 mdev_state->vconfig[0x69] = 0x6c; in mtty_create_config_space()
246 mdev_state->vconfig[0x6a] = 0x2f; in mtty_create_config_space()
247 mdev_state->vconfig[0x6b] = 0x55; in mtty_create_config_space()
248 mdev_state->vconfig[0x6c] = 0x41; in mtty_create_config_space()
249 mdev_state->vconfig[0x6d] = 0x52; in mtty_create_config_space()
250 mdev_state->vconfig[0x6e] = 0x54; in mtty_create_config_space()
253 static void handle_pci_cfg_write(struct mdev_state *mdev_state, u16 offset, in handle_pci_cfg_write() argument
264 mdev_state->vconfig[0x3c] = buf[0]; in handle_pci_cfg_write()
279 if ((mdev_state->nr_ports == 1) && (bar_index == 1)) { in handle_pci_cfg_write()
280 STORE_LE32(&mdev_state->vconfig[offset], 0); in handle_pci_cfg_write()
288 bar_mask = mdev_state->bar_mask[bar_index]; in handle_pci_cfg_write()
292 cfg_addr |= (mdev_state->vconfig[offset] & 0x3ul); in handle_pci_cfg_write()
293 STORE_LE32(&mdev_state->vconfig[offset], cfg_addr); in handle_pci_cfg_write()
298 STORE_LE32(&mdev_state->vconfig[offset], 0); in handle_pci_cfg_write()
307 static void handle_bar_write(unsigned int index, struct mdev_state *mdev_state, in handle_bar_write() argument
316 if (mdev_state->s[index].dlab) { in handle_bar_write()
317 mdev_state->s[index].divisor |= data; in handle_bar_write()
321 mutex_lock(&mdev_state->rxtx_lock); in handle_bar_write()
324 if (mdev_state->s[index].rxtx.count < in handle_bar_write()
325 mdev_state->s[index].max_fifo_size) { in handle_bar_write()
326 mdev_state->s[index].rxtx.fifo[ in handle_bar_write()
327 mdev_state->s[index].rxtx.head] = data; in handle_bar_write()
328 mdev_state->s[index].rxtx.count++; in handle_bar_write()
329 CIRCULAR_BUF_INC_IDX(mdev_state->s[index].rxtx.head); in handle_bar_write()
330 mdev_state->s[index].overrun = false; in handle_bar_write()
336 if ((mdev_state->s[index].uart_reg[UART_IER] & in handle_bar_write()
338 (mdev_state->s[index].rxtx.count == in handle_bar_write()
339 mdev_state->s[index].intr_trigger_level)) { in handle_bar_write()
345 mtty_trigger_interrupt(mdev_state); in handle_bar_write()
351 mdev_state->s[index].overrun = true; in handle_bar_write()
357 if (mdev_state->s[index].uart_reg[UART_IER] & in handle_bar_write()
359 mtty_trigger_interrupt(mdev_state); in handle_bar_write()
361 mutex_unlock(&mdev_state->rxtx_lock); in handle_bar_write()
366 if (mdev_state->s[index].dlab) in handle_bar_write()
367 mdev_state->s[index].divisor |= (u16)data << 8; in handle_bar_write()
369 mdev_state->s[index].uart_reg[offset] = data; in handle_bar_write()
370 mutex_lock(&mdev_state->rxtx_lock); in handle_bar_write()
372 (mdev_state->s[index].rxtx.head == in handle_bar_write()
373 mdev_state->s[index].rxtx.tail)) { in handle_bar_write()
378 mtty_trigger_interrupt(mdev_state); in handle_bar_write()
381 mutex_unlock(&mdev_state->rxtx_lock); in handle_bar_write()
387 mdev_state->s[index].fcr = data; in handle_bar_write()
389 mutex_lock(&mdev_state->rxtx_lock); in handle_bar_write()
392 mdev_state->s[index].rxtx.count = 0; in handle_bar_write()
393 mdev_state->s[index].rxtx.head = 0; in handle_bar_write()
394 mdev_state->s[index].rxtx.tail = 0; in handle_bar_write()
396 mutex_unlock(&mdev_state->rxtx_lock); in handle_bar_write()
400 mdev_state->s[index].intr_trigger_level = 1; in handle_bar_write()
404 mdev_state->s[index].intr_trigger_level = 4; in handle_bar_write()
408 mdev_state->s[index].intr_trigger_level = 8; in handle_bar_write()
412 mdev_state->s[index].intr_trigger_level = 14; in handle_bar_write()
421 mdev_state->s[index].intr_trigger_level = 1; in handle_bar_write()
423 mdev_state->s[index].max_fifo_size = MAX_FIFO_SIZE; in handle_bar_write()
425 mdev_state->s[index].max_fifo_size = 1; in handle_bar_write()
426 mdev_state->s[index].intr_trigger_level = 1; in handle_bar_write()
433 mdev_state->s[index].dlab = true; in handle_bar_write()
434 mdev_state->s[index].divisor = 0; in handle_bar_write()
436 mdev_state->s[index].dlab = false; in handle_bar_write()
438 mdev_state->s[index].uart_reg[offset] = data; in handle_bar_write()
442 mdev_state->s[index].uart_reg[offset] = data; in handle_bar_write()
444 if ((mdev_state->s[index].uart_reg[UART_IER] & UART_IER_MSI) && in handle_bar_write()
449 mtty_trigger_interrupt(mdev_state); in handle_bar_write()
452 if ((mdev_state->s[index].uart_reg[UART_IER] & UART_IER_MSI) && in handle_bar_write()
457 mtty_trigger_interrupt(mdev_state); in handle_bar_write()
467 mdev_state->s[index].uart_reg[offset] = data; in handle_bar_write()
475 static void handle_bar_read(unsigned int index, struct mdev_state *mdev_state, in handle_bar_read() argument
482 if (mdev_state->s[index].dlab) { in handle_bar_read()
483 *buf = (u8)mdev_state->s[index].divisor; in handle_bar_read()
487 mutex_lock(&mdev_state->rxtx_lock); in handle_bar_read()
489 if (mdev_state->s[index].rxtx.head != in handle_bar_read()
490 mdev_state->s[index].rxtx.tail) { in handle_bar_read()
491 *buf = mdev_state->s[index].rxtx.fifo[ in handle_bar_read()
492 mdev_state->s[index].rxtx.tail]; in handle_bar_read()
493 mdev_state->s[index].rxtx.count--; in handle_bar_read()
494 CIRCULAR_BUF_INC_IDX(mdev_state->s[index].rxtx.tail); in handle_bar_read()
497 if (mdev_state->s[index].rxtx.head == in handle_bar_read()
498 mdev_state->s[index].rxtx.tail) { in handle_bar_read()
506 if (mdev_state->s[index].uart_reg[UART_IER] & in handle_bar_read()
508 mtty_trigger_interrupt(mdev_state); in handle_bar_read()
510 mutex_unlock(&mdev_state->rxtx_lock); in handle_bar_read()
515 if (mdev_state->s[index].dlab) { in handle_bar_read()
516 *buf = (u8)(mdev_state->s[index].divisor >> 8); in handle_bar_read()
519 *buf = mdev_state->s[index].uart_reg[offset] & 0x0f; in handle_bar_read()
524 u8 ier = mdev_state->s[index].uart_reg[UART_IER]; in handle_bar_read()
527 mutex_lock(&mdev_state->rxtx_lock); in handle_bar_read()
529 if ((ier & UART_IER_RLSI) && mdev_state->s[index].overrun) in handle_bar_read()
534 (mdev_state->s[index].rxtx.count >= in handle_bar_read()
535 mdev_state->s[index].intr_trigger_level)) in handle_bar_read()
540 (mdev_state->s[index].rxtx.head == in handle_bar_read()
541 mdev_state->s[index].rxtx.tail)) in handle_bar_read()
546 (mdev_state->s[index].uart_reg[UART_MCR] & in handle_bar_read()
556 mutex_unlock(&mdev_state->rxtx_lock); in handle_bar_read()
562 *buf = mdev_state->s[index].uart_reg[offset]; in handle_bar_read()
569 mutex_lock(&mdev_state->rxtx_lock); in handle_bar_read()
571 if (mdev_state->s[index].rxtx.head != in handle_bar_read()
572 mdev_state->s[index].rxtx.tail) in handle_bar_read()
576 if (mdev_state->s[index].overrun) in handle_bar_read()
580 if (mdev_state->s[index].rxtx.head == in handle_bar_read()
581 mdev_state->s[index].rxtx.tail) in handle_bar_read()
584 mutex_unlock(&mdev_state->rxtx_lock); in handle_bar_read()
591 mutex_lock(&mdev_state->rxtx_lock); in handle_bar_read()
593 if (mdev_state->s[index].uart_reg[UART_MCR] & in handle_bar_read()
595 if (mdev_state->s[index].rxtx.count < in handle_bar_read()
596 mdev_state->s[index].max_fifo_size) in handle_bar_read()
600 mutex_unlock(&mdev_state->rxtx_lock); in handle_bar_read()
605 *buf = mdev_state->s[index].uart_reg[offset]; in handle_bar_read()
613 static void mdev_read_base(struct mdev_state *mdev_state) in mdev_read_base() argument
623 if (!mdev_state->region_info[index].size) in mdev_read_base()
626 start_lo = (*(u32 *)(mdev_state->vconfig + pos)) & in mdev_read_base()
628 mem_type = (*(u32 *)(mdev_state->vconfig + pos)) & in mdev_read_base()
633 start_hi = (*(u32 *)(mdev_state->vconfig + pos + 4)); in mdev_read_base()
645 mdev_state->region_info[index].start = ((u64)start_hi << 32) | in mdev_read_base()
650 static ssize_t mdev_access(struct mdev_state *mdev_state, u8 *buf, size_t count, in mdev_access() argument
660 mutex_lock(&mdev_state->ops_lock); in mdev_access()
673 handle_pci_cfg_write(mdev_state, offset, buf, count); in mdev_access()
675 memcpy(buf, (mdev_state->vconfig + offset), count); in mdev_access()
682 if (!mdev_state->region_info[index].start) in mdev_access()
683 mdev_read_base(mdev_state); in mdev_access()
691 *buf, mdev_state->s[index].dlab); in mdev_access()
693 handle_bar_write(index, mdev_state, offset, buf, count); in mdev_access()
695 handle_bar_read(index, mdev_state, offset, buf, count); in mdev_access()
701 *buf, mdev_state->s[index].dlab); in mdev_access()
715 mutex_unlock(&mdev_state->ops_lock); in mdev_access()
722 struct mdev_state *mdev_state = in mtty_init_dev() local
723 container_of(vdev, struct mdev_state, vdev); in mtty_init_dev()
737 mdev_state->nr_ports = type->nr_ports; in mtty_init_dev()
738 mdev_state->irq_index = -1; in mtty_init_dev()
739 mdev_state->s[0].max_fifo_size = MAX_FIFO_SIZE; in mtty_init_dev()
740 mdev_state->s[1].max_fifo_size = MAX_FIFO_SIZE; in mtty_init_dev()
741 mutex_init(&mdev_state->rxtx_lock); in mtty_init_dev()
743 mdev_state->vconfig = kzalloc(MTTY_CONFIG_SPACE_SIZE, GFP_KERNEL); in mtty_init_dev()
744 if (!mdev_state->vconfig) { in mtty_init_dev()
749 mutex_init(&mdev_state->ops_lock); in mtty_init_dev()
750 mdev_state->mdev = mdev; in mtty_init_dev()
751 mtty_create_config_space(mdev_state); in mtty_init_dev()
761 struct mdev_state *mdev_state; in mtty_probe() local
764 mdev_state = vfio_alloc_device(mdev_state, vdev, &mdev->dev, in mtty_probe()
766 if (IS_ERR(mdev_state)) in mtty_probe()
767 return PTR_ERR(mdev_state); in mtty_probe()
769 ret = vfio_register_emulated_iommu_dev(&mdev_state->vdev); in mtty_probe()
772 dev_set_drvdata(&mdev->dev, mdev_state); in mtty_probe()
776 vfio_put_device(&mdev_state->vdev); in mtty_probe()
782 struct mdev_state *mdev_state = in mtty_release_dev() local
783 container_of(vdev, struct mdev_state, vdev); in mtty_release_dev()
785 atomic_add(mdev_state->nr_ports, &mdev_avail_ports); in mtty_release_dev()
786 kfree(mdev_state->vconfig); in mtty_release_dev()
791 struct mdev_state *mdev_state = dev_get_drvdata(&mdev->dev); in mtty_remove() local
793 vfio_unregister_group_dev(&mdev_state->vdev); in mtty_remove()
794 vfio_put_device(&mdev_state->vdev); in mtty_remove()
797 static int mtty_reset(struct mdev_state *mdev_state) in mtty_reset() argument
807 struct mdev_state *mdev_state = in mtty_read() local
808 container_of(vdev, struct mdev_state, vdev); in mtty_read()
818 ret = mdev_access(mdev_state, (u8 *)&val, sizeof(val), in mtty_read()
830 ret = mdev_access(mdev_state, (u8 *)&val, sizeof(val), in mtty_read()
842 ret = mdev_access(mdev_state, (u8 *)&val, sizeof(val), in mtty_read()
868 struct mdev_state *mdev_state = in mtty_write() local
869 container_of(vdev, struct mdev_state, vdev); in mtty_write()
882 ret = mdev_access(mdev_state, (u8 *)&val, sizeof(val), in mtty_write()
894 ret = mdev_access(mdev_state, (u8 *)&val, sizeof(val), in mtty_write()
906 ret = mdev_access(mdev_state, (u8 *)&val, sizeof(val), in mtty_write()
924 static int mtty_set_irqs(struct mdev_state *mdev_state, uint32_t flags, in mtty_set_irqs() argument
930 mutex_lock(&mdev_state->ops_lock); in mtty_set_irqs()
941 if (mdev_state->intx_evtfd) in mtty_set_irqs()
942 eventfd_ctx_put(mdev_state->intx_evtfd); in mtty_set_irqs()
957 mdev_state->intx_evtfd = evt; in mtty_set_irqs()
958 mdev_state->irq_fd = fd; in mtty_set_irqs()
959 mdev_state->irq_index = index; in mtty_set_irqs()
974 if (mdev_state->msi_evtfd) in mtty_set_irqs()
975 eventfd_ctx_put(mdev_state->msi_evtfd); in mtty_set_irqs()
977 mdev_state->irq_index = VFIO_PCI_INTX_IRQ_INDEX; in mtty_set_irqs()
987 if (mdev_state->msi_evtfd) in mtty_set_irqs()
995 mdev_state->msi_evtfd = evt; in mtty_set_irqs()
996 mdev_state->irq_fd = fd; in mtty_set_irqs()
997 mdev_state->irq_index = index; in mtty_set_irqs()
1013 mutex_unlock(&mdev_state->ops_lock); in mtty_set_irqs()
1017 static int mtty_trigger_interrupt(struct mdev_state *mdev_state) in mtty_trigger_interrupt() argument
1021 if ((mdev_state->irq_index == VFIO_PCI_MSI_IRQ_INDEX) && in mtty_trigger_interrupt()
1022 (!mdev_state->msi_evtfd)) in mtty_trigger_interrupt()
1024 else if ((mdev_state->irq_index == VFIO_PCI_INTX_IRQ_INDEX) && in mtty_trigger_interrupt()
1025 (!mdev_state->intx_evtfd)) { in mtty_trigger_interrupt()
1030 if (mdev_state->irq_index == VFIO_PCI_MSI_IRQ_INDEX) in mtty_trigger_interrupt()
1031 ret = eventfd_signal(mdev_state->msi_evtfd, 1); in mtty_trigger_interrupt()
1033 ret = eventfd_signal(mdev_state->intx_evtfd, 1); in mtty_trigger_interrupt()
1044 static int mtty_get_region_info(struct mdev_state *mdev_state, in mtty_get_region_info() argument
1055 mutex_lock(&mdev_state->ops_lock); in mtty_get_region_info()
1065 if (mdev_state->nr_ports == 2) in mtty_get_region_info()
1073 mdev_state->region_info[bar_index].size = size; in mtty_get_region_info()
1074 mdev_state->region_info[bar_index].vfio_offset = in mtty_get_region_info()
1081 mutex_unlock(&mdev_state->ops_lock); in mtty_get_region_info()
1121 struct mdev_state *mdev_state = in mtty_ioctl() local
1122 container_of(vdev, struct mdev_state, vdev); in mtty_ioctl()
1143 memcpy(&mdev_state->dev_info, &info, sizeof(info)); in mtty_ioctl()
1164 ret = mtty_get_region_info(mdev_state, &info, &cap_type_id, in mtty_ioctl()
1185 (info.index >= mdev_state->dev_info.num_irqs)) in mtty_ioctl()
1209 mdev_state->dev_info.num_irqs, in mtty_ioctl()
1222 ret = mtty_set_irqs(mdev_state, hdr.flags, hdr.index, hdr.start, in mtty_ioctl()
1229 return mtty_reset(mdev_state); in mtty_ioctl()